Trident CyberBladeXP4 status?
Alex Deucher
alexdeucher at gmail.com
Tue May 10 11:37:50 PDT 2005
On 5/10/05, Jason L Tibbitts III <tibbs at math.uh.edu> wrote:
> >>>>> "AD" == Alex Deucher <alexdeucher at gmail.com> writes:
>
> AD> FWIW, the VIA PLE133 datasheet has documentation on the integrated
> AD> trident chip. It's not the xp4, but I'd imagine the chips are
> AD> pretty similar.
>
> Anyone know what the driver identifies this chip as? I would like
> read the data sheet and "follow along" in the driver.
>
> A nice start would be to figure out what some of the magic numbers in
> xp_accel.c are. For example, the accelerator XPInitializeAccelerator
> does:
>
> MMIO_OUT32(pTrident->IOBase, 0x2154, (pScrn->displayWidth) << shift);
> MMIO_OUT32(pTrident->IOBase, 0x2150, (pScrn->displayWidth) << shift);
> MMIO_OUT8(pTrident->IOBase, 0x2126, 3);
>
> but I'm having no luck understanding where those numbers come from.
>
I'm not familiar with the trident engine, but it's pretty simple.
MMIO_OUT32 is writing a 32 bit value to register 0x2154. the MMIO
base is at pTrident->IOBase and the register is at offset 0x2154 and
the value being written is (pScrn->displayWidth) << shift. the shift
indicates that the displaywidth bitfield in the register does not
start at bit 0, but at what ever bit shift is set to. MMIO_OUT8
writes an 8 bit value. same with MMIO_16. there are are also MMIO_IN
macros as well to read the bits in the regs.
Alex
> - J<
>
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