pci rework not quite ready yet?

[Keith Packard]

On Wed, 2007-08-29 at 10:40 -0700, Jesse Barnes wrote:

> Yeah, I guess my main concern is how buggy some of the core X usage of 
> bus addresses has been.  As long as we can avoid that by making clear 
> the difference between bus, CPU physical, GTT virtual, and process 
> virtual I'll be happy.

Yeah, drivers already have three address spaces to work in, so adding
another will be confusing, but probably not mind blowing.

> Sure, but still, having a separate call for this might make more sense.

I just prefer to avoid extra calls in the driver which should always be
there anyway.

> FYI, subrange mappings don't buy us anything on a security basis ATM, 
> since the sysfs resourceX files used by pciaccess are managed as whole 
> files, not as collections of pages.  We can't do fine grained access 
> control without using device specific ioctls or something.  So having a 
> subrange API will only help with attribute control, not security, so it 
> might be best to do it separately.

Separate still means more calls, and the common case (one mapping per
BAR) is twice as complex in the driver.

> I hope we can get to that point eventually.  X has too many slightly 
> overlapping and obsoleted APIs as it is... :)

Then we'd better force drivers to migrate completely by removing the
existing xf86Map APIs.

-- 
keith.packard at intel.com
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