MTRR vs. PAT and Intel Graphics

[Jesse Barnes]

On Friday, June 1, 2007 11:06 am Bruce Perens wrote:
> Jesse Barnes wrote:
> > That said, it seems odd that a simple fan configuration setting
> > would eat up four whole MTRRs.  What does /proc/mtrr look like with
> > and without the fan setting enabled?  Linux could do a better job
> > of verifying and reprogramming MTRRs in many cases than it does
> > currently.
>
> Here are the MTRRs when Intel QST fan control is enabled on the
> motherboard
>
> reg00: base=0x00000000 (   0MB), size=1024MB: write-back, count=1
> reg01: base=0x40000000 (1024MB), size= 512MB: write-back, count=1
> reg02: base=0x60000000 (1536MB), size= 256MB: write-back, count=1
> reg03: base=0x70000000 (1792MB), size= 128MB: write-back, count=1
> reg04: base=0x78000000 (1920MB), size=  64MB: write-back, count=1
> reg05: base=0x7c000000 (1984MB), size=  32MB: write-back, count=1
> reg06: base=0x7e000000 (2016MB), size=  16MB: write-back, count=1
> reg07: base=0x7e800000 (2024MB), size=   8MB: uncachable, count=1

Wow, that looks like some sort of best fit algorithm gone horribly 
wrong. :)  It doesn't even create a new uncachable window for the QST 
fan control (which is presumably ACPI or SMM based).  Have you reported 
this to your BIOS vendor?

> Here are the MTRRs when the fan control is set to "legacy":
>
> reg00: base=0x00000000 (   0MB), size=2048MB: write-back, count=1
> reg01: base=0x7f800000 (2040MB), size=   8MB: uncachable, count=1
> reg02: base=0x7f700000 (2039MB), size=   1MB: write-through, count=1
> reg03: base=0xe0000000 (3584MB), size= 256MB: write-combining,
> count=1

You may be able to fixup the MTRR settings by hand after system boot (I 
think Documentation/mtrr.txt describes the API), you'd just have to 
consolidate registers 0-6 into a single WB MTRR, then X should be able 
to properly set a WC region for the framebuffer.

Jesse