915gm/945gm/XAA lockup with gray blocks when switching video mode

[Bryce Harrington]

Hi Jesse,

The patch also appears to work fine.  I had to drop the first chunk, as
it appeared with Ubuntu's version of the driver, 'i' was still required.
We did get verification from one user that the patch solved the issue.

For Ubuntu we've now incorporated Peter's patch (which also includes
a fix for the (similar) Xv bug).  

Thanks for everyone's help on this last minute bug.  I think this might
actually close a few odd -intel bugs.  :-)

Bryce

On Fri, Oct 12, 2007 at 03:16:25PM -0700, Jesse Barnes wrote:
> On Friday, October 12, 2007 12:13 pm Peter Clifton wrote:
> > The following fixes it for me at least:
> 
> Can you try the attached patch and make sure it works too?  I think we 
> may need to sprinkle some more i830_pipe_enabled checks here and there, 
> so I made a little function for it.
> 
> Thanks,
> Jesse

> diff --git a/src/i830_driver.c b/src/i830_driver.c
> index 9ca1222..552a791 100644
> --- a/src/i830_driver.c
> +++ b/src/i830_driver.c
> @@ -1722,7 +1722,6 @@ static void
>  ResetState(ScrnInfoPtr pScrn, Bool flush)
>  {
>     I830Ptr pI830 = I830PTR(pScrn);
> -   int i;
>     unsigned long temp;
>  
>     DPRINTF(PFX, "ResetState: flush is %s\n", BOOLTOSTRING(flush));
> @@ -1830,6 +1829,52 @@ SetHWOperatingState(ScrnInfoPtr pScrn)
>        I830InitHWCursor(pScrn);
>  }
>  
> +enum pipe {
> +    PIPE_A = 0,
> +    PIPE_B,
> +};
> +
> +static Bool
> +i830_pipe_enabled(I830Ptr pI830, enum pipe pipe)
> +{
> +    if (pipe == PIPE_A)
> +	return (INREG(PIPEACONF) & PIPEACONF_ENABLE);
> +    else
> +	return (INREG(PIPEBCONF) & PIPEBCONF_ENABLE);
> +}
> +
> +static void
> +i830_save_palette(I830Ptr pI830, enum pipe pipe)
> +{
> +    int i;
> +
> +    if (!i830_pipe_enabled(pI830, pipe))
> +	return;
> +
> +    for(i= 0; i < 256; i++) {
> +	if (pipe == PIPE_A)
> +	    pI830->savePaletteA[i] = INREG(PALETTE_A + (i << 2));
> +	else
> +	    pI830->savePaletteB[i] = INREG(PALETTE_B + (i << 2));
> +    }
> +}
> +
> +static void
> +i830_restore_palette(I830Ptr pI830, enum pipe pipe)
> +{
> +    int i;
> +
> +    if (!i830_pipe_enabled(pI830, pipe))
> +	return;
> +
> +    for(i= 0; i < 256; i++) {
> +	if (pipe == PIPE_A)
> +	    OUTREG(PALETTE_A + (i << 2), pI830->savePaletteA[i]);
> +	else
> +	    OUTREG(PALETTE_B + (i << 2), pI830->savePaletteB[i]);
> +    }
> +}
> +
>  static Bool
>  SaveHWState(ScrnInfoPtr pScrn)
>  {
> @@ -1867,9 +1912,7 @@ SaveHWState(ScrnInfoPtr pScrn)
>     pI830->saveDSPAPOS = INREG(DSPAPOS);
>     pI830->saveDSPABASE = INREG(DSPABASE);
>  
> -   for(i= 0; i < 256; i++) {
> -      pI830->savePaletteA[i] = INREG(PALETTE_A + (i << 2));
> -   }
> +   i830_save_palette(pI830, PIPE_A);
>  
>     if(xf86_config->num_crtc == 2) {
>        pI830->savePIPEBCONF = INREG(PIPEBCONF);
> @@ -1891,9 +1934,8 @@ SaveHWState(ScrnInfoPtr pScrn)
>        pI830->saveDSPBSIZE = INREG(DSPBSIZE);
>        pI830->saveDSPBPOS = INREG(DSPBPOS);
>        pI830->saveDSPBBASE = INREG(DSPBBASE);
> -      for(i= 0; i < 256; i++) {
> -         pI830->savePaletteB[i] = INREG(PALETTE_B + (i << 2));
> -      }
> +
> +      i830_save_palette(pI830, PIPE_B);
>     }
>  
>     if (IS_I965G(pI830)) {
> @@ -2059,15 +2101,8 @@ RestoreHWState(ScrnInfoPtr pScrn)
>     OUTREG(VCLK_DIVISOR_VGA1, pI830->saveVCLK_DIVISOR_VGA1);
>     OUTREG(VCLK_POST_DIV, pI830->saveVCLK_POST_DIV);
>  
> -   for(i = 0; i < 256; i++) {
> -      OUTREG(PALETTE_A + (i << 2), pI830->savePaletteA[i]);
> -   }
> -   
> -   if(xf86_config->num_crtc == 2) {
> -      for(i= 0; i < 256; i++) {
> -         OUTREG(PALETTE_B + (i << 2), pI830->savePaletteB[i]);
> -      }
> -   }
> +   i830_restore_palette(pI830, PIPE_A);
> +   i830_restore_palette(pI830, PIPE_B);
>  
>     for(i = 0; i < 7; i++) {
>        OUTREG(SWF0 + (i << 2), pI830->saveSWF[i]);

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