Old repository for intel driver?

[Peter Clifton]

On Fri, 2007-10-19 at 23:40 +0100, Keith Whitwell wrote:
> Dave Airlie wrote:
> >> I'm trying to debug issues on the 855 graphics chip, and wonder if there
> >> is a historical repository for the intel driver.
> >>
> >> For example, I'm wanting to git blame the lines:
> >>
> >>    if (pI830->PciInfo->chipType != PCI_CHIP_845_G &&
> >>        pI830->PciInfo->chipType != PCI_CHIP_I830_M) {
> >>       I830SetParam(pScrn, I830_SETPARAM_USE_MI_BATCHBUFFER_START, 1 );
> >>    }
> >>
> >> in i830_dri.c and see when they were added / why (why just those two
> >> chips can't run this command?)
> >>
> >> A git blame shows that prior to a syntax revision KP made, the lines
> >> come from:
> >>
> >> commit 3ad0d9a73bc0a4f3edb858d5f3a7c36827b7a429
> >> Author: Kaleb Keithley <kaleb at freedesktop.org>
> >> Date:   Fri Nov 14 16:48:55 2003 +0000
> >>
> >>     Initial revision
> >>
> >>
> >> Is there a historical repository somewhere?
> >>
> >> Does anyone know why the above lines are only avoided ono 845_G and
> >> I830_M chips?
> >>
> > 
> > I don't have the docs but I there's a good chance the 830/845 didn't
> > support the batchbuffer start / batchbuffer end..
> 
> 
> Correct - there's another version of the command that specified both 
> start and end in a single packet.

>From the commit log, this addition was:

http://cvsweb.xfree86.org/cvsweb/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.c.diff?r1=1.10&r2=1.11

But is commented:

Revision 1.11 / (view) - annotate - [select for diffs] , Tue Jan 28
22:47:09 2003 UTC (4 years, 8 months ago) by dawes 
Branch: MAIN 
CVS Tags: xf-4_2_99_901 
Changes since 1.10: +24 -1 lines 
Diff to previous 1.10 
794. Update the i810 2D driver and i830 3D drivers to recognise and handle
      the Intel 852GM/855GM integrated graphics chipsets (David Dawes,
      Keith Whitwell).


The tests for not doing that command aren't related to the 855GM. Is
that just an extra change which rolled together with this commit?

(Isn't git great showing a whole atomic commit ;))

Anyway... I guess its unrelated, looking at the drm module. (Not that I
really understand what a batchbuffer is!)

Do you happen to know of any registers within the chip which deal with
offsets / memory mappings for textures? (Something which might not be
correctly surviving a suspend?)

If I'm correct, most of the texture control is done via commands sent
into the ringbuffer, so its not like looking for something not restored
in the PCI config space. Does the chip have such state internally
though?


-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)