jbarnes at virtuousgeek.org
Tue Sep 11 03:59:21 PDT 2007
On Wednesday, August 22, 2007, Lukas Hejtmanek wrote:
> On Wed, Aug 22, 2007 at 12:24:07PM +0200, Michel Dänzer wrote:
> > > yes, this patch helps.
> > Okay, thanks for testing it.
> > Unfortunately, this doesn't cut it because the SAREA fields are
> > also used for vertical blank interrupts, which are associated with
> > the pipes. I may need to add another SAREA field to signal that the
> > planes are reversed wrt the pipes. Any better ideas?
> Hm, that is consequence of fb compression on i915 which must swap
> planes to enable compression. New fields had to be added into some
> intel driver structures.
Ok, I've pushed some fixes for this based on Michel's suggestions.
Compatibility is a pain though: you'll need new DDX bits to work
around the issue if you have old Mesa & DRM bits. With updated DDX,
Mesa and DRM bits, you should see the correct behavior even if your
pipes have been moved around.
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