Poor compositing performance on 965Q chipset with intel 2.2.1 driver
mgedmin at b4net.lt
Fri May 9 08:35:23 PDT 2008
On Fri, May 09, 2008 at 07:39:47AM -0700, Keith Packard wrote:
> On Fri, 2008-05-09 at 14:11 +0100, Barry Scott wrote:
> > Using latest libpciaccess makes no difference MTRR status is the same:
> It's not the MTRRs that are broken, it's the page mapping which is
> setting the ignore cache and write through bits on each page mapped by
> libpciaccess. There's a kludge-around which takes advantage of a
> different kernel bug to clear those bits. A simple test:
> $ x11perf -shmput500
> If that gives you a number significantly less than 1000, then your pages
> are probably mis-mapped.
Which number is that? The # per second?
mg at platonas:~ $ x11perf -shmput500
x11perf - X11 performance program, version 1.5
The X.Org Foundation server version 10400090 on :0.0
Fri May 9 18:31:46 2008
Sync time adjustment is 0.0309 msecs.
3200 reps @ 1.6794 msec ( 595.0/sec): ShmPutImage 500x500 square
3200 reps @ 1.6568 msec ( 604.0/sec): ShmPutImage 500x500 square
3200 reps @ 1.7887 msec ( 559.0/sec): ShmPutImage 500x500 square
3200 reps @ 1.6947 msec ( 590.0/sec): ShmPutImage 500x500 square
3200 reps @ 1.6732 msec ( 598.0/sec): ShmPutImage 500x500 square
16000 trep @ 1.6986 msec ( 589.0/sec): ShmPutImage 500x500 square
This is with GM965 and intel driver 2.2.1, but I haven't noticed poor
Microsoft's entry in this cavalcade of horrors is Universal Plug and Play
(UPnP). This is a protocol that allows [...] an end-user system to request a
dynamic port-forwarding from the firewall to the box. Many network
administrators will probably (rightly) recoil at letting applications on a
Windows box dictate firewall policy.
-- Anthony Baxter
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