Intel Graphics question
joe at settoplinux.org
Thu Feb 19 21:07:07 PST 2009
On Thu, 19 Feb 2009 22:11:37 -0500, Joseph Smith <joe at settoplinux.org>
> On Fri, 20 Feb 2009 10:19:49 +0800, Zhenyu Wang <zhenyu.z.wang at intel.com>
>> On 2009.02.20 07:43:21 +0800, Joseph Smith wrote:
>>> I am a coreboot (http://www.coreboot.org) developer working mostly
>>> chipsets. Currently I am working an set-top-box with an Intel chipset.
>>> looking into implementing LVDS and TV-OUT support for various Intel
>>> for set-top-boxes and possibly laptops starting right from the
>>> kind of understand how it works but not exactly sure in which order it
>>> needs to happen. Could anyone please help me understand or confirm if
>>> is right:
>>> 1. All GMCH graphics settings are available through 512k graphics mmio
>>> 2. Current graphics settings are read from graphics mmio space
>>> 2. i2c communications is setup through GMCH graphics mmio space
>>> 3. LVDS and/or TV-OUT chip is programmed via i2c according to graphic
>>> settings read from graphics mmio space
>>> 4. DVO port that the LVDS and/or TV-OUT chip is connected to is turned
>>> Did I miss anything else?
>>> Thanks in advance to any help you can give me.
>> MMIO space is where all the modesetting stuffs happen.
>> You can look up xf86-video-intel source for information to setup
> Thanks for the help Zhenyu :-)
> I have been looking at the source along with other sources like
> i810tvout-0.9.1, nvtv, and the Intel 815 Chipset: Graphics
> Controller Programmers Reference Manual. Although this is for a newer
> chipset than the 815, but that is the only public doc I could find. They
> all seem to turn on the DVO port at different points, does that matter?
> Can/should the DVO port be turned on before LVDS and/or TV-OUT chip is
> programmed or after?
AH, I found this from the Intel 965 Express Chipset Family and Intel G35
Express Chipset Graphics Controller PRM
Setting the Mode
In general, the TV-Out logic should be programmed before it is enabled. The
following steps should be followed.
1. disable the pipe if it is running.
2. set display PLL to the required clock frequency (from the table)
3. make sure that DPO programming is acceptable according to the rules
outlined below, change them (and the planes) if needed
4. enable the pipe
5.program all TV-Out registers, then enable TV-Out
Exiting the mode is the reverse of these steps.
There are no special restrictions on planes used with TV-Out. It is okay to
use double wide pixel mode if needed due to low core frequency.
More information about the xorg