[ANNOUNCE] xf86-video-intel 2.20.5

Chris Wilson chris at chris-wilson.co.uk
Sun Aug 26 05:05:27 PDT 2012

Another silly bug found, another small bugfix release. The goal was for
the driver to bind to all Intel devices supported by the kernel.
Unfortunately we were too successful and started claiming Pouslbo,
Medfield and Cedarview devices which are still encumbered by propietary
IP and not supported by this driver.

Bugs fixed since 2.20.4:

 * Only bind to Intel devices using the i915 kernel module

 * Regression in the bitmap-to-region code, e.g. icewm window buttons

Chris Wilson (58):
      sna: Add damage for the whole unaligned trapezoid not per component
      sna/damage: Add some more sanity checks for creating empty regions
      sna: Reduce damage after a large composite operation
      sna: Reduce subtracted damage earlier
      sna: Avoid forcing an upload for an unblittable bo unless on a fallback path
      sna/damage: Replace the damage with a larger box if subsumed
      sna: Consider sample wraparound in each direction independently
      sna: Enable BLT composite functions to target CPU buffers
      sna: compare the correct trailing dword when skipping identical bitmap lines
      sna: Only submit the batch if flushing a DRI client bo
      sna: Update maybe_inplace to recognise more types of handled pixel formats
      sna/trapezoids: Accept more operators for maybe-inplace
      sna: Discard GPU (and damage) after applying clear on migration to CPU
      sna: Tweak is_cpu/is_gpu heuristics
      sna/gen3: Tidy vbo discard
      sna: Don't promote a ShmPixmap to GPU for a CopyArea
      sna: Experiment with flushing the batch prior to rendering to a ShmPixmap
      sna: Do not use the GPU to migrate to the CPU whilst wedged!
      sna: Flush the batch before preparing for a FlushCallback
      sna: Remove unneeded source bo unref after __sna_render_pixmap_bo()
      sna: Avoid migrating the BLT composite src to the GPU if the dst is not
      Sanity check that the driver is an i915.ko GEM device before claiming it
      sna: Add a modicum of DBG for PolyFillRect
      Missing includes for b5b76ad849b
      sna: Correct ordering of calls to memcpy for BLT cpu composite paths
      sna: Refine decision making for maybe-inplace trapezoids
      sna: Remove confusing is_cpu()
      sna: Add a couple of buffer cache management assertions
      Only open the matching BusID and not the first named
      Check that the module that indeed i915 before using custom ioctls
      sna: A few more buffer cache management assertions
      sna: Keep a stash of the most recently allocated requests
      sna: Trim a parameter from kgem_bo_mark_dirty() and add some assertions
      sna/gen3: Convert to sna_drawable_use_bo()
      sna: Assign a unique id to snoopable CPU bo
      sna: Allow target bo promotion to GPU even on old architectures
      sna/gen3: Fix assertion to check the freshly allocated vertex bo
      sna/gen6+: Only mark the dst as dirty again if it already is in the batch
      sna: Mark all levels of a proxy as dirty
      sna: Fix the assertion for tracking proxies in the batch
      sna: Add a DBG to log pixmap destruction
      sna: Display still resident memory in inactive/snoop caches under DEBUG_MEMORY
      sna: Balance CPU bo accounting for SHM pixmaps
      sna: Discard a no-longer-used GPU bo after moving to the CPU domain
      sna: Make sure the opposite damage is destroyed after reducing to all
      sna: Assert that the CPU bo is not used if the GPU is clear
      sna: Convert to using IGNORE_CPU flag rather than complicating the CPU damage
      sna: If we cannot use the CPU bo along a render pathway, promote to GPU
      sna: Only use the GPU for an active CPU bo unless forced
      sna: Flush before adding any SHM pixmap into the batch
      sna: Mark the CPU damage as needing flushing for DRI buffers
      sna: Flush the batch if it contains any DRI pixmaps
      sna: Use a temporary userptr mapping for a large upload into a busy target
      sna: Tidy up users of __kgem_bo_is_busy()
      sna: Correct a pair of DBG messages
      sna: Allow the batch to be flushed if the GPU is idle upon a context switch
      sna: Submit the partial batch before throttling
      2.20.5 release

Eric S. Raymond (1):
      Fix seriously malformed list syntax on intel(4).

git tag: 2.20.5

MD5:  f6105268d7a63783460526ffe327e6c0  xf86-video-intel-2.20.5.tar.bz2
SHA1: 7ca9706fd3bd8b40e6f3288aa6e02b9ed44c6503  xf86-video-intel-2.20.5.tar.bz2
SHA256: 143d1cd808694ca7202b642fbb2b03a43a7474d7b527216c517fc41319410bec  xf86-video-intel-2.20.5.tar.bz2

MD5:  4816fe78992aef3bbfccdc67969c77f0  xf86-video-intel-2.20.5.tar.gz
SHA1: f6217a986775fe2ab569c82014907f9ea5545443  xf86-video-intel-2.20.5.tar.gz
SHA256: 23816da876d3ba3640b3e6c206b83dc2234813e96af19a117ca07593ba8510a2  xf86-video-intel-2.20.5.tar.gz

Chris Wilson, Intel Open Source Technology Centre
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