xserver/hw/kdrive/ati ati_cursor.c, NONE, 1.1 ati_dma.c, NONE,
1.1 ati_dma.h, NONE, 1.1 ati_microcode.c, NONE,
1.1 ati_video.c, NONE, 1.1 r128_composite.c, NONE,
1.1 Makefile.am, 1.5, 1.6 ati.c, 1.12, 1.13 ati.h, 1.7,
1.8 ati_draw.c, 1.13, 1.14 ati_draw.h, 1.5, 1.6 ati_dri.c, 1.6,
1.7 ati_reg.h, 1.4, 1.5 radeon_composite.c, 1.7, 1.8
Eric Anholt
xserver-commit at pdx.freedesktop.org
Mon May 17 13:18:04 PDT 2004
Committed by: anholt
Update of /cvs/xserver/xserver/hw/kdrive/ati
In directory pdx:/home/anholt/xserver/hw/kdrive/ati
Modified Files:
Makefile.am ati.c ati.h ati_draw.c ati_draw.h ati_dri.c
ati_reg.h radeon_composite.c
Added Files:
ati_cursor.c ati_dma.c ati_dma.h ati_microcode.c ati_video.c
r128_composite.c
Log Message:
Overhaul of the ATI driver:
- Add monochrome hardware cursor support.
- Try to auto-detect AGP support for DRI on Radeons. And fail.
Detect it properly on R128.
- Set up card for pseudo-DMA if possible. Convert 2D rendering
code to prepare DMA packets only. Use generic code to decode
DMA packets to MMIO if PDMA is unavailable. Add WIP code to
support "real" DMA without DRM support.
- Dispatch pending DMA commands when the server sleeps. Otherwise
some things, such as typing in an xterm, wouldn't show up for a
time.
- Fix Radeon Composite acceleration in many ways, and add Rage 128
Composite acceleration. Disable them both due to
still-not-understood issues they have. They fail with In, Out,
AtopReverse, and Xor, and text rendering is strange.
- Add textured XV support for R100 and Rage 128. No brightness/sat
controls, but it does support multiple ports, and cooperates with
Composite.
- Add WIP code for hostdata uploads.
- Many cleanups and fixes.
--- NEW FILE: ati_cursor.c ---
(This appears to be a binary file; contents omitted.)
--- NEW FILE: ati_dma.c ---
(This appears to be a binary file; contents omitted.)
--- NEW FILE: ati_dma.h ---
(This appears to be a binary file; contents omitted.)
--- NEW FILE: ati_microcode.c ---
/* r128_cce.c -- ATI Rage 128 driver -*- linux-c -*-
* radeon_cp.c -- CP support for Radeon -*- linux-c -*-
*
* Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
* Copyright 2000 VA Linux Systems, Inc., Fremont, California.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
* Authors:
* Kevin E. Martin <martin at valinux.com>
* Gareth Hughes <gareth at valinux.com>
*/
/* CCE microcode (from ATI) */
#include "ati.h"
CARD32 r128_cce_microcode[] = {
0, 276838400, 0, 268449792, 2, 142, 2, 145, 0, 1076765731, 0,
1617039951, 0, 774592877, 0, 1987540286, 0, 2307490946U, 0,
599558925, 0, 589505315, 0, 596487092, 0, 589505315, 1,
11544576, 1, 206848, 1, 311296, 1, 198656, 2, 912273422, 11,
262144, 0, 0, 1, 33559837, 1, 7438, 1, 14809, 1, 6615, 12, 28,
1, 6614, 12, 28, 2, 23, 11, 18874368, 0, 16790922, 1, 409600, 9,
30, 1, 147854772, 16, 420483072, 3, 8192, 0, 10240, 1, 198656,
1, 15630, 1, 51200, 10, 34858, 9, 42, 1, 33559823, 2, 10276, 1,
15717, 1, 15718, 2, 43, 1, 15936948, 1, 570480831, 1, 14715071,
12, 322123831, 1, 33953125, 12, 55, 1, 33559908, 1, 15718, 2,
46, 4, 2099258, 1, 526336, 1, 442623, 4, 4194365, 1, 509952, 1,
459007, 3, 0, 12, 92, 2, 46, 12, 176, 1, 15734, 1, 206848, 1,
18432, 1, 133120, 1, 100670734, 1, 149504, 1, 165888, 1,
15975928, 1, 1048576, 6, 3145806, 1, 15715, 16, 2150645232U, 2,
268449859, 2, 10307, 12, 176, 1, 15734, 1, 15735, 1, 15630, 1,
15631, 1, 5253120, 6, 3145810, 16, 2150645232U, 1, 15864, 2, 82,
1, 343310, 1, 1064207, 2, 3145813, 1, 15728, 1, 7817, 1, 15729,
3, 15730, 12, 92, 2, 98, 1, 16168, 1, 16167, 1, 16002, 1, 16008,
1, 15974, 1, 15975, 1, 15990, 1, 15976, 1, 15977, 1, 15980, 0,
15981, 1, 10240, 1, 5253120, 1, 15720, 1, 198656, 6, 110, 1,
180224, 1, 103824738, 2, 112, 2, 3145839, 0, 536885440, 1,
114880, 14, 125, 12, 206975, 1, 33559995, 12, 198784, 0,
33570236, 1, 15803, 0, 15804, 3, 294912, 1, 294912, 3, 442370,
1, 11544576, 0, 811612160, 1, 12593152, 1, 11536384, 1,
14024704, 7, 310382726, 0, 10240, 1, 14796, 1, 14797, 1, 14793,
1, 14794, 0, 14795, 1, 268679168, 1, 9437184, 1, 268449792, 1,
198656, 1, 9452827, 1, 1075854602, 1, 1075854603, 1, 557056, 1,
114880, 14, 159, 12, 198784, 1, 1109409213, 12, 198783, 1,
1107312059, 12, 198784, 1, 1109409212, 2, 162, 1, 1075854781, 1,
1073757627, 1, 1075854780, 1, 540672, 1, 10485760, 6, 3145894,
16, 274741248, 9, 168, 3, 4194304, 3, 4209949, 0, 0, 0, 256, 14,
174, 1, 114857, 1, 33560007, 12, 176, 0, 10240, 1, 114858, 1,
33560018, 1, 114857, 3, 33560007, 1, 16008, 1, 114874, 1,
33560360, 1, 114875, 1, 33560154, 0, 15963, 0, 256, 0, 4096, 1,
409611, 9, 188, 0, 10240, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
};
CARD32 radeon_cp_microcode[][2] = {
{ 0x21007000, 0000000000 },
{ 0x20007000, 0000000000 },
{ 0x000000b4, 0x00000004 },
{ 0x000000b8, 0x00000004 },
{ 0x6f5b4d4c, 0000000000 },
{ 0x4c4c427f, 0000000000 },
{ 0x5b568a92, 0000000000 },
{ 0x4ca09c6d, 0000000000 },
{ 0xad4c4c4c, 0000000000 },
{ 0x4ce1af3d, 0000000000 },
{ 0xd8afafaf, 0000000000 },
{ 0xd64c4cdc, 0000000000 },
{ 0x4cd10d10, 0000000000 },
{ 0x000f0000, 0x00000016 },
{ 0x362f242d, 0000000000 },
{ 0x00000012, 0x00000004 },
{ 0x000f0000, 0x00000016 },
{ 0x362f282d, 0000000000 },
{ 0x000380e7, 0x00000002 },
{ 0x04002c97, 0x00000002 },
{ 0x000f0001, 0x00000016 },
{ 0x333a3730, 0000000000 },
{ 0x000077ef, 0x00000002 },
{ 0x00061000, 0x00000002 },
{ 0x00000021, 0x0000001a },
{ 0x00004000, 0x0000001e },
{ 0x00061000, 0x00000002 },
{ 0x00000021, 0x0000001a },
{ 0x00004000, 0x0000001e },
{ 0x00061000, 0x00000002 },
{ 0x00000021, 0x0000001a },
{ 0x00004000, 0x0000001e },
{ 0x00000017, 0x00000004 },
{ 0x0003802b, 0x00000002 },
{ 0x040067e0, 0x00000002 },
{ 0x00000017, 0x00000004 },
{ 0x000077e0, 0x00000002 },
{ 0x00065000, 0x00000002 },
{ 0x000037e1, 0x00000002 },
{ 0x040067e1, 0x00000006 },
{ 0x000077e0, 0x00000002 },
{ 0x000077e1, 0x00000002 },
{ 0x000077e1, 0x00000006 },
{ 0xffffffff, 0000000000 },
{ 0x10000000, 0000000000 },
{ 0x0003802b, 0x00000002 },
{ 0x040067e0, 0x00000006 },
{ 0x00007675, 0x00000002 },
{ 0x00007676, 0x00000002 },
{ 0x00007677, 0x00000002 },
{ 0x00007678, 0x00000006 },
{ 0x0003802c, 0x00000002 },
{ 0x04002676, 0x00000002 },
{ 0x00007677, 0x00000002 },
{ 0x00007678, 0x00000006 },
{ 0x0000002f, 0x00000018 },
{ 0x0000002f, 0x00000018 },
{ 0000000000, 0x00000006 },
{ 0x00000030, 0x00000018 },
{ 0x00000030, 0x00000018 },
{ 0000000000, 0x00000006 },
{ 0x01605000, 0x00000002 },
{ 0x00065000, 0x00000002 },
{ 0x00098000, 0x00000002 },
{ 0x00061000, 0x00000002 },
{ 0x64c0603e, 0x00000004 },
{ 0x000380e6, 0x00000002 },
{ 0x040025c5, 0x00000002 },
{ 0x00080000, 0x00000016 },
{ 0000000000, 0000000000 },
{ 0x0400251d, 0x00000002 },
{ 0x00007580, 0x00000002 },
{ 0x00067581, 0x00000002 },
{ 0x04002580, 0x00000002 },
{ 0x00067581, 0x00000002 },
{ 0x00000049, 0x00000004 },
{ 0x00005000, 0000000000 },
{ 0x000380e6, 0x00000002 },
{ 0x040025c5, 0x00000002 },
{ 0x00061000, 0x00000002 },
{ 0x0000750e, 0x00000002 },
{ 0x00019000, 0x00000002 },
{ 0x00011055, 0x00000014 },
{ 0x00000055, 0x00000012 },
{ 0x0400250f, 0x00000002 },
{ 0x0000504f, 0x00000004 },
{ 0x000380e6, 0x00000002 },
{ 0x040025c5, 0x00000002 },
{ 0x00007565, 0x00000002 },
{ 0x00007566, 0x00000002 },
{ 0x00000058, 0x00000004 },
{ 0x000380e6, 0x00000002 },
{ 0x040025c5, 0x00000002 },
{ 0x01e655b4, 0x00000002 },
{ 0x4401b0e4, 0x00000002 },
{ 0x01c110e4, 0x00000002 },
{ 0x26667066, 0x00000018 },
{ 0x040c2565, 0x00000002 },
{ 0x00000066, 0x00000018 },
{ 0x04002564, 0x00000002 },
{ 0x00007566, 0x00000002 },
{ 0x0000005d, 0x00000004 },
{ 0x00401069, 0x00000008 },
{ 0x00101000, 0x00000002 },
{ 0x000d80ff, 0x00000002 },
{ 0x0080006c, 0x00000008 },
{ 0x000f9000, 0x00000002 },
{ 0x000e00ff, 0x00000002 },
{ 0000000000, 0x00000006 },
{ 0x0000008f, 0x00000018 },
{ 0x0000005b, 0x00000004 },
{ 0x000380e6, 0x00000002 },
{ 0x040025c5, 0x00000002 },
{ 0x00007576, 0x00000002 },
{ 0x00065000, 0x00000002 },
{ 0x00009000, 0x00000002 },
{ 0x00041000, 0x00000002 },
{ 0x0c00350e, 0x00000002 },
{ 0x00049000, 0x00000002 },
{ 0x00051000, 0x00000002 },
{ 0x01e785f8, 0x00000002 },
{ 0x00200000, 0x00000002 },
{ 0x0060007e, 0x0000000c },
{ 0x00007563, 0x00000002 },
{ 0x006075f0, 0x00000021 },
{ 0x20007073, 0x00000004 },
{ 0x00005073, 0x00000004 },
{ 0x000380e6, 0x00000002 },
{ 0x040025c5, 0x00000002 },
{ 0x00007576, 0x00000002 },
{ 0x00007577, 0x00000002 },
{ 0x0000750e, 0x00000002 },
{ 0x0000750f, 0x00000002 },
{ 0x00a05000, 0x00000002 },
{ 0x00600083, 0x0000000c },
{ 0x006075f0, 0x00000021 },
{ 0x000075f8, 0x00000002 },
{ 0x00000083, 0x00000004 },
{ 0x000a750e, 0x00000002 },
{ 0x000380e6, 0x00000002 },
{ 0x040025c5, 0x00000002 },
{ 0x0020750f, 0x00000002 },
{ 0x00600086, 0x00000004 },
{ 0x00007570, 0x00000002 },
{ 0x00007571, 0x00000002 },
{ 0x00007572, 0x00000006 },
{ 0x000380e6, 0x00000002 },
{ 0x040025c5, 0x00000002 },
{ 0x00005000, 0x00000002 },
{ 0x00a05000, 0x00000002 },
{ 0x00007568, 0x00000002 },
{ 0x00061000, 0x00000002 },
{ 0x00000095, 0x0000000c },
{ 0x00058000, 0x00000002 },
{ 0x0c607562, 0x00000002 },
{ 0x00000097, 0x00000004 },
{ 0x000380e6, 0x00000002 },
{ 0x040025c5, 0x00000002 },
{ 0x00600096, 0x00000004 },
{ 0x400070e5, 0000000000 },
{ 0x000380e6, 0x00000002 },
{ 0x040025c5, 0x00000002 },
{ 0x000380e5, 0x00000002 },
{ 0x000000a8, 0x0000001c },
{ 0x000650aa, 0x00000018 },
{ 0x040025bb, 0x00000002 },
{ 0x000610ab, 0x00000018 },
{ 0x040075bc, 0000000000 },
{ 0x000075bb, 0x00000002 },
{ 0x000075bc, 0000000000 },
{ 0x00090000, 0x00000006 },
{ 0x00090000, 0x00000002 },
{ 0x000d8002, 0x00000006 },
{ 0x00007832, 0x00000002 },
{ 0x00005000, 0x00000002 },
{ 0x000380e7, 0x00000002 },
{ 0x04002c97, 0x00000002 },
{ 0x00007820, 0x00000002 },
{ 0x00007821, 0x00000002 },
{ 0x00007800, 0000000000 },
{ 0x01200000, 0x00000002 },
{ 0x20077000, 0x00000002 },
{ 0x01200000, 0x00000002 },
{ 0x20007000, 0x00000002 },
{ 0x00061000, 0x00000002 },
{ 0x0120751b, 0x00000002 },
{ 0x8040750a, 0x00000002 },
{ 0x8040750b, 0x00000002 },
{ 0x00110000, 0x00000002 },
{ 0x000380e5, 0x00000002 },
{ 0x000000c6, 0x0000001c },
{ 0x000610ab, 0x00000018 },
{ 0x844075bd, 0x00000002 },
{ 0x000610aa, 0x00000018 },
{ 0x840075bb, 0x00000002 },
{ 0x000610ab, 0x00000018 },
{ 0x844075bc, 0x00000002 },
{ 0x000000c9, 0x00000004 },
{ 0x804075bd, 0x00000002 },
{ 0x800075bb, 0x00000002 },
{ 0x804075bc, 0x00000002 },
{ 0x00108000, 0x00000002 },
{ 0x01400000, 0x00000002 },
{ 0x006000cd, 0x0000000c },
{ 0x20c07000, 0x00000020 },
{ 0x000000cf, 0x00000012 },
{ 0x00800000, 0x00000006 },
{ 0x0080751d, 0x00000006 },
{ 0000000000, 0000000000 },
{ 0x0000775c, 0x00000002 },
{ 0x00a05000, 0x00000002 },
{ 0x00661000, 0x00000002 },
{ 0x0460275d, 0x00000020 },
{ 0x00004000, 0000000000 },
{ 0x01e00830, 0x00000002 },
{ 0x21007000, 0000000000 },
{ 0x6464614d, 0000000000 },
{ 0x69687420, 0000000000 },
{ 0x00000073, 0000000000 },
{ 0000000000, 0000000000 },
{ 0x00005000, 0x00000002 },
{ 0x000380d0, 0x00000002 },
{ 0x040025e0, 0x00000002 },
{ 0x000075e1, 0000000000 },
{ 0x00000001, 0000000000 },
{ 0x000380e0, 0x00000002 },
{ 0x04002394, 0x00000002 },
{ 0x00005000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0x00000008, 0000000000 },
{ 0x00000004, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
};
CARD32 r200_cp_microcode[][2] = {
{ 0x21007000, 0000000000 },
{ 0x20007000, 0000000000 },
{ 0x000000ab, 0x00000004 },
{ 0x000000af, 0x00000004 },
{ 0x66544a49, 0000000000 },
{ 0x49494174, 0000000000 },
{ 0x54517d83, 0000000000 },
{ 0x498d8b64, 0000000000 },
{ 0x49494949, 0000000000 },
{ 0x49da493c, 0000000000 },
{ 0x49989898, 0000000000 },
{ 0xd34949d5, 0000000000 },
{ 0x9dc90e11, 0000000000 },
{ 0xce9b9b9b, 0000000000 },
{ 0x000f0000, 0x00000016 },
{ 0x352e232c, 0000000000 },
{ 0x00000013, 0x00000004 },
{ 0x000f0000, 0x00000016 },
{ 0x352e272c, 0000000000 },
{ 0x000f0001, 0x00000016 },
{ 0x3239362f, 0000000000 },
{ 0x000077ef, 0x00000002 },
{ 0x00061000, 0x00000002 },
{ 0x00000020, 0x0000001a },
{ 0x00004000, 0x0000001e },
{ 0x00061000, 0x00000002 },
{ 0x00000020, 0x0000001a },
{ 0x00004000, 0x0000001e },
{ 0x00061000, 0x00000002 },
{ 0x00000020, 0x0000001a },
{ 0x00004000, 0x0000001e },
{ 0x00000016, 0x00000004 },
{ 0x0003802a, 0x00000002 },
{ 0x040067e0, 0x00000002 },
{ 0x00000016, 0x00000004 },
{ 0x000077e0, 0x00000002 },
{ 0x00065000, 0x00000002 },
{ 0x000037e1, 0x00000002 },
{ 0x040067e1, 0x00000006 },
{ 0x000077e0, 0x00000002 },
{ 0x000077e1, 0x00000002 },
{ 0x000077e1, 0x00000006 },
{ 0xffffffff, 0000000000 },
{ 0x10000000, 0000000000 },
{ 0x0003802a, 0x00000002 },
{ 0x040067e0, 0x00000006 },
{ 0x00007675, 0x00000002 },
{ 0x00007676, 0x00000002 },
{ 0x00007677, 0x00000002 },
{ 0x00007678, 0x00000006 },
{ 0x0003802b, 0x00000002 },
{ 0x04002676, 0x00000002 },
{ 0x00007677, 0x00000002 },
{ 0x00007678, 0x00000006 },
{ 0x0000002e, 0x00000018 },
{ 0x0000002e, 0x00000018 },
{ 0000000000, 0x00000006 },
{ 0x0000002f, 0x00000018 },
{ 0x0000002f, 0x00000018 },
{ 0000000000, 0x00000006 },
{ 0x01605000, 0x00000002 },
{ 0x00065000, 0x00000002 },
{ 0x00098000, 0x00000002 },
{ 0x00061000, 0x00000002 },
{ 0x64c0603d, 0x00000004 },
{ 0x00080000, 0x00000016 },
{ 0000000000, 0000000000 },
{ 0x0400251d, 0x00000002 },
{ 0x00007580, 0x00000002 },
{ 0x00067581, 0x00000002 },
{ 0x04002580, 0x00000002 },
{ 0x00067581, 0x00000002 },
{ 0x00000046, 0x00000004 },
{ 0x00005000, 0000000000 },
{ 0x00061000, 0x00000002 },
{ 0x0000750e, 0x00000002 },
{ 0x00019000, 0x00000002 },
{ 0x00011055, 0x00000014 },
{ 0x00000055, 0x00000012 },
{ 0x0400250f, 0x00000002 },
{ 0x0000504a, 0x00000004 },
{ 0x00007565, 0x00000002 },
{ 0x00007566, 0x00000002 },
{ 0x00000051, 0x00000004 },
{ 0x01e655b4, 0x00000002 },
{ 0x4401b0dc, 0x00000002 },
{ 0x01c110dc, 0x00000002 },
{ 0x2666705d, 0x00000018 },
{ 0x040c2565, 0x00000002 },
{ 0x0000005d, 0x00000018 },
{ 0x04002564, 0x00000002 },
{ 0x00007566, 0x00000002 },
{ 0x00000054, 0x00000004 },
{ 0x00401060, 0x00000008 },
{ 0x00101000, 0x00000002 },
{ 0x000d80ff, 0x00000002 },
{ 0x00800063, 0x00000008 },
{ 0x000f9000, 0x00000002 },
{ 0x000e00ff, 0x00000002 },
{ 0000000000, 0x00000006 },
{ 0x00000080, 0x00000018 },
{ 0x00000054, 0x00000004 },
{ 0x00007576, 0x00000002 },
{ 0x00065000, 0x00000002 },
{ 0x00009000, 0x00000002 },
{ 0x00041000, 0x00000002 },
{ 0x0c00350e, 0x00000002 },
{ 0x00049000, 0x00000002 },
{ 0x00051000, 0x00000002 },
{ 0x01e785f8, 0x00000002 },
{ 0x00200000, 0x00000002 },
{ 0x00600073, 0x0000000c },
{ 0x00007563, 0x00000002 },
{ 0x006075f0, 0x00000021 },
{ 0x20007068, 0x00000004 },
{ 0x00005068, 0x00000004 },
{ 0x00007576, 0x00000002 },
{ 0x00007577, 0x00000002 },
{ 0x0000750e, 0x00000002 },
{ 0x0000750f, 0x00000002 },
{ 0x00a05000, 0x00000002 },
{ 0x00600076, 0x0000000c },
{ 0x006075f0, 0x00000021 },
{ 0x000075f8, 0x00000002 },
{ 0x00000076, 0x00000004 },
{ 0x000a750e, 0x00000002 },
{ 0x0020750f, 0x00000002 },
{ 0x00600079, 0x00000004 },
{ 0x00007570, 0x00000002 },
{ 0x00007571, 0x00000002 },
{ 0x00007572, 0x00000006 },
{ 0x00005000, 0x00000002 },
{ 0x00a05000, 0x00000002 },
{ 0x00007568, 0x00000002 },
{ 0x00061000, 0x00000002 },
{ 0x00000084, 0x0000000c },
{ 0x00058000, 0x00000002 },
{ 0x0c607562, 0x00000002 },
{ 0x00000086, 0x00000004 },
{ 0x00600085, 0x00000004 },
{ 0x400070dd, 0000000000 },
{ 0x000380dd, 0x00000002 },
{ 0x00000093, 0x0000001c },
{ 0x00065095, 0x00000018 },
{ 0x040025bb, 0x00000002 },
{ 0x00061096, 0x00000018 },
{ 0x040075bc, 0000000000 },
{ 0x000075bb, 0x00000002 },
{ 0x000075bc, 0000000000 },
{ 0x00090000, 0x00000006 },
{ 0x00090000, 0x00000002 },
{ 0x000d8002, 0x00000006 },
{ 0x00005000, 0x00000002 },
{ 0x00007821, 0x00000002 },
{ 0x00007800, 0000000000 },
{ 0x00007821, 0x00000002 },
{ 0x00007800, 0000000000 },
{ 0x01665000, 0x00000002 },
{ 0x000a0000, 0x00000002 },
{ 0x000671cc, 0x00000002 },
{ 0x0286f1cd, 0x00000002 },
{ 0x000000a3, 0x00000010 },
{ 0x21007000, 0000000000 },
{ 0x000000aa, 0x0000001c },
{ 0x00065000, 0x00000002 },
{ 0x000a0000, 0x00000002 },
{ 0x00061000, 0x00000002 },
{ 0x000b0000, 0x00000002 },
{ 0x38067000, 0x00000002 },
{ 0x000a00a6, 0x00000004 },
{ 0x20007000, 0000000000 },
{ 0x01200000, 0x00000002 },
{ 0x20077000, 0x00000002 },
{ 0x01200000, 0x00000002 },
{ 0x20007000, 0000000000 },
{ 0x00061000, 0x00000002 },
{ 0x0120751b, 0x00000002 },
{ 0x8040750a, 0x00000002 },
{ 0x8040750b, 0x00000002 },
{ 0x00110000, 0x00000002 },
{ 0x000380dd, 0x00000002 },
{ 0x000000bd, 0x0000001c },
{ 0x00061096, 0x00000018 },
{ 0x844075bd, 0x00000002 },
{ 0x00061095, 0x00000018 },
{ 0x840075bb, 0x00000002 },
{ 0x00061096, 0x00000018 },
{ 0x844075bc, 0x00000002 },
{ 0x000000c0, 0x00000004 },
{ 0x804075bd, 0x00000002 },
{ 0x800075bb, 0x00000002 },
{ 0x804075bc, 0x00000002 },
{ 0x00108000, 0x00000002 },
{ 0x01400000, 0x00000002 },
{ 0x006000c4, 0x0000000c },
{ 0x20c07000, 0x00000020 },
{ 0x000000c6, 0x00000012 },
{ 0x00800000, 0x00000006 },
{ 0x0080751d, 0x00000006 },
{ 0x000025bb, 0x00000002 },
{ 0x000040c0, 0x00000004 },
{ 0x0000775c, 0x00000002 },
{ 0x00a05000, 0x00000002 },
{ 0x00661000, 0x00000002 },
{ 0x0460275d, 0x00000020 },
{ 0x00004000, 0000000000 },
{ 0x00007999, 0x00000002 },
{ 0x00a05000, 0x00000002 },
{ 0x00661000, 0x00000002 },
{ 0x0460299b, 0x00000020 },
{ 0x00004000, 0000000000 },
{ 0x01e00830, 0x00000002 },
{ 0x21007000, 0000000000 },
{ 0x00005000, 0x00000002 },
{ 0x00038042, 0x00000002 },
{ 0x040025e0, 0x00000002 },
{ 0x000075e1, 0000000000 },
{ 0x00000001, 0000000000 },
{ 0x000380d9, 0x00000002 },
{ 0x04007394, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
{ 0000000000, 0000000000 },
};
--- NEW FILE: ati_video.c ---
(This appears to be a binary file; contents omitted.)
--- NEW FILE: r128_composite.c ---
(This appears to be a binary file; contents omitted.)
Index: Makefile.am
===================================================================
RCS file: /cvs/xserver/xserver/hw/kdrive/ati/Makefile.am,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -d -r1.5 -r1.6
--- a/Makefile.am 30 Dec 2003 08:23:56 -0000 1.5
+++ b/Makefile.am 17 May 2004 20:18:02 -0000 1.6
@@ -9,7 +9,6 @@
r128_common.h \
r128_sarea.h \
radeon_common.h \
- radeon_composite.c \
radeon_sarea.h
endif
@@ -39,13 +38,18 @@
noinst_LIBRARIES = libati.a
libati_a_SOURCES = \
+ ati_cursor.c \
+ ati_dma.c \
+ ati_dma.h \
ati_draw.c \
ati_draw.h \
- ati_drawtmp.h \
+ ati_microcode.c \
ati.c \
ati.h \
ati_reg.h \
- r128_blendtmp.h \
+ r128_composite.c \
+ ati_video.c \
+ radeon_composite.c \
$(DRI_SOURCES)
Xati_SOURCES = \
Index: ati.c
===================================================================
RCS file: /cvs/xserver/xserver/hw/kdrive/ati/ati.c,v
retrieving revision 1.12
retrieving revision 1.13
diff -u -d -r1.12 -r1.13
--- a/ati.c 25 Jan 2004 01:30:33 -0000 1.12
+++ b/ati.c 17 May 2004 20:18:02 -0000 1.13
@@ -32,10 +32,16 @@
#include "ati_sarea.h"
#endif
-#define CAP_R128 0x1 /* If it's a Rage 128 */
-#define CAP_R100 0x2 /* If it's an r100 series radeon. */
-#define CAP_R200 0x3 /* If it's an r200 series radeon. */
-#define CAP_R300 0x4 /* If it's an r300 series radeon. */
+static Bool ATIIsAGP(ATICardInfo *atic);
+
+#define CAP_SERIESMASK 0xf
+#define CAP_R128 0x1 /* If it's a Rage 128 */
+#define CAP_R100 0x2 /* If it's an r100 series radeon. */
+#define CAP_R200 0x3 /* If it's an r200 series radeon. */
+#define CAP_R300 0x4 /* If it's an r300 series radeon. */
+
+#define CAP_FEATURESMASK 0xf0
+#define CAP_NOAGP 0x10 /* If it's a PCI-only card. */
struct pci_id_entry ati_pci_ids[] = {
{0x1002, 0x4136, 0x2, "ATI Radeon RS100"},
@@ -63,13 +69,13 @@
{0x1002, 0x4964, 0x2, "ATI Radeon RV250 Id"},
{0x1002, 0x4965, 0x2, "ATI Radeon RV250 Ie"},
{0x1002, 0x4966, 0x2, "ATI Radeon RV250 If"},
- {0x1002, 0x4967, 0x2, "ATI Radeon RV250 Ig"},
- {0x1002, 0x4c45, 0x1, "ATI Rage 128 LE"},
+ {0x1002, 0x4967, 0x2, "ATI Radeon R250 Ig"},
+ {0x1002, 0x4c45, 0x11, "ATI Rage 128 LE"},
{0x1002, 0x4c46, 0x1, "ATI Rage 128 LF"},
- {0x1002, 0x4c57, 0x2, "ATI Radeon RV200 LW"},
- {0x1002, 0x4c58, 0x2, "ATI Radeon RV200 LX"},
+ {0x1002, 0x4c57, 0x2, "ATI Radeon Mobiliy M7 RV200 LW (7500)"},
+ {0x1002, 0x4c58, 0x2, "ATI Radeon Mobiliy M7 RV200 LX (7500)"},
{0x1002, 0x4c59, 0x2, "ATI Radeon Mobility M6 LY"},
- {0x1002, 0x4c5a, 0x2, "ATI Radeon Mobility LZ"},
+ {0x1002, 0x4c5a, 0x2, "ATI Radeon Mobility M6 LZ"},
{0x1002, 0x4c64, 0x3, "ATI Radeon RV250 Ld"},
{0x1002, 0x4c65, 0x3, "ATI Radeon RV250 Le"},
{0x1002, 0x4c66, 0x3, "ATI Radeon Mobility M9 RV250 Lf"},
@@ -93,7 +99,7 @@
{0x1002, 0x5041, 0x1, "ATI Rage 128 PA"},
{0x1002, 0x5042, 0x1, "ATI Rage 128 PB"},
{0x1002, 0x5043, 0x1, "ATI Rage 128 PC"},
- {0x1002, 0x5044, 0x1, "ATI Rage 128 PD"},
+ {0x1002, 0x5044, 0x11, "ATI Rage 128 PD"},
{0x1002, 0x5045, 0x1, "ATI Rage 128 PE"},
{0x1002, 0x5046, 0x1, "ATI Rage 128 PF"},
{0x1002, 0x5047, 0x1, "ATI Rage 128 PG"},
@@ -105,9 +111,9 @@
{0x1002, 0x504d, 0x1, "ATI Rage 128 PM"},
{0x1002, 0x504e, 0x1, "ATI Rage 128 PN"},
{0x1002, 0x504f, 0x1, "ATI Rage 128 PO"},
- {0x1002, 0x5050, 0x1, "ATI Rage 128 PP"},
+ {0x1002, 0x5050, 0x11, "ATI Rage 128 PP"},
{0x1002, 0x5051, 0x1, "ATI Rage 128 PQ"},
- {0x1002, 0x5052, 0x1, "ATI Rage 128 PR"},
+ {0x1002, 0x5052, 0x11, "ATI Rage 128 PR"},
{0x1002, 0x5053, 0x1, "ATI Rage 128 PS"},
{0x1002, 0x5054, 0x1, "ATI Rage 128 PT"},
{0x1002, 0x5055, 0x1, "ATI Rage 128 PU"},
@@ -121,14 +127,14 @@
{0x1002, 0x5148, 0x3, "ATI Radeon R200 QH"},
{0x1002, 0x514c, 0x3, "ATI Radeon R200 QL"},
{0x1002, 0x514d, 0x3, "ATI Radeon R200 QM"},
- {0x1002, 0x5157, 0x2, "ATI Radeon RV200 QW"},
- {0x1002, 0x5158, 0x2, "ATI Radeon RV200 QX"},
+ {0x1002, 0x5157, 0x2, "ATI Radeon RV200 QW (7500)"},
+ {0x1002, 0x5158, 0x2, "ATI Radeon RV200 QX (7500)"},
{0x1002, 0x5159, 0x2, "ATI Radeon RV100 QY"},
{0x1002, 0x515a, 0x2, "ATI Radeon RV100 QZ"},
- {0x1002, 0x5245, 0x1, "ATI Rage 128 RE"},
+ {0x1002, 0x5245, 0x11, "ATI Rage 128 RE"},
{0x1002, 0x5246, 0x1, "ATI Rage 128 RF"},
{0x1002, 0x5247, 0x1, "ATI Rage 128 RG"},
- {0x1002, 0x524b, 0x1, "ATI Rage 128 RK"},
+ {0x1002, 0x524b, 0x11, "ATI Rage 128 RK"},
{0x1002, 0x524c, 0x1, "ATI Rage 128 RL"},
{0x1002, 0x5345, 0x1, "ATI Rage 128 SE"},
{0x1002, 0x5346, 0x1, "ATI Rage 128 SF"},
@@ -233,7 +239,7 @@
/* We demand identification by busid, not driver name */
atic->drmFd = drmOpen(NULL, atic->busid);
if (atic->drmFd < 0)
- ErrorF("Failed to open DRM. DMA won't be used.\n");
+ ErrorF("Failed to open DRM, DRI disabled.\n");
#endif /* USE_DRI */
card->driver = atic;
@@ -244,17 +250,20 @@
break;
}
}
-
- if (atic->pci_id->caps != CAP_R128)
+
+ if ((atic->pci_id->caps & CAP_SERIESMASK) != CAP_R128)
atic->is_radeon = TRUE;
- if (atic->pci_id->caps == CAP_R100)
+ if ((atic->pci_id->caps & CAP_SERIESMASK) == CAP_R100)
atic->is_r100 = TRUE;
- if (atic->pci_id->caps == CAP_R200)
+ if ((atic->pci_id->caps & CAP_SERIESMASK) == CAP_R200)
atic->is_r200 = TRUE;
- if (atic->pci_id->caps == CAP_R300)
+ if ((atic->pci_id->caps & CAP_SERIESMASK) == CAP_R300)
atic->is_r300 = TRUE;
- ErrorF("Using ATI card: %s at %s\n", atic->pci_id->name, atic->busid);
+ atic->is_agp = ATIIsAGP(atic);
+
+ ErrorF("Using ATI card: %s (%s) at %s\n", atic->pci_id->name,
+ atic->is_agp ? "AGP" : "PCI", atic->busid);
return TRUE;
}
@@ -284,7 +293,7 @@
return FALSE;
atis->atic = atic;
-
+ atis->screen = screen;
screen->driver = atis;
#ifdef KDRIVEFBDEV
@@ -313,11 +322,20 @@
}
screen->off_screen_base = screen_size;
+
+ /* Reserve the area for the monochrome cursor. */
+ if (screen->off_screen_base +
+ ATI_CURSOR_HEIGHT * ATI_CURSOR_PITCH * 3 <= screen->memory_size) {
+ atis->cursor.offset = screen->off_screen_base;
+ screen->off_screen_base += ATI_CURSOR_HEIGHT * ATI_CURSOR_PITCH * 2;
+ }
+
#if defined(USE_DRI) && defined(GLXEXT)
/* Reserve a static area for the back buffer the same size as the
* visible screen. XXX: This would be better initialized in ati_dri.c
- * when GLX is set up, but I'm not sure when the offscreen memory
- * manager gets set up.
+ * when GLX is set up, but the offscreen memory manager's allocations
+ * don't last through VT switches, while the kernel's understanding of
+ * offscreen locations does.
*/
atis->frontOffset = 0;
atis->frontPitch = screen->fb[0].byteStride;
@@ -365,11 +383,12 @@
* Composite operations, because glyphs aren't in real pixmaps and thus
* can't be migrated.
*/
- atis->scratch_size = 65536; /* big enough for 128x128 at 32bpp */
+ atis->scratch_size = 131072; /* big enough for 128x128 at 32bpp */
if (screen->off_screen_base + atis->scratch_size <= screen->memory_size)
{
atis->scratch_offset = screen->off_screen_base;
screen->off_screen_base += atis->scratch_size;
+ atis->scratch_next = atis->scratch_offset;
} else {
atis->scratch_size = 0;
}
@@ -383,6 +402,10 @@
ATIScreenInfo *atis = (ATIScreenInfo *)screen->driver;
ATICardInfo *atic = screen->card->driver;
+#ifdef XV
+ ATIFiniVideo(screen->pScreen);
+#endif
+
atic->backend_funcs.scrfini(screen);
xfree(atis);
screen->driver = 0;
@@ -391,13 +414,13 @@
Bool
ATIMapReg(KdCardInfo *card, ATICardInfo *atic)
{
- atic->reg_base = (CARD8 *)KdMapDevice(RADEON_REG_BASE(card),
- RADEON_REG_SIZE(card));
+ atic->reg_base = (CARD8 *)KdMapDevice(ATI_REG_BASE(card),
+ ATI_REG_SIZE(card));
if (atic->reg_base == NULL)
return FALSE;
- KdSetMappedMode(RADEON_REG_BASE(card), RADEON_REG_SIZE(card),
+ KdSetMappedMode(ATI_REG_BASE(card), ATI_REG_SIZE(card),
KD_MAPPED_MODE_REGISTERS);
return TRUE;
@@ -407,9 +430,9 @@
ATIUnmapReg(KdCardInfo *card, ATICardInfo *atic)
{
if (atic->reg_base) {
- KdResetMappedMode(RADEON_REG_BASE(card), RADEON_REG_SIZE(card),
+ KdResetMappedMode(ATI_REG_BASE(card), ATI_REG_SIZE(card),
KD_MAPPED_MODE_REGISTERS);
- KdUnmapDevice((void *)atic->reg_base, RADEON_REG_SIZE(card));
+ KdUnmapDevice((void *)atic->reg_base, ATI_REG_SIZE(card));
atic->reg_base = 0;
}
}
@@ -420,6 +443,9 @@
KdScreenPriv(pScreen);
ATICardInfo(pScreenPriv);
+#ifdef XV
+ ATIInitVideo(pScreen);
+#endif
return atic->backend_funcs.initScreen(pScreen);
}
@@ -525,7 +551,55 @@
return 1;
for (bits = 0; val != 0; val >>= 1, ++bits)
;
- return bits;
+ return bits - 1;
+}
+
+static Bool
+ATIIsAGP(ATICardInfo *atic)
+{
+ char *mmio = atic->reg_base;
+ CARD32 agp_command;
+ Bool is_agp = FALSE;
+
+ if (mmio == NULL)
+ return FALSE;
+
+ if (atic->is_radeon) {
+ /* XXX: Apparently this doesn't work. Maybe it needs to be done
+ * through the PCI config aperture then.
+ */
+ agp_command = MMIO_IN32(mmio, RADEON_REG_AGP_COMMAND);
+ MMIO_OUT32(mmio, RADEON_REG_AGP_COMMAND, agp_command |
+ RADEON_AGP_ENABLE);
+ if (MMIO_IN32(mmio, RADEON_REG_AGP_COMMAND) & RADEON_AGP_ENABLE)
+ is_agp = TRUE;
+ MMIO_OUT32(mmio, RADEON_REG_AGP_COMMAND, agp_command);
+ } else {
+ /* Don't know any way to detect R128 AGP automatically, so
+ * assume AGP for all cards not marked as PCI-only by XFree86.
+ */
+ if ((atic->pci_id->caps & CAP_FEATURESMASK) != CAP_NOAGP)
+ is_agp = TRUE;
+ }
+
+ return is_agp;
+}
+
+/* This function is required to work around a hardware bug in some (all?)
+ * revisions of the R300. This workaround should be called after every
+ * CLOCK_CNTL_INDEX register access. If not, register reads afterward
+ * may not be correct.
+ */
+void R300CGWorkaround(ATIScreenInfo *atis) {
+ ATICardInfo *atic = atis->atic;
+ char *mmio = atic->reg_base;
+ CARD32 save;
+
+ save = MMIO_IN32(mmio, ATI_REG_CLOCK_CNTL_INDEX);
+ MMIO_OUT32(mmio, ATI_REG_CLOCK_CNTL_INDEX, save & ~(0x3f |
+ ATI_PLL_WR_EN));
+ MMIO_IN32(mmio, ATI_REG_CLOCK_CNTL_INDEX);
+ MMIO_OUT32(mmio, ATI_REG_CLOCK_CNTL_INDEX, save);
}
KdCardFuncs ATIFuncs = {
@@ -542,11 +616,11 @@
ATIScreenFini, /* scrfini */
ATICardFini, /* cardfini */
- 0, /* initCursor */
- 0, /* enableCursor */
- 0, /* disableCursor */
- 0, /* finiCursor */
- 0, /* recolorCursor */
+ ATICursorInit, /* initCursor */
+ ATICursorEnable, /* enableCursor */
+ ATICursorDisable, /* disableCursor */
+ ATICursorFini, /* finiCursor */
+ ATIRecolorCursor, /* recolorCursor */
ATIDrawInit, /* initAccel */
ATIDrawEnable, /* enableAccel */
Index: ati.h
===================================================================
RCS file: /cvs/xserver/xserver/hw/kdrive/ati/ati.h,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- a/ati.h 25 Jan 2004 01:30:33 -0000 1.7
+++ b/ati.h 17 May 2004 20:18:02 -0000 1.8
@@ -26,7 +26,9 @@
#ifndef _ATI_H_
#define _ATI_H_
-#include "config.h"
+#ifdef HAVE_CONFIG_H
+#include <config.h>
+#endif
#ifdef KDRIVEFBDEV
#include <fbdev.h>
@@ -35,6 +37,8 @@
#include <vesa.h>
#endif
+#include "kxv.h"
+
#ifdef XF86DRI
#define USE_DRI
#include "libdrm.h"
@@ -46,8 +50,8 @@
#endif
#endif
-#define RADEON_REG_BASE(c) ((c)->attr.address[1])
-#define RADEON_REG_SIZE(c) (0x4000)
+#define ATI_REG_BASE(c) ((c)->attr.address[1])
+#define ATI_REG_SIZE(c) (0x4000)
#ifdef __powerpc__
@@ -82,6 +86,18 @@
#endif
+#define MMIO_OUT8(mmio, a, v) (*(VOL8 *)((mmio) + (a)) = (v))
+#define MMIO_IN8(mmio, a, v) (*(VOL8 *)((mmio) + (a)))
+
+#define INPLL(mmio, addr) \
+ (MMIO_OUT8(mmio, ATI_REG_CLOCK_CNTL_INDEX, addr), \
+ MMIO_IN32(mmio, ATI_REG_CLOCK_CNTL_DATA))
+
+#define OUTPLL(mmio, addr, val) do { \
+ MMIO_OUT8(mmio, ATI_REG_CLOCK_CNTL_INDEX, (addr) | ATI_PLL_WR_EN); \
+ MMIO_OUT32(mmio, ATI_REG_CLOCK_CNTL_DATA, val); \
+} while (0)
+
typedef volatile CARD8 VOL8;
typedef volatile CARD16 VOL16;
typedef volatile CARD32 VOL32;
@@ -125,6 +141,7 @@
Bool is_r100;
Bool is_r200;
Bool is_r300;
+ Bool is_agp;
char *busid;
#ifdef USE_DRI
int drmFd;
@@ -135,6 +152,48 @@
#define getATICardInfo(kd) ((ATICardInfo *) ((kd)->card->driver))
#define ATICardInfo(kd) ATICardInfo *atic = getATICardInfo(kd)
+typedef struct _ATICursor {
+ int width, height;
+ int xhot, yhot;
+
+ Bool has_cursor;
+ CursorPtr pCursor;
+ Pixel source, mask;
+ KdOffscreenArea *area;
+ CARD32 offset;
+} ATICursor;
+
+typedef struct _ATIPortPriv {
+ int brightness;
+ int saturation;
+ RegionRec clip;
+ Bool videoOn;
+ Time offTime;
+ Time freeTime;
+ CARD32 size;
+ KdOffscreenArea *off_screen;
+ DrawablePtr pDraw;
+ PixmapPtr pPixmap;
+
+ CARD32 src_offset;
+ CARD32 src_pitch;
+ CARD8 *src_addr;
+
+ int id;
+ int src_x1, src_y1, src_x2, src_y2;
+ int dst_x1, dst_y1, dst_x2, dst_y2;
+ int src_w, src_h, dst_w, dst_h;
+} ATIPortPrivRec, *ATIPortPrivPtr;
+
+typedef struct _dmaBuf {
+ int size;
+ int used;
+ void *address;
+#ifdef USE_DRI
+ drmBufPtr drmBuf;
+#endif
+} dmaBuf;
+
typedef struct _ATIScreenInfo {
union {
#ifdef KDRIVEFBDEV
@@ -145,20 +204,52 @@
#endif
} backend_priv;
KaaScreenInfoRec kaa;
+
ATICardInfo *atic;
+ KdScreenInfo *screen;
- Bool using_dri;
- Bool using_dma;
+ void (*save_blockhandler)(int screen, pointer blockData,
+ pointer timeout, pointer readmask);
- int scratch_offset;
- int scratch_size;
+ int scratch_offset;
+ int scratch_next;
+ int scratch_size;
+
+ ATICursor cursor;
+
+ KdVideoAdaptorPtr pAdaptor;
+ int num_texture_ports;
+
+ Bool using_pio; /* If we use decode DMA packets to MMIO. */
+ Bool using_pseudo; /* If we use MMIO to submit DMA packets. */
+ Bool using_dma; /* If we use non-DRI DMA to submit packets. */
+ Bool using_dri; /* If we use the DRM for DMA. */
+ Bool using_agp; /* If we are using AGP or not for DMA. */
+
+ KdOffscreenArea *dma_space; /* For "DMA" from framebuffer. */
+ void *agp_addr; /* Mapped AGP aperture */
+ int agp_size;
+ int agp_key; /* Key of AGP memory for DMA */
+ CARD32 *ring_addr; /* Beginning of ring buffer. */
+ int ring_write; /* Index of write ptr in ring. */
+ int ring_read; /* Index of read ptr in ring. */
+ int ring_len;
+
+
+ dmaBuf *indirectBuffer;
+ int indirectStart;
+
+ int mmio_avail;
+ int cce_pri_size;
+ int cce_pri_avail;
#ifdef USE_DRI
+ Bool dma_started;
+
drmSize registerSize;
drmHandle registerHandle;
drmHandle fbHandle;
- int IsAGP;
drmSize gartSize;
drmHandle agpMemHandle; /* Handle from drmAgpAlloc */
unsigned long gartOffset;
@@ -196,23 +287,9 @@
unsigned char *gartTex; /* Map */
int log2GARTTexGran;
- int CCEMode; /* CCE mode that server/clients use */
- int CPMode; /* CP mode that server/clients use */
- int CCEFifoSize; /* Size of the CCE command FIFO */
int DMAusecTimeout; /* CCE timeout in usecs */
- /* DMA 2D accleration */
- drmBufPtr indirectBuffer;
- int indirectStart;
-
- /* DRI screen private data */
- int fbX;
- int fbY;
- int backX;
- int backY;
- int depthX;
- int depthY;
-
+ /* DRI screen private data */
int frontOffset;
int frontPitch;
int backOffset;
@@ -240,13 +317,18 @@
#define getATIScreenInfo(kd) ((ATIScreenInfo *) ((kd)->screen->driver))
#define ATIScreenInfo(kd) ATIScreenInfo *atis = getATIScreenInfo(kd)
+/* ati.c */
Bool
ATIMapReg(KdCardInfo *card, ATICardInfo *atic);
void
ATIUnmapReg(KdCardInfo *card, ATICardInfo *atic);
-Bool
+void
+R300CGWorkaround(ATIScreenInfo *atis);
+
+/* ati_draw.c */
+void
ATIDrawSetup(ScreenPtr pScreen);
Bool
@@ -264,17 +346,54 @@
void
ATIDrawFini(ScreenPtr pScreen);
+/* ati_dri.c */
#ifdef USE_DRI
Bool
ATIDRIScreenInit(ScreenPtr pScreen);
void
ATIDRICloseScreen(ScreenPtr pScreen);
+
+void
+ATIDRIDMAStart(ScreenPtr pScreen);
+
+void
+ATIDRIDMAStop(ScreenPtr pScreen);
+
+void
+ATIDRIDispatchIndirect(ATIScreenInfo *atis, Bool discard);
+
+drmBufPtr
+ATIDRIGetBuffer(ATIScreenInfo *atis);
+
#endif /* USE_DRI */
+/* ati_cursor.c */
+Bool
+ATICursorInit(ScreenPtr pScreen);
+
+void
+ATICursorEnable(ScreenPtr pScreen);
+
+void
+ATICursorDisable(ScreenPtr pScreen);
+
+void
+ATICursorFini(ScreenPtr pScreen);
+
+void
+ATIRecolorCursor(ScreenPtr pScreen, int ndef, xColorItem *pdef);
+
int
ATILog2(int val);
+/* ati_video.c */
+Bool
+ATIInitVideo(ScreenPtr pScreen);
+
+void
+ATIFiniVideo(ScreenPtr pScreen);
+
extern KdCardFuncs ATIFuncs;
#endif /* _ATI_H_ */
Index: ati_draw.c
===================================================================
RCS file: /cvs/xserver/xserver/hw/kdrive/ati/ati_draw.c,v
retrieving revision 1.13
retrieving revision 1.14
diff -u -d -r1.13 -r1.14
--- a/ati_draw.c 11 Jan 2004 00:10:34 -0000 1.13
+++ b/ati_draw.c 17 May 2004 20:18:02 -0000 1.14
@@ -28,12 +28,8 @@
#endif
#include "ati.h"
#include "ati_reg.h"
+#include "ati_dma.h"
#include "ati_draw.h"
-#ifdef USE_DRI
-#include "radeon_common.h"
-#include "r128_common.h"
-#include "ati_sarea.h"
-#endif /* USE_DRI */
[...1071 lines suppressed...]
- ATIDMAStop(pScreen);
-
- if (atis->using_dri)
+#ifdef USE_DRI
+ if (atis->using_dri) {
ATIDRICloseScreen(pScreen);
+ atis->using_dri = FALSE;
+ }
#endif /* USE_DRI */
kaaDrawFini(pScreen);
@@ -600,7 +801,5 @@
KdScreenPriv(pScreen);
ATIScreenInfo(pScreenPriv);
- accel_atis = atis;
-
- ATIWaitIdle();
+ ATIWaitIdle(atis);
}
Index: ati_draw.h
===================================================================
RCS file: /cvs/xserver/xserver/hw/kdrive/ati/ati_draw.h,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -d -r1.5 -r1.6
--- a/ati_draw.h 25 Jan 2004 01:16:19 -0000 1.5
+++ b/ati_draw.h 17 May 2004 20:18:02 -0000 1.6
@@ -1,7 +1,5 @@
/*
- * $Id$
- *
- * Copyright © 2003 Eric Anholt
+ * Copyright © 2004 Eric Anholt
*
* Permission to use, copy, modify, distribute, and sell this software and its
* documentation for any purpose is hereby granted without fee, provided that
@@ -26,63 +24,69 @@
#ifndef _ATI_DRAW_H_
#define _ATI_DRAW_H_
-#ifdef USE_DRI
+Bool
+ATIGetOffsetPitch(ATIScreenInfo *atis, int bpp, CARD32 *pitch_offset,
+ int offset, int pitch);
-#define DMA_PACKET0( reg, n ) \
- (RADEON_CP_PACKET0 | ((n) << 16) | ((reg) >> 2))
+Bool
+ATIGetPixmapOffsetPitch(PixmapPtr pPix, CARD32 *pitch_offset);
-#define RING_LOCALS CARD32 *__head; int __count;
+Bool
+R128PrepareBlend(int op, PicturePtr pSrcPicture, PicturePtr pDstPicture,
+ PixmapPtr pSrc, PixmapPtr pDst);
-#define BEGIN_RING( n ) \
-do { \
- if (atis->indirectBuffer == NULL) { \
- atis->indirectBuffer = ATIDMAGetBuffer(); \
- atis->indirectStart = 0; \
- } else if ((atis->indirectBuffer->used + 4*(n)) > \
- atis->indirectBuffer->total) { \
- ATIDMAFlushIndirect(1); \
- } \
- __head = (pointer)((char *)atis->indirectBuffer->address + \
- atis->indirectBuffer->used); \
- __count = 0; \
-} while (0)
+void
+R128Blend(int srcX, int srcY, int dstX, int dstY, int width, int height);
-#define ADVANCE_RING() do { \
- atis->indirectBuffer->used += __count * (int)sizeof(CARD32); \
-} while (0)
+void
+R128DoneBlend(void);
-#define OUT_RING(x) do { \
- MMIO_OUT32(&__head[__count++], 0, (x)); \
-} while (0)
+Bool
+R128CheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
+ PicturePtr pDstPicture);
-#define OUT_RING_REG(reg, val) \
-do { \
- OUT_RING(DMA_PACKET0(reg, 0)); \
- OUT_RING(val); \
-} while (0)
+Bool
+R128PrepareComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
+ PicturePtr pDstPicture, PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst);
-drmBufPtr ATIDMAGetBuffer(void);
-void ATIDMAFlushIndirect(Bool discard);
-void ATIDMADispatchIndirect(Bool discard);
-void ATIDMAStart(ScreenPtr pScreen);
-void ATIDMAStop(ScreenPtr pScreen);
+void
+R128Composite(int srcX, int srcY, int maskX, int maskY, int dstX, int dstY,
+ int w, int h);
-Bool RadeonPrepareBlend(int op, PicturePtr pSrcPicture, PicturePtr pDstPicture,
- PixmapPtr pSrc, PixmapPtr pDst);
-void RadeonBlend(int srcX, int srcY, int dstX, int dstY, int width, int height);
-Bool RadeonPrepareComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
+void
+R128DoneComposite(void);
+
+Bool
+R100CheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
+ PicturePtr pDstPicture);
+
+Bool
+R100PrepareComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
PicturePtr pDstPicture, PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst);
-void RadeonDoneBlend(void);
-void RadeonComposite(int srcX, int srcY, int maskX, int maskY, int dstX,
+
+Bool
+R200CheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
+ PicturePtr pDstPicture);
+
+Bool
+R200PrepareComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
+ PicturePtr pDstPicture, PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst);
+
+void
+RadeonComposite(int srcX, int srcY, int maskX, int maskY, int dstX,
int dstY, int w, int h);
-void RadeonDoneComposite(void);
-void RadeonSwitchTo2D(void);
-void RadeonSwitchTo3D(void);
-#endif /* USE_DRI */
+void
+RadeonDoneComposite(void);
void
-ATIWaitIdle(void);
+RadeonSwitchTo2D(ATIScreenInfo *atis);
+
+void
+RadeonSwitchTo3D(ATIScreenInfo *atis);
+
+void
+ATIWaitIdle(ATIScreenInfo *atis);
#if 0
#define ATI_FALLBACK(x) \
Index: ati_dri.c
===================================================================
RCS file: /cvs/xserver/xserver/hw/kdrive/ati/ati_dri.c,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -d -r1.6 -r1.7
--- a/ati_dri.c 25 Jan 2004 05:31:24 -0000 1.6
+++ b/ati_dri.c 17 May 2004 20:18:02 -0000 1.7
@@ -28,6 +28,7 @@
#endif
#include "ati.h"
#include "ati_reg.h"
+#include "ati_dma.h"
#include "ati_dri.h"
#include "ati_dripriv.h"
#include "sarea.h"
@@ -67,8 +68,6 @@
if (depth != 16 && (depth != 24 || bpp != 32))
ErrorF("DRI GLX unsupported at %d/%d depth/bpp\n", depth, bpp);
- /* Same number of configs for 16 and 24bpp, so I factored this part out.
- */
if (atis->depthOffset != 0)
use_db = 1;
else
@@ -89,15 +88,15 @@
}
i = 0;
- if (depth == 16) {
- for (db = 0; db <= use_db; db++) {
- for (accum = 0; accum <= 1; accum++) {
- for (stencil = 0; stencil <= 1; stencil++) {
- pATIConfigPtrs[i] = &pATIConfigs[i];
-
- pConfigs[i].vid = (VisualID)(-1);
- pConfigs[i].class = -1;
- pConfigs[i].rgba = TRUE;
+ for (db = 0; db <= use_db; db++) {
+ for (accum = 0; accum <= 1; accum++) {
+ for (stencil = 0; stencil <= 1; stencil++) {
+ pATIConfigPtrs[i] = &pATIConfigs[i];
+
+ pConfigs[i].vid = (VisualID)(-1);
+ pConfigs[i].class = -1;
+ pConfigs[i].rgba = TRUE;
+ if (depth == 16) {
pConfigs[i].redSize = 5;
pConfigs[i].greenSize = 6;
pConfigs[i].blueSize = 5;
@@ -106,54 +105,7 @@
pConfigs[i].greenMask = 0x000007E0;
pConfigs[i].blueMask = 0x0000001F;
pConfigs[i].alphaMask = 0x00000000;
- if (accum) { /* Simulated in software */
- pConfigs[i].accumRedSize = 16;
- pConfigs[i].accumGreenSize = 16;
- pConfigs[i].accumBlueSize = 16;
- pConfigs[i].accumAlphaSize = 0;
- } else {
- pConfigs[i].accumRedSize = 0;
- pConfigs[i].accumGreenSize = 0;
- pConfigs[i].accumBlueSize = 0;
- pConfigs[i].accumAlphaSize = 0;
- }
- if (db)
- pConfigs[i].doubleBuffer = TRUE;
- else
- pConfigs[i].doubleBuffer = FALSE;
- pConfigs[i].stereo = FALSE;
- pConfigs[i].bufferSize = 16;
- pConfigs[i].depthSize = 16;
- if (stencil)
- pConfigs[i].stencilSize = 8;
- else
- pConfigs[i].stencilSize = 0;
- pConfigs[i].auxBuffers = 0;
- pConfigs[i].level = 0;
- if (accum) {
- pConfigs[i].visualRating = GLX_SLOW_CONFIG;
- } else {
- pConfigs[i].visualRating = GLX_NONE;
- }
- pConfigs[i].transparentPixel = GLX_NONE;
- pConfigs[i].transparentRed = 0;
- pConfigs[i].transparentGreen = 0;
- pConfigs[i].transparentBlue = 0;
- pConfigs[i].transparentAlpha = 0;
- pConfigs[i].transparentIndex = 0;
- i++;
- }
- }
- }
- } else {
- for (db = 0; db <= use_db; db++) {
- for (accum = 0; accum <= 1; accum++) {
- for (stencil = 0; stencil <= 1; stencil++) {
- pATIConfigPtrs[i] = &pATIConfigs[i];
-
- pConfigs[i].vid = (VisualID)(-1);
- pConfigs[i].class = -1;
- pConfigs[i].rgba = TRUE;
+ } else {
pConfigs[i].redSize = 8;
pConfigs[i].greenSize = 8;
pConfigs[i].blueSize = 8;
@@ -162,22 +114,34 @@
pConfigs[i].greenMask = 0x0000FF00;
pConfigs[i].blueMask = 0x000000FF;
pConfigs[i].alphaMask = 0xFF000000;
- if (accum) { /* Simulated in software */
- pConfigs[i].accumRedSize = 16;
- pConfigs[i].accumGreenSize = 16;
- pConfigs[i].accumBlueSize = 16;
- pConfigs[i].accumAlphaSize = 16;
- } else {
- pConfigs[i].accumRedSize = 0;
- pConfigs[i].accumGreenSize = 0;
- pConfigs[i].accumBlueSize = 0;
- pConfigs[i].accumAlphaSize = 0;
- }
- if (db)
- pConfigs[i].doubleBuffer = TRUE;
+ }
+ if (accum) { /* Simulated in software */
+ pConfigs[i].accumRedSize = 16;
+ pConfigs[i].accumGreenSize = 16;
+ pConfigs[i].accumBlueSize = 16;
+ if (depth == 16)
+ pConfigs[i].accumAlphaSize = 0;
else
- pConfigs[i].doubleBuffer = FALSE;
- pConfigs[i].stereo = FALSE;
+ pConfigs[i].accumAlphaSize = 16;
+ } else {
+ pConfigs[i].accumRedSize = 0;
+ pConfigs[i].accumGreenSize = 0;
+ pConfigs[i].accumBlueSize = 0;
+ pConfigs[i].accumAlphaSize = 0;
+ }
+ if (db)
+ pConfigs[i].doubleBuffer = TRUE;
+ else
+ pConfigs[i].doubleBuffer = FALSE;
+ pConfigs[i].stereo = FALSE;
+ if (depth == 16) {
+ pConfigs[i].bufferSize = 16;
+ pConfigs[i].depthSize = 16;
+ if (stencil)
+ pConfigs[i].stencilSize = 8;
+ else
+ pConfigs[i].stencilSize = 0;
+ } else {
pConfigs[i].bufferSize = 32;
if (stencil) {
pConfigs[i].depthSize = 24;
@@ -186,23 +150,23 @@
pConfigs[i].depthSize = 24;
pConfigs[i].stencilSize = 0;
}
- pConfigs[i].auxBuffers = 0;
- pConfigs[i].level = 0;
- if (accum) {
- pConfigs[i].visualRating = GLX_SLOW_CONFIG;
- } else {
- pConfigs[i].visualRating = GLX_NONE;
- }
- pConfigs[i].transparentPixel = GLX_NONE;
- pConfigs[i].transparentRed = 0;
- pConfigs[i].transparentGreen = 0;
- pConfigs[i].transparentBlue = 0;
- pConfigs[i].transparentAlpha = 0;
- pConfigs[i].transparentIndex = 0;
- i++;
- }
- }
}
+ pConfigs[i].auxBuffers = 0;
+ pConfigs[i].level = 0;
+ if (accum) {
+ pConfigs[i].visualRating = GLX_SLOW_CONFIG;
+ } else {
+ pConfigs[i].visualRating = GLX_NONE;
+ }
+ pConfigs[i].transparentPixel = GLX_NONE;
+ pConfigs[i].transparentRed = 0;
+ pConfigs[i].transparentGreen = 0;
+ pConfigs[i].transparentBlue = 0;
+ pConfigs[i].transparentAlpha = 0;
+ pConfigs[i].transparentIndex = 0;
+ i++;
+ }
+ }
}
atis->numVisualConfigs = numConfigs;
@@ -224,18 +188,18 @@
/* Initialize the ring buffer data */
atis->ringStart = atis->gartOffset;
- atis->ringMapSize = atis->ringSize*1024*1024 + DRM_PAGE_SIZE;
+ atis->ringMapSize = atis->ringSize * 1024 * 1024 + DRM_PAGE_SIZE;
atis->ringReadOffset = atis->ringStart + atis->ringMapSize;
atis->ringReadMapSize = DRM_PAGE_SIZE;
/* Reserve space for vertex/indirect buffers */
atis->bufStart = atis->ringReadOffset + atis->ringReadMapSize;
- atis->bufMapSize = atis->bufSize*1024*1024;
+ atis->bufMapSize = atis->bufSize * 1024 * 1024;
/* Reserve the rest for GART textures */
atis->gartTexStart = atis->bufStart + atis->bufMapSize;
- s = (atis->gartSize*1024*1024 - atis->gartTexStart);
+ s = (atis->gartSize * 1024 * 1024 - atis->gartTexStart);
l = ATILog2((s-1) / ATI_NR_TEX_REGIONS);
if (l < ATI_LOG_TEX_GRANULARITY) l = ATI_LOG_TEX_GRANULARITY;
atis->gartTexMapSize = (s >> l) << l;
@@ -258,10 +222,10 @@
ErrorF("[%s] %s handle = 0x%08lx\n", name, desc, *handle);
if (drmMap(fd, *handle, size, address) < 0) {
- ErrorF("[agp] Could not map %s\n", name, desc);
+ ErrorF("[%s] Could not map %s\n", name, desc);
return FALSE;
}
- ErrorF("[%s] %s mapped at 0x%08lx\n", name, desc, address);
+ ErrorF("[%s] %s mapped at 0x%08lx\n", name, desc, *address);
return TRUE;
}
@@ -280,6 +244,10 @@
unsigned long agpBase;
CARD32 cntl, chunk;
+ /* AGP DRI seems broken on my R128, not sure why. */
+ if (!atic->is_radeon)
+ return FALSE;
+
if (drmAgpAcquire(atic->drmFd) < 0) {
ErrorF("[agp] AGP not available\n");
return FALSE;
@@ -306,20 +274,20 @@
}
/* Workaround for some hardware bugs */
- /* XXX: Magic numbers */
- if (!atic->is_r200) {
- cntl = MMIO_IN32(mmio, RADEON_REG_AGP_CNTL) | 0x000e0000;
- MMIO_OUT32(mmio, RADEON_REG_AGP_CNTL, cntl);
+ if (atic->is_r100) {
+ cntl = MMIO_IN32(mmio, ATI_REG_AGP_CNTL);
+ MMIO_OUT32(mmio, ATI_REG_AGP_CNTL, cntl |
+ RADEON_PENDING_SLOTS_VAL | RADEON_PENDING_SLOTS_SEL);
}
- if ((ret = drmAgpAlloc(atic->drmFd, atis->gartSize*1024*1024, 0, NULL,
- &atis->agpMemHandle)) < 0) {
+ if ((ret = drmAgpAlloc(atic->drmFd, atis->gartSize * 1024 * 1024, 0,
+ NULL, &atis->agpMemHandle)) < 0) {
ErrorF("[agp] Out of memory (%d)\n", ret);
drmAgpRelease(atic->drmFd);
return FALSE;
}
ErrorF("[agp] %d kB allocated with handle 0x%08lx\n",
- atis->gartSize*1024, (long)atis->agpMemHandle);
+ atis->gartSize * 1024, (long)atis->agpMemHandle);
if (drmAgpBind(atic->drmFd, atis->agpMemHandle, atis->gartOffset) < 0) {
ErrorF("[agp] Could not bind\n");
@@ -350,30 +318,31 @@
return FALSE;
/* Initialize radeon/r128 AGP registers */
- cntl = MMIO_IN32(mmio, RADEON_REG_AGP_CNTL);
- cntl &= ~RADEON_AGP_APER_SIZE_MASK;
+ cntl = MMIO_IN32(mmio, ATI_REG_AGP_CNTL);
+ cntl &= ~ATI_AGP_APER_SIZE_MASK;
switch (atis->gartSize) {
- case 256: cntl |= RADEON_AGP_APER_SIZE_256MB; break;
- case 128: cntl |= RADEON_AGP_APER_SIZE_128MB; break;
- case 64: cntl |= RADEON_AGP_APER_SIZE_64MB; break;
- case 32: cntl |= RADEON_AGP_APER_SIZE_32MB; break;
- case 16: cntl |= RADEON_AGP_APER_SIZE_16MB; break;
- case 8: cntl |= RADEON_AGP_APER_SIZE_8MB; break;
- case 4: cntl |= RADEON_AGP_APER_SIZE_4MB; break;
+ case 256: cntl |= ATI_AGP_APER_SIZE_256MB; break;
+ case 128: cntl |= ATI_AGP_APER_SIZE_128MB; break;
+ case 64: cntl |= ATI_AGP_APER_SIZE_64MB; break;
+ case 32: cntl |= ATI_AGP_APER_SIZE_32MB; break;
+ case 16: cntl |= ATI_AGP_APER_SIZE_16MB; break;
+ case 8: cntl |= ATI_AGP_APER_SIZE_8MB; break;
+ case 4: cntl |= ATI_AGP_APER_SIZE_4MB; break;
default:
- ErrorF("[agp] Illegal aperture size %d kB\n", atis->gartSize*1024);
+ ErrorF("[agp] Illegal aperture size %d kB\n", atis->gartSize *
+ 1024);
return FALSE;
}
agpBase = drmAgpBase(atic->drmFd);
- MMIO_OUT32(mmio, RADEON_REG_AGP_BASE, agpBase);
- MMIO_OUT32(mmio, RADEON_REG_AGP_CNTL, cntl);
+ MMIO_OUT32(mmio, ATI_REG_AGP_BASE, agpBase);
+ MMIO_OUT32(mmio, ATI_REG_AGP_CNTL, cntl);
if (!atic->is_radeon) {
/* Disable Rage 128 PCIGART registers */
chunk = MMIO_IN32(mmio, R128_REG_BM_CHUNK_0_VAL);
chunk &= ~(R128_BM_PTR_FORCE_TO_PCI |
- R128_BM_PM4_RD_FORCE_TO_PCI |
- R128_BM_GLOBAL_FORCE_TO_PCI);
+ R128_BM_PM4_RD_FORCE_TO_PCI |
+ R128_BM_GLOBAL_FORCE_TO_PCI);
MMIO_OUT32(mmio, R128_REG_BM_CHUNK_0_VAL, chunk);
/* Ensure AGP GART is used (for now) */
@@ -395,14 +364,14 @@
ATIDRIInitGARTValues(pScreen);
- ret = drmScatterGatherAlloc(atic->drmFd, atis->gartSize*1024*1024,
+ ret = drmScatterGatherAlloc(atic->drmFd, atis->gartSize * 1024 * 1024,
&atis->pciMemHandle);
if (ret < 0) {
ErrorF("[pci] Out of memory (%d)\n", ret);
return FALSE;
}
ErrorF("[pci] %d kB allocated with handle 0x%08lx\n",
- atis->gartSize*1024, (long)atis->pciMemHandle);
+ atis->gartSize * 1024, (long)atis->pciMemHandle);
if (!ATIDRIAddAndMap(atic->drmFd, atis->ringStart, atis->ringMapSize,
DRM_SCATTER_GATHER, DRM_READ_ONLY | DRM_LOCKED | DRM_KERNEL,
@@ -432,7 +401,8 @@
chunk |= (R128_BM_PTR_FORCE_TO_PCI |
R128_BM_PM4_RD_FORCE_TO_PCI | R128_BM_GLOBAL_FORCE_TO_PCI);
MMIO_OUT32(mmio, R128_REG_BM_CHUNK_0_VAL, chunk);
- MMIO_OUT32(mmio, R128_REG_PCI_GART_PAGE, 0); /* Ensure PCI GART is used */
+ /* Ensure PCI GART is used */
+ MMIO_OUT32(mmio, R128_REG_PCI_GART_PAGE, 0);
}
return TRUE;
}
@@ -446,29 +416,28 @@
ATIScreenInfo(pScreenPriv);
ATICardInfo(pScreenPriv);
drmR128Init drmInfo;
+ int bpp = pScreenPriv->screen->fb[0].bitsPerPixel;
memset(&drmInfo, 0, sizeof(drmR128Init) );
drmInfo.func = DRM_R128_INIT_CCE;
drmInfo.sarea_priv_offset = sizeof(XF86DRISAREARec);
- drmInfo.is_pci = !atis->IsAGP;
- drmInfo.cce_mode = atis->CCEMode;
+ drmInfo.is_pci = !atic->is_agp;
+ drmInfo.cce_mode = R128_PM4_64BM_64VCBM_64INDBM;
drmInfo.cce_secure = TRUE;
- drmInfo.ring_size = atis->ringSize*1024*1024;
+ drmInfo.ring_size = atis->ringSize * 1024 * 1024;
drmInfo.usec_timeout = atis->DMAusecTimeout;
- drmInfo.fb_bpp = pScreenPriv->screen->fb[0].bitsPerPixel;
- drmInfo.depth_bpp = pScreenPriv->screen->fb[0].bitsPerPixel;
-
- /* XXX: pitches are in pixels on r128. */
drmInfo.front_offset = atis->frontOffset;
- drmInfo.front_pitch = atis->frontPitch;
-
+ drmInfo.front_pitch = atis->frontPitch / (bpp / 8);
drmInfo.back_offset = atis->backOffset;
- drmInfo.back_pitch = atis->backPitch;
+ drmInfo.back_pitch = atis->backPitch / (bpp / 8);
+ drmInfo.fb_bpp = bpp;
drmInfo.depth_offset = atis->depthOffset;
- drmInfo.depth_pitch = atis->depthPitch;
+ drmInfo.depth_pitch = atis->depthPitch / (bpp / 8);
+ drmInfo.depth_bpp = bpp;
+
drmInfo.span_offset = atis->spanOffset;
drmInfo.fb_offset = atis->fbHandle;
@@ -502,21 +471,20 @@
drmInfo.func = DRM_RADEON_INIT_CP;
drmInfo.sarea_priv_offset = sizeof(XF86DRISAREARec);
- drmInfo.is_pci = !atis->IsAGP;
- drmInfo.cp_mode = atis->CPMode;
- drmInfo.gart_size = atis->gartSize*1024*1024;
- drmInfo.ring_size = atis->ringSize*1024*1024;
+ drmInfo.is_pci = !atic->is_agp;
+ drmInfo.cp_mode = RADEON_CSQ_PRIBM_INDBM;
+ drmInfo.gart_size = atis->gartSize * 1024 * 1024;
+ drmInfo.ring_size = atis->ringSize * 1024 * 1024;
drmInfo.usec_timeout = atis->DMAusecTimeout;
- drmInfo.fb_bpp = pScreenPriv->screen->fb[0].bitsPerPixel;
- drmInfo.depth_bpp = pScreenPriv->screen->fb[0].bitsPerPixel;
-
drmInfo.front_offset = atis->frontOffset;
drmInfo.front_pitch = atis->frontPitch;
drmInfo.back_offset = atis->backOffset;
drmInfo.back_pitch = atis->backPitch;
+ drmInfo.fb_bpp = pScreenPriv->screen->fb[0].bitsPerPixel;
drmInfo.depth_offset = atis->depthOffset;
drmInfo.depth_pitch = atis->depthPitch;
+ drmInfo.depth_bpp = pScreenPriv->screen->fb[0].bitsPerPixel;
drmInfo.fb_offset = atis->fbHandle;
drmInfo.mmio_offset = atis->registerHandle;
@@ -547,7 +515,7 @@
else
size = R128_BUFFER_SIZE;
- if (atis->IsAGP)
+ if (atic->is_agp)
type = DRM_AGP_BUFFER;
else
type = DRM_SG_BUFFER;
@@ -607,14 +575,14 @@
if ((syncType==DRI_2D_SYNC) && (oldContextType==DRI_NO_CONTEXT) &&
(newContextType==DRI_2D_CONTEXT)) {
/* Exiting from Block Handler */
- if (atis->using_dma)
- ATIDMAFlushIndirect(1);
+ if (atis->dma_started)
+ ATIFlushIndirect(atis, 1);
}
}
static Bool ATIDRIFinishScreenInit(ScreenPtr pScreen);
-/* Initialize the screen-specific data structures for the DRI and the
+/* Initialize the screen-specific data structures for the Radeon or
Rage 128. This is the main entry point to the device-specific
initialization code. It calls device-independent DRI functions to
create the DRI data structures and initialize the DRI state. */
@@ -630,17 +598,12 @@
int devSareaSize;
drmSetVersion sv;
- /* XXX: Disable DRI clients for unsupported depths */
-
- if (atic->is_radeon) {
- atis->CPMode = RADEON_CSQ_PRIBM_INDBM;
- }
- else {
- atis->CCEMode = R128_PM4_64BM_64VCBM_64INDBM;
- atis->CCEFifoSize = 64;
+ if (pScreenPriv->screen->fb[0].depth < 16 ||
+ pScreenPriv->screen->fb[0].bitsPerPixel == 24) {
+ ErrorF("DRI unsupported at this depth/bpp, disabling.\n");
+ return FALSE;
}
- atis->IsAGP = FALSE; /* XXX */
atis->agpMode = 1;
atis->gartSize = 8;
atis->ringSize = 1;
@@ -674,7 +637,7 @@
* DRIScreenInit().
*/
pDRIInfo = DRICreateInfoRec();
- if (!pDRIInfo)
+ if (pDRIInfo == NULL)
return FALSE;
atis->pDRIInfo = pDRIInfo;
@@ -692,9 +655,8 @@
pDRIInfo->ddxDriverMajorVersion = 4;
pDRIInfo->ddxDriverMinorVersion = 0;
pDRIInfo->ddxDriverPatchVersion = 0;
- /* XXX: RADEON_FB_BASE(pScreenPriv->card); */
pDRIInfo->frameBufferPhysicalAddress =
- (unsigned long)pScreenPriv->screen->memory_base;
+ pScreenPriv->card->attr.address[0] & 0xfc000000;
pDRIInfo->frameBufferSize = pScreenPriv->screen->memory_size;
pDRIInfo->frameBufferStride = pScreenPriv->screen->fb[0].byteStride;
pDRIInfo->ddxDrawableTableEntry = SAREA_MAX_DRAWABLES;
@@ -705,12 +667,12 @@
*/
pDRIInfo->SAREASize = SAREA_MAX;
- if (!atic->is_radeon) {
- pDRIInfo->devPrivateSize = sizeof(R128DRIRec);
- devSareaSize = sizeof(R128SAREAPriv);
- } else {
+ if (atic->is_radeon) {
pDRIInfo->devPrivateSize = sizeof(RADEONDRIRec);
devSareaSize = sizeof(RADEONSAREAPriv);
+ } else {
+ pDRIInfo->devPrivateSize = sizeof(R128DRIRec);
+ devSareaSize = sizeof(R128SAREAPriv);
}
if (sizeof(XF86DRISAREARec) + devSareaSize > SAREA_MAX) {
@@ -751,8 +713,8 @@
/* Add a map for the MMIO registers that will be accessed by any
* DRI-based clients.
*/
- atis->registerSize = RADEON_REG_SIZE(atic);
- if (drmAddMap(atic->drmFd, RADEON_REG_BASE(pScreenPriv->screen->card),
+ atis->registerSize = ATI_REG_SIZE(pScreenPriv->screen->card);
+ if (drmAddMap(atic->drmFd, ATI_REG_BASE(pScreenPriv->screen->card),
atis->registerSize, DRM_REGISTERS, DRM_READ_ONLY,
&atis->registerHandle) < 0) {
ATIDRICloseScreen(pScreen);
@@ -765,14 +727,14 @@
&scratch_int, &scratch_int, &scratch_ptr);
/* Initialize AGP */
- if (atis->IsAGP && !ATIDRIAgpInit(pScreen)) {
- atis->IsAGP = FALSE;
+ if (atic->is_agp && !ATIDRIAgpInit(pScreen)) {
+ atic->is_agp = FALSE;
ErrorF("[agp] AGP failed to initialize; falling back to PCI mode.\n");
- ErrorF("[agp] Make sure your kernel's AGP support is loaded and functioning.");
+ ErrorF("[agp] Make sure your kernel's AGP support is loaded and functioning.\n");
}
/* Initialize PCIGART */
- if (!atis->IsAGP && !ATIDRIPciInit(pScreen)) {
+ if (!atic->is_agp && !ATIDRIPciInit(pScreen)) {
ATIDRICloseScreen(pScreen);
return FALSE;
}
@@ -797,9 +759,11 @@
R128DRIFinishScreenInit(ScreenPtr pScreen)
{
KdScreenPriv(pScreen);
+ ATICardInfo(pScreenPriv);
ATIScreenInfo(pScreenPriv);
R128SAREAPrivPtr pSAREAPriv;
R128DRIPtr pR128DRI;
+ int bpp = pScreenPriv->screen->fb[0].bitsPerPixel;
/* Initialize the kernel data structures */
if (!R128DRIKernelInit(pScreen)) {
@@ -816,9 +780,6 @@
/* Initialize IRQ */
ATIDRIIrqInit(pScreen);
- /* Initialize and start the CCE if required */
- ATIDMAStart(pScreen);
-
pSAREAPriv = (R128SAREAPrivPtr)DRIGetSAREAPrivate(pScreen);
memset(pSAREAPriv, 0, sizeof(*pSAREAPriv));
@@ -830,15 +791,15 @@
pR128DRI->depth = pScreenPriv->screen->fb[0].depth;
pR128DRI->bpp = pScreenPriv->screen->fb[0].bitsPerPixel;
- pR128DRI->IsPCI = !atis->IsAGP;
+ pR128DRI->IsPCI = !atic->is_agp;
pR128DRI->AGPMode = atis->agpMode;
pR128DRI->frontOffset = atis->frontOffset;
- pR128DRI->frontPitch = atis->frontPitch;
+ pR128DRI->frontPitch = atis->frontPitch / (bpp / 8);
pR128DRI->backOffset = atis->backOffset;
- pR128DRI->backPitch = atis->backPitch;
+ pR128DRI->backPitch = atis->backPitch / (bpp / 8);
pR128DRI->depthOffset = atis->depthOffset;
- pR128DRI->depthPitch = atis->depthPitch;
+ pR128DRI->depthPitch = atis->depthPitch / (bpp / 8);
pR128DRI->spanOffset = atis->spanOffset;
pR128DRI->textureOffset = atis->textureOffset;
pR128DRI->textureSize = atis->textureSize;
@@ -894,8 +855,6 @@
ErrorF("[drm] Failed to initialize GART heap manager\n");
}
- ATIDMAStart(pScreen);
-
/* Initialize the SAREA private data structure */
pSAREAPriv = (RADEONSAREAPrivPtr)DRIGetSAREAPrivate(pScreen);
memset(pSAREAPriv, 0, sizeof(*pSAREAPriv));
@@ -908,7 +867,7 @@
pRADEONDRI->depth = pScreenPriv->screen->fb[0].depth;
pRADEONDRI->bpp = pScreenPriv->screen->fb[0].bitsPerPixel;
- pRADEONDRI->IsPCI = !atis->IsAGP;
+ pRADEONDRI->IsPCI = !atic->is_agp;
pRADEONDRI->AGPMode = atis->agpMode;
pRADEONDRI->frontOffset = atis->frontOffset;
@@ -968,8 +927,6 @@
}
}
- atis->using_dri = TRUE;
-
return TRUE;
}
@@ -985,11 +942,17 @@
drmRadeonInit drmRadeonInfo;
if (atis->indirectBuffer != NULL) {
- ATIDMADispatchIndirect(1);
+ /* Flush any remaining commands and free indirect buffers.
+ * Two steps are used because ATIFlushIndirect gets a
+ * new buffer after discarding.
+ */
+ ATIFlushIndirect(atis, 1);
+ ATIDRIDispatchIndirect(atis, 1);
+ xfree(atis->indirectBuffer);
atis->indirectBuffer = NULL;
atis->indirectStart = 0;
}
- ATIDMAStop(pScreen);
+ ATIDRIDMAStop(pScreen);
if (atis->irqEnabled) {
drmCtlUninstHandler(atic->drmFd);
@@ -1055,7 +1018,7 @@
DRIDestroyInfoRec(atis->pDRIInfo);
atis->pDRIInfo = NULL;
}
- atis->using_dri = FALSE;
+
#ifdef GLXEXT
if (atis->pVisualConfigs) {
xfree(atis->pVisualConfigs);
@@ -1068,3 +1031,101 @@
#endif /* GLXEXT */
atic->drmFd = -1;
}
+
+void
+ATIDRIDMAStart(ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+ ATICardInfo(pScreenPriv);
+ ATIScreenInfo(pScreenPriv);
+ int ret;
+
+ if (atic->is_radeon)
+ ret = drmCommandNone(atic->drmFd, DRM_RADEON_CP_START);
+ else
+ ret = drmCommandNone(atic->drmFd, DRM_R128_CCE_START);
+
+ if (ret == 0)
+ atis->dma_started = TRUE;
+ else
+ ErrorF("%s: DMA start returned %d\n", __FUNCTION__, ret);
+}
+
+/* Attempts to idle the DMA engine and stops it. Note that the ioctl is the
+ * same for both R128 and Radeon, so we can just use the name of one of them.
+ */
+void
+ATIDRIDMAStop(ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+ ATICardInfo(pScreenPriv);
+ ATIScreenInfo(pScreenPriv);
+ drmRadeonCPStop stop;
+ int ret;
+
+ stop.flush = 1;
+ stop.idle = 1;
+ ret = drmCommandWrite(atic->drmFd, DRM_RADEON_CP_STOP, &stop,
+ sizeof(drmRadeonCPStop));
+
+ if (ret != 0 && errno == EBUSY) {
+ ErrorF("Failed to idle the DMA engine\n");
+
+ stop.idle = 0;
+ ret = drmCommandWrite(atic->drmFd, DRM_RADEON_CP_STOP, &stop,
+ sizeof(drmRadeonCPStop));
+ }
+ atis->dma_started = FALSE;
+}
+
+/* The R128 and Radeon Indirect ioctls differ only in the ioctl number */
+void
+ATIDRIDispatchIndirect(ATIScreenInfo *atis, Bool discard)
+{
+ ATICardInfo *atic = atis->atic;
+ drmBufPtr buffer = atis->indirectBuffer->drmBuf;
+ drmR128Indirect indirect;
+ int cmd;
+
+ indirect.idx = buffer->idx;
+ indirect.start = atis->indirectStart;
+ indirect.end = buffer->used;
+ indirect.discard = discard;
+ cmd = atic->is_radeon ? DRM_RADEON_INDIRECT : DRM_R128_INDIRECT;
+ drmCommandWriteRead(atic->drmFd, cmd, &indirect,
+ sizeof(drmR128Indirect));
+}
+
+/* Get an indirect buffer for the DMA 2D acceleration commands */
+drmBufPtr
+ATIDRIGetBuffer(ATIScreenInfo *atis)
+{
+ ATICardInfo *atic = atis->atic;
+ drmDMAReq dma;
+ drmBufPtr buf = NULL;
+ int indx = 0;
+ int size = 0;
+ int ret;
+
+ dma.context = atis->serverContext;
+ dma.send_count = 0;
+ dma.send_list = NULL;
+ dma.send_sizes = NULL;
+ dma.flags = 0;
+ dma.request_count = 1;
+ if (atis->atic->is_radeon)
+ dma.request_size = RADEON_BUFFER_SIZE;
+ else
+ dma.request_size = R128_BUFFER_SIZE;
+ dma.request_list = &indx;
+ dma.request_sizes = &size;
+ dma.granted_count = 0;
+
+ do {
+ ret = drmDMA(atic->drmFd, &dma);
+ } while (ret != 0);
+
+ buf = &atis->buffers->list[indx];
+ buf->used = 0;
+ return buf;
+}
Index: ati_reg.h
===================================================================
RCS file: /cvs/xserver/xserver/hw/kdrive/ati/ati_reg.h,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- a/ati_reg.h 30 Dec 2003 08:23:56 -0000 1.4
+++ b/ati_reg.h 17 May 2004 20:18:02 -0000 1.5
@@ -1,6 +1,4 @@
/*
- * $Id$
- *
* Copyright © 2003 Eric Anholt
*
* Permission to use, copy, modify, distribute, and sell this software and its
@@ -23,104 +21,489 @@
*/
/* $Header$ */
-/* Many of the Radeon register defines are the same for the r128 */
[...1606 lines suppressed...]
#define R128_DATATYPE_AYUV_444 14
-#define R128_DATATYPE_ARGB_4444 15
+#define R128_DATATYPE_ARGB4444 15
-#define R128_PM4_NONPM4 (0 << 28)
-#define R128_PM4_192PIO (1 << 28)
-#define R128_PM4_192BM (2 << 28)
-#define R128_PM4_128PIO_64INDBM (3 << 28)
-#define R128_PM4_128BM_64INDBM (4 << 28)
-#define R128_PM4_64PIO_128INDBM (5 << 28)
-#define R128_PM4_64BM_128INDBM (6 << 28)
-#define R128_PM4_64PIO_64VCBM_64INDBM (7 << 28)
-#define R128_PM4_64BM_64VCBM_64INDBM (8 << 28)
-#define R128_PM4_64PIO_64VCPIO_64INDPIO (15 << 28)
+#define R128_AGP_OFFSET 0x02000000
+
+#define R128_WATERMARK_L 16
+#define R128_WATERMARK_M 8
+#define R128_WATERMARK_N 8
+#define R128_WATERMARK_K 128
Index: radeon_composite.c
===================================================================
RCS file: /cvs/xserver/xserver/hw/kdrive/ati/radeon_composite.c,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- a/radeon_composite.c 25 Jan 2004 01:30:33 -0000 1.7
+++ b/radeon_composite.c 17 May 2004 20:18:02 -0000 1.8
@@ -28,96 +28,148 @@
#endif
#include "ati.h"
#include "ati_reg.h"
+#include "ati_dma.h"
#include "ati_draw.h"
-#include "radeon_common.h"
-#include "r128_common.h"
-#include "ati_sarea.h"
-
-#define TAG(x) x##DMA
-#define LOCALS RING_LOCALS; \
- (void)atic;
-#define BEGIN(x) BEGIN_RING(x * 2)
-#define OUT_REG(reg, val) OUT_RING_REG(reg, val)
-#define END() ADVANCE_RING()
extern ATIScreenInfo *accel_atis;
-static CARD32 RadeonBlendOp[] = {
+struct blendinfo {
+ Bool dst_alpha;
+ Bool src_alpha;
+ CARD32 blend_cntl;
+};
+
+static struct blendinfo RadeonBlendOp[] = {
/* Clear */
- RADEON_SRC_BLEND_GL_ZERO | RADEON_DST_BLEND_GL_ZERO,
+ {0, 0, RADEON_SBLEND_GL_ZERO | RADEON_DBLEND_GL_ZERO},
/* Src */
- RADEON_SRC_BLEND_GL_ONE | RADEON_DST_BLEND_GL_ZERO,
+ {0, 0, RADEON_SBLEND_GL_ONE | RADEON_DBLEND_GL_ZERO},
/* Dst */
- RADEON_SRC_BLEND_GL_ZERO | RADEON_DST_BLEND_GL_ONE,
+ {0, 0, RADEON_SBLEND_GL_ZERO | RADEON_DBLEND_GL_ONE},
/* Over */
- RADEON_SRC_BLEND_GL_ONE | RADEON_DST_BLEND_GL_ONE_MINUS_SRC_ALPHA,
+ {0, 1, RADEON_SBLEND_GL_ONE | RADEON_DBLEND_GL_INV_SRC_ALPHA},
/* OverReverse */
- RADEON_SRC_BLEND_GL_ONE_MINUS_DST_ALPHA | RADEON_DST_BLEND_GL_ONE,
+ {1, 0, RADEON_SBLEND_GL_INV_DST_ALPHA | RADEON_DBLEND_GL_ONE},
/* In */
- RADEON_SRC_BLEND_GL_DST_ALPHA | RADEON_DST_BLEND_GL_ZERO,
+ {1, 0, RADEON_SBLEND_GL_DST_ALPHA | RADEON_DBLEND_GL_ZERO},
/* InReverse */
- RADEON_SRC_BLEND_GL_ZERO | RADEON_DST_BLEND_GL_SRC_ALPHA,
+ {0, 1, RADEON_SBLEND_GL_ZERO | RADEON_DBLEND_GL_SRC_ALPHA},
/* Out */
- RADEON_SRC_BLEND_GL_ONE_MINUS_DST_ALPHA | RADEON_DST_BLEND_GL_ZERO,
+ {1, 0, RADEON_SBLEND_GL_INV_DST_ALPHA | RADEON_DBLEND_GL_ZERO},
/* OutReverse */
- RADEON_SRC_BLEND_GL_ZERO | RADEON_DST_BLEND_GL_ONE_MINUS_SRC_ALPHA,
+ {0, 1, RADEON_SBLEND_GL_ZERO | RADEON_DBLEND_GL_INV_SRC_ALPHA},
/* Atop */
- RADEON_SRC_BLEND_GL_DST_ALPHA | RADEON_DST_BLEND_GL_ONE_MINUS_SRC_ALPHA,
+ {1, 1, RADEON_SBLEND_GL_DST_ALPHA | RADEON_DBLEND_GL_INV_SRC_ALPHA},
/* AtopReverse */
- RADEON_SRC_BLEND_GL_ONE_MINUS_DST_ALPHA | RADEON_DST_BLEND_GL_SRC_ALPHA,
+ {1, 1, RADEON_SBLEND_GL_INV_DST_ALPHA | RADEON_DBLEND_GL_SRC_ALPHA},
/* Xor */
- RADEON_SRC_BLEND_GL_ONE_MINUS_DST_ALPHA | RADEON_DST_BLEND_GL_ONE_MINUS_SRC_ALPHA,
+ {1, 1, RADEON_SBLEND_GL_INV_DST_ALPHA | RADEON_DBLEND_GL_INV_SRC_ALPHA},
/* Add */
- RADEON_SRC_BLEND_GL_ONE | RADEON_DST_BLEND_GL_ONE,
- /* Saturate */
- RADEON_SRC_BLEND_GL_SRC_ALPHA_SATURATE | RADEON_DST_BLEND_GL_ONE,
- /* DisjointClear */
- RADEON_SRC_BLEND_GL_ZERO | RADEON_DST_BLEND_GL_ZERO,
- /* DisjointSrc */
- RADEON_SRC_BLEND_GL_ONE | RADEON_DST_BLEND_GL_ZERO,
- /* DisjointDst */
- RADEON_SRC_BLEND_GL_ZERO | RADEON_DST_BLEND_GL_ONE,
+ {0, 0, RADEON_SBLEND_GL_ONE | RADEON_DBLEND_GL_ONE},
};
-static Bool
-RadeonTextureSetup(PicturePtr pPict, PixmapPtr pPix, int unit)
-{
- ATIScreenInfo *atis = accel_atis;
- ATICardInfo *atic = atis->atic;
- KdScreenPriv(pPix->drawable.pScreen);
- CARD32 txformat, txoffset, txpitch;
- int w = pPict->pDrawable->width;
- int h = pPict->pDrawable->height;
- LOCALS;
+struct formatinfo {
+ int fmt;
+ CARD32 card_fmt;
+};
- if ((w > 0x7ff) || (h > 0x7ff))
- ATI_FALLBACK(("Picture w/h too large (%dx%d)\n", w, h));
+/* Note on texture formats:
+ * TXFORMAT_Y8 expands to (Y,Y,Y,1). TXFORMAT_I8 expands to (I,I,I,I)
+ */
+static struct formatinfo R100TexFormats[] = {
+ {PICT_a8r8g8b8, RADEON_TXFORMAT_ARGB8888 | RADEON_TXFORMAT_ALPHA_IN_MAP},
+ {PICT_x8r8g8b8, RADEON_TXFORMAT_ARGB8888},
+ {PICT_r5g6b5, RADEON_TXFORMAT_RGB565},
+ {PICT_a1r5g5b5, RADEON_TXFORMAT_ARGB1555 | RADEON_TXFORMAT_ALPHA_IN_MAP},
+ {PICT_x1r5g5b5, RADEON_TXFORMAT_ARGB1555},
+ {PICT_a8, RADEON_TXFORMAT_I8 | RADEON_TXFORMAT_ALPHA_IN_MAP},
+};
- switch (pPict->format) {
+static struct formatinfo R200TexFormats[] = {
+ {PICT_a8r8g8b8, R200_TXFORMAT_ARGB8888 | R200_TXFORMAT_ALPHA_IN_MAP},
+ {PICT_x8r8g8b8, R200_TXFORMAT_ARGB8888},
+ {PICT_r5g6b5, R200_TXFORMAT_RGB565},
+ {PICT_a1r5g5b5, R200_TXFORMAT_ARGB1555 | R200_TXFORMAT_ALPHA_IN_MAP},
+ {PICT_x1r5g5b5, R200_TXFORMAT_ARGB1555},
+ {PICT_a8, R200_TXFORMAT_I8 | R200_TXFORMAT_ALPHA_IN_MAP},
+};
+
+/* Common Radeon setup code */
+
+static Bool
+RadeonGetDestFormat(PicturePtr pDstPicture, CARD32 *dst_format)
+{
+ switch (pDstPicture->format) {
case PICT_a8r8g8b8:
- txformat = RADEON_TXFORMAT_ARGB8888 |
- RADEON_TXFORMAT_ALPHA_IN_MAP;
- break;
case PICT_x8r8g8b8:
- txformat = RADEON_TXFORMAT_ARGB8888;
+ *dst_format = RADEON_COLOR_FORMAT_ARGB8888;
break;
case PICT_r5g6b5:
- txformat = RADEON_TXFORMAT_RGB565;
+ *dst_format = RADEON_COLOR_FORMAT_RGB565;
+ break;
+ case PICT_a1r5g5b5:
+ case PICT_x1r5g5b5:
+ *dst_format = RADEON_COLOR_FORMAT_ARGB1555;
break;
case PICT_a8:
- txformat = RADEON_TXFORMAT_I8 | RADEON_TXFORMAT_ALPHA_IN_MAP;
+ *dst_format = RADEON_COLOR_FORMAT_RGB8;
break;
default:
+ ATI_FALLBACK(("Unsupported dest format 0x%x\n",
+ pDstPicture->format));
+ }
+
+ return TRUE;
+}
+
+/* R100-specific code */
+
+static Bool
+R100CheckCompositeTexture(PicturePtr pPict, int unit)
+{
+ int w = pPict->pDrawable->width;
+ int h = pPict->pDrawable->height;
+ int i;
+
+ if ((w > 0x7ff) || (h > 0x7ff))
+ ATI_FALLBACK(("Picture w/h too large (%dx%d)\n", w, h));
+
+ for (i = 0; i < sizeof(R100TexFormats) / sizeof(R100TexFormats[0]); i++)
+ {
+ if (R100TexFormats[i].fmt == pPict->format)
+ break;
+ }
+ if (i == sizeof(R100TexFormats) / sizeof(R100TexFormats[0]))
ATI_FALLBACK(("Unsupported picture format 0x%x\n",
pPict->format));
+
+ if (pPict->repeat && ((w & (w - 1)) != 0 || (h & (h - 1)) != 0))
+ ATI_FALLBACK(("NPOT repeat unsupported (%dx%d)\n", w, h));
+
+ return TRUE;
+}
+
+static Bool
+R100TextureSetup(PicturePtr pPict, PixmapPtr pPix, int unit)
+{
+ ATIScreenInfo *atis = accel_atis;
+ KdScreenPriv(pPix->drawable.pScreen);
+ CARD32 txformat, txoffset, txpitch;
+ int w = pPict->pDrawable->width;
+ int h = pPict->pDrawable->height;
+ int i;
+ RING_LOCALS;
+
+ for (i = 0; i < sizeof(R100TexFormats) / sizeof(R100TexFormats[0]); i++)
+ {
+ if (R100TexFormats[i].fmt == pPict->format)
+ break;
}
- if (pPict->repeat) {
- if ((w & (w - 1)) != 0 || (h & (h - 1)) != 0)
- ATI_FALLBACK(("NPOT repeat unsupported (%dx%d)\n", w,
- h));
+ txformat = R100TexFormats[i].card_fmt;
- txformat |= (ATILog2(w) - 1) << RADEON_TXFORMAT_WIDTH_SHIFT;
- txformat |= (ATILog2(h) - 1) << RADEON_TXFORMAT_HEIGHT_SHIFT;
+ if (pPict->repeat) {
+ txformat |= ATILog2(w) << RADEON_TXFORMAT_WIDTH_SHIFT;
+ txformat |= ATILog2(h) << RADEON_TXFORMAT_HEIGHT_SHIFT;
} else
txformat |= RADEON_TXFORMAT_NON_POWER2;
txformat |= unit << 24; /* RADEON_TXFORMAT_ST_ROUTE_STQX */
@@ -125,155 +177,377 @@
txpitch = pPix->devKind;
txoffset = ((CARD8 *)pPix->devPrivate.ptr -
pScreenPriv->screen->memory_base);
-
+
if ((txoffset & 0x1f) != 0)
ATI_FALLBACK(("Bad texture offset 0x%x\n", txoffset));
if ((txpitch & 0x1f) != 0)
ATI_FALLBACK(("Bad texture pitch 0x%x\n", txpitch));
- /* RADEON_REG_PP_TXFILTER_0, RADEON_REG_PP_TXFORMAT_0,
+ /* RADEON_REG_PP_TXFILTER_0,
+ * RADEON_REG_PP_TXFORMAT_0,
* RADEON_REG_PP_TXOFFSET_0
*/
- BEGIN_RING(4);
- OUT_RING(DMA_PACKET0(RADEON_REG_PP_TXFILTER_0 + 0x18 * unit, 2));
+ BEGIN_DMA(4);
+ OUT_RING(DMA_PACKET0(RADEON_REG_PP_TXFILTER_0 + 0x18 * unit, 3));
OUT_RING(0);
OUT_RING(txformat);
OUT_RING(txoffset);
- ADVANCE_RING();
+ END_DMA();
- /* RADEON_REG_PP_TEX_SIZE_0, RADEON_REG_PP_TEX_PITCH_0 */
- BEGIN_RING(3);
- OUT_RING(DMA_PACKET0(RADEON_REG_PP_TEX_SIZE_0 + 0x8 * unit, 1));
+ /* RADEON_REG_PP_TEX_SIZE_0,
+ * RADEON_REG_PP_TEX_PITCH_0
+ */
+ BEGIN_DMA(3);
+ OUT_RING(DMA_PACKET0(RADEON_REG_PP_TEX_SIZE_0 + 0x8 * unit, 2));
OUT_RING((pPix->drawable.width - 1) |
((pPix->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT));
OUT_RING(txpitch - 32);
- ADVANCE_RING();
+ END_DMA();
return TRUE;
}
Bool
-RadeonPrepareComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
+R100CheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
+ PicturePtr pDstPicture)
+{
+ CARD32 tmp1;
+
+ /* Check for unsupported compositing operations. */
+ if (op >= sizeof(RadeonBlendOp) / sizeof(RadeonBlendOp[0]))
+ ATI_FALLBACK(("Unsupported Composite op 0x%x\n", op));
+ if (pSrcPicture->transform)
+ ATI_FALLBACK(("Source transform unsupported.\n"));
+ if (pMaskPicture != NULL && pMaskPicture->transform)
+ ATI_FALLBACK(("Mask transform unsupported.\n"));
+ if (pMaskPicture != NULL && pMaskPicture->componentAlpha &&
+ RadeonBlendOp[op].src_alpha)
+ ATI_FALLBACK(("Component alpha not supported with source "
+ "alpha blending.\n"));
+ if (pDstPicture->pDrawable->width >= (1 << 11) ||
+ pDstPicture->pDrawable->height >= (1 << 11))
+ ATI_FALLBACK(("Dest w/h too large (%d,%d).\n",
+ pDstPicture->pDrawable->width,
+ pDstPicture->pDrawable->height));
+
+ if (!R100CheckCompositeTexture(pSrcPicture, 0))
+ return FALSE;
+ if (pMaskPicture != NULL && !R100CheckCompositeTexture(pMaskPicture, 1))
+ return FALSE;
+
+ if (!RadeonGetDestFormat(pDstPicture, &tmp1))
+ return FALSE;
+
+ return TRUE;
+}
+
+Bool
+R100PrepareComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
PicturePtr pDstPicture, PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst)
{
KdScreenPriv(pDst->drawable.pScreen);
ATIScreenInfo(pScreenPriv);
- ATICardInfo(pScreenPriv);
CARD32 dst_format, dst_offset, dst_pitch;
- CARD32 pp_cntl;
+ CARD32 pp_cntl, blendcntl, cblend, ablend;
int pixel_shift;
- LOCALS;
+ RING_LOCALS;
+
+ accel_atis = atis;
+
+ RadeonGetDestFormat(pDstPicture, &dst_format);
+ pixel_shift = pDst->drawable.bitsPerPixel >> 4;
+
+ dst_offset = ((CARD8 *)pDst->devPrivate.ptr -
+ pScreenPriv->screen->memory_base);
+ dst_pitch = pDst->devKind;
+ if ((dst_offset & 0x0f) != 0)
+ ATI_FALLBACK(("Bad destination offset 0x%x\n", dst_offset));
+ if (((dst_pitch >> pixel_shift) & 0x7) != 0)
+ ATI_FALLBACK(("Bad destination pitch 0x%x\n", dst_pitch));
+
+ if (!R100TextureSetup(pSrcPicture, pSrc, 0))
+ return FALSE;
+ pp_cntl = RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE;
+
+ if (pMask != NULL) {
+ if (!R100TextureSetup(pMaskPicture, pMask, 1))
+ return FALSE;
+ pp_cntl |= RADEON_TEX_1_ENABLE;
+ }
+
+ BEGIN_DMA(14);
+ OUT_REG(ATI_REG_WAIT_UNTIL,
+ RADEON_WAIT_HOST_IDLECLEAN | RADEON_WAIT_2D_IDLECLEAN);
+
+ /* RADEON_REG_PP_CNTL,
+ * RADEON_REG_RB3D_CNTL,
+ * RADEON_REG_RB3D_COLOROFFSET
+ */
+ OUT_RING(DMA_PACKET0(RADEON_REG_PP_CNTL, 3));
+ OUT_RING(pp_cntl);
+ OUT_RING(dst_format | RADEON_ALPHA_BLEND_ENABLE);
+ OUT_RING(dst_offset);
+
+ OUT_REG(RADEON_REG_RB3D_COLORPITCH, dst_pitch >> pixel_shift);
+
+ /* IN operator: Multiply src by mask components or mask alpha.
+ * BLEND_CTL_ADD is A * B + C.
+ * If a picture is a8, we have to explicitly zero its color values.
+ * If the destination is a8, we have to route the alpha to red, I think.
+ */
+ cblend = RADEON_BLEND_CTL_ADD | RADEON_CLAMP_TX |
+ RADEON_COLOR_ARG_C_ZERO;
+ ablend = RADEON_BLEND_CTL_ADD | RADEON_CLAMP_TX |
+ RADEON_ALPHA_ARG_C_ZERO;
+
+ if (pDstPicture->format == PICT_a8)
+ cblend |= RADEON_COLOR_ARG_A_T0_ALPHA;
+ else if (pSrcPicture->format == PICT_a8)
+ cblend |= RADEON_COLOR_ARG_A_ZERO;
+ else
+ cblend |= RADEON_COLOR_ARG_A_T0_COLOR;
+ ablend |= RADEON_ALPHA_ARG_A_T0_ALPHA;
+
+ if (pMask) {
+ if (pMaskPicture->componentAlpha &&
+ pDstPicture->format != PICT_a8)
+ cblend |= RADEON_COLOR_ARG_B_T1_COLOR;
+ else
+ cblend |= RADEON_COLOR_ARG_B_T1_ALPHA;
+ ablend |= RADEON_ALPHA_ARG_B_T1_ALPHA;
+ } else {
+ cblend |= RADEON_COLOR_ARG_B_ZERO | RADEON_COMP_ARG_B;
+ ablend |= RADEON_ALPHA_ARG_B_ZERO | RADEON_COMP_ARG_B;
+ }
+
+ OUT_REG(RADEON_REG_PP_TXCBLEND_0, cblend);
+ OUT_REG(RADEON_REG_PP_TXABLEND_0, ablend);
+
+ /* Op operator. */
+ blendcntl = RadeonBlendOp[op].blend_cntl;
+ if (PICT_FORMAT_A(pDstPicture->format) == 0 &&
+ RadeonBlendOp[op].dst_alpha) {
+ if ((blendcntl & RADEON_SBLEND_MASK) ==
+ RADEON_SBLEND_GL_DST_ALPHA)
+ blendcntl = (blendcntl & ~RADEON_SBLEND_MASK) |
+ RADEON_SBLEND_GL_ONE;
+ else if ((blendcntl & RADEON_SBLEND_MASK) ==
+ RADEON_SBLEND_GL_INV_DST_ALPHA)
+ blendcntl = (blendcntl & ~RADEON_SBLEND_MASK) |
+ RADEON_SBLEND_GL_ZERO;
+ }
+ OUT_REG(RADEON_REG_RB3D_BLENDCNTL, blendcntl);
+ END_DMA();
+
+ return TRUE;
+}
+
+static Bool
+R200CheckCompositeTexture(PicturePtr pPict, int unit)
+{
+ int w = pPict->pDrawable->width;
+ int h = pPict->pDrawable->height;
+ int i;
+
+ if ((w > 0x7ff) || (h > 0x7ff))
+ ATI_FALLBACK(("Picture w/h too large (%dx%d)\n", w, h));
+
+ for (i = 0; i < sizeof(R200TexFormats) / sizeof(R200TexFormats[0]); i++)
+ {
+ if (R200TexFormats[i].fmt == pPict->format)
+ break;
+ }
+ if (i == sizeof(R200TexFormats) / sizeof(R200TexFormats[0]))
+ ATI_FALLBACK(("Unsupported picture format 0x%x\n",
+ pPict->format));
+
+ if (pPict->repeat && ((w & (w - 1)) != 0 || (h & (h - 1)) != 0))
+ ATI_FALLBACK(("NPOT repeat unsupported (%dx%d)\n", w, h));
+
+ return TRUE;
+}
+static Bool
+R200TextureSetup(PicturePtr pPict, PixmapPtr pPix, int unit)
+{
+ ATIScreenInfo *atis = accel_atis;
+ KdScreenPriv(pPix->drawable.pScreen);
+ CARD32 txformat, txoffset, txpitch;
+ int w = pPict->pDrawable->width;
+ int h = pPict->pDrawable->height;
+ int i;
+ RING_LOCALS;
+
+ for (i = 0; i < sizeof(R200TexFormats) / sizeof(R200TexFormats[0]); i++)
+ {
+ if (R200TexFormats[i].fmt == pPict->format)
+ break;
+ }
+ txformat = R200TexFormats[i].card_fmt;
+
+ if (pPict->repeat) {
+ txformat |= ATILog2(w) << R200_TXFORMAT_WIDTH_SHIFT;
+ txformat |= ATILog2(h) << R200_TXFORMAT_HEIGHT_SHIFT;
+ } else
+ txformat |= R200_TXFORMAT_NON_POWER2;
+ txformat |= unit << R200_TXFORMAT_ST_ROUTE_SHIFT;
+
+ txpitch = pPix->devKind;
+ txoffset = ((CARD8 *)pPix->devPrivate.ptr -
+ pScreenPriv->screen->memory_base);
+
+ if ((txoffset & 0x1f) != 0)
+ ATI_FALLBACK(("Bad texture offset 0x%x\n", txoffset));
+ if ((txpitch & 0x1f) != 0)
+ ATI_FALLBACK(("Bad texture pitch 0x%x\n", txpitch));
+
+ /* R200_REG_PP_TXFILTER_0,
+ * R200_REG_PP_TXFORMAT_0,
+ * R200_REG_PP_TXFORMAT_X_0,
+ * R200_REG_PP_TXSIZE_0,
+ * R200_REG_PP_TXPITCH_0
+ */
+ BEGIN_DMA(6);
+ OUT_RING(DMA_PACKET0(R200_REG_PP_TXFILTER_0 + 0x20 * unit, 5));
+ OUT_RING(0);
+ OUT_RING(txformat);
+ OUT_RING(0);
+ OUT_RING((pPix->drawable.width - 1) |
+ ((pPix->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT)); /* XXX */
+ OUT_RING(txpitch - 32); /* XXX */
+ END_DMA();
+
+ BEGIN_DMA(2);
+ OUT_REG(R200_PP_TXOFFSET_0 + 0x18 * unit, txoffset);
+ END_DMA();
+
+ return TRUE;
+}
+
+Bool
+R200CheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
+ PicturePtr pDstPicture)
+{
+ CARD32 tmp1;
- /*ErrorF("RadeonPrepareComposite\n");*/
-
/* Check for unsupported compositing operations. */
if (op >= sizeof(RadeonBlendOp) / sizeof(RadeonBlendOp[0]))
ATI_FALLBACK(("Unsupported Composite op 0x%x\n", op));
if (pSrcPicture->transform)
ATI_FALLBACK(("Source transform unsupported.\n"));
- if (pMaskPicture && pMaskPicture->transform)
+ if (pMaskPicture != NULL && pMaskPicture->transform)
ATI_FALLBACK(("Mask transform unsupported.\n"));
+ if (pMaskPicture != NULL && pMaskPicture->componentAlpha &&
+ RadeonBlendOp[op].src_alpha)
+ ATI_FALLBACK(("Component alpha not supported with source "
+ "alpha blending.\n"));
- accel_atis = atis;
+ if (!R200CheckCompositeTexture(pSrcPicture, 0))
+ return FALSE;
+ if (pMaskPicture != NULL && !R200CheckCompositeTexture(pMaskPicture, 1))
+ return FALSE;
- switch (pDstPicture->format) {
- case PICT_r5g6b5:
- dst_format = RADEON_COLOR_FORMAT_RGB565;
- pixel_shift = 1;
- break;
- case PICT_a1r5g5b5:
- dst_format = RADEON_COLOR_FORMAT_ARGB1555;
- pixel_shift = 1;
- break;
- case PICT_a8r8g8b8:
- case PICT_x8r8g8b8:
- dst_format = RADEON_COLOR_FORMAT_ARGB8888;
- pixel_shift = 2;
- break;
- default:
- ATI_FALLBACK(("Unsupported dest format 0x%x\n",
- pDstPicture->format));
- }
+ if (!RadeonGetDestFormat(pDstPicture, &tmp1))
+ return FALSE;
+
+ return TRUE;
+}
+
+Bool
+R200PrepareComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
+ PicturePtr pDstPicture, PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst)
+{
+ KdScreenPriv(pDst->drawable.pScreen);
+ ATIScreenInfo(pScreenPriv);
+ CARD32 dst_format, dst_offset, dst_pitch;
+ CARD32 pp_cntl, blendcntl, cblend, ablend;
+ int pixel_shift;
+ RING_LOCALS;
+
+ RadeonGetDestFormat(pDstPicture, &dst_format);
+ pixel_shift = pDst->drawable.bitsPerPixel >> 4;
+
+ accel_atis = atis;
dst_offset = ((CARD8 *)pDst->devPrivate.ptr -
pScreenPriv->screen->memory_base);
dst_pitch = pDst->devKind;
- if ((dst_offset & 0xff) != 0)
+ if ((dst_offset & 0x0f) != 0)
ATI_FALLBACK(("Bad destination offset 0x%x\n", dst_offset));
if (((dst_pitch >> pixel_shift) & 0x7) != 0)
ATI_FALLBACK(("Bad destination pitch 0x%x\n", dst_pitch));
- if (!RadeonTextureSetup(pSrcPicture, pSrc, 0))
+ if (!R200TextureSetup(pSrcPicture, pSrc, 0))
return FALSE;
pp_cntl = RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE;
if (pMask != NULL) {
- if (!RadeonTextureSetup(pMaskPicture, pMask, 1))
+ if (!R200TextureSetup(pMaskPicture, pMask, 1))
return FALSE;
pp_cntl |= RADEON_TEX_1_ENABLE;
}
- BEGIN(2);
- OUT_REG(RADEON_REG_RE_TOP_LEFT, 0);
- OUT_REG(RADEON_REG_RE_WIDTH_HEIGHT, 0xffffffff);
- END();
+ BEGIN_DMA(34);
+ OUT_REG(ATI_REG_WAIT_UNTIL,
+ RADEON_WAIT_HOST_IDLECLEAN | RADEON_WAIT_2D_IDLECLEAN);
- BEGIN(11);
- OUT_REG(RADEON_REG_PP_CNTL, pp_cntl);
- OUT_REG(RADEON_REG_RB3D_CNTL, dst_format | RADEON_ALPHA_BLEND_ENABLE);
- /* COLORPITCH is multiples of 8 pixels, but located at the 3rd bit */
- OUT_REG(RADEON_REG_RB3D_COLORPITCH, (dst_pitch >> pixel_shift));
- OUT_REG(RADEON_REG_RB3D_COLOROFFSET, dst_offset);
- OUT_REG(RADEON_REG_RB3D_PLANEMASK, 0xffffffff);
- OUT_REG(RADEON_REG_SE_CNTL, RADEON_FFACE_CULL_CCW | RADEON_FFACE_SOLID |
- RADEON_VTX_PIX_CENTER_OGL);
- OUT_REG(RADEON_REG_SE_CNTL_STATUS, RADEON_TCL_BYPASS);
- OUT_REG(RADEON_REG_SE_COORD_FMT,
- RADEON_VTX_XY_PRE_MULT_1_OVER_W0 |
- RADEON_VTX_ST0_NONPARAMETRIC |
- RADEON_VTX_ST1_NONPARAMETRIC |
- RADEON_TEX1_W_ROUTING_USE_W0);
- if (pMask != NULL) {
- /* IN operator: Multiply src by mask components or mask alpha.
- * BLEND_CTL_ADD is A * B + C
- */
- if (pMaskPicture->componentAlpha)
- OUT_REG(RADEON_REG_PP_TXCBLEND_0,
- RADEON_COLOR_ARG_A_T0_COLOR |
- RADEON_COLOR_ARG_B_T1_COLOR |
- RADEON_COLOR_ARG_C_ZERO |
- RADEON_BLEND_CTL_ADD |
- RADEON_CLAMP_TX);
+ /* RADEON_REG_PP_CNTL,
+ * RADEON_REG_RB3D_CNTL,
+ * RADEON_REG_RB3D_COLOROFFSET
+ */
+ OUT_RING(DMA_PACKET0(RADEON_REG_PP_CNTL, 3));
+ OUT_RING(pp_cntl);
+ OUT_RING(dst_format | RADEON_ALPHA_BLEND_ENABLE);
+ OUT_RING(dst_offset);
+
+ OUT_REG(RADEON_REG_RB3D_COLORPITCH, dst_pitch >> pixel_shift);
+
+ /* IN operator: Multiply src by mask components or mask alpha.
+ * BLEND_CTL_ADD is A * B + C.
+ * If a picture is a8, we have to explicitly zero its color values.
+ * If the destination is a8, we have to route the alpha to red, I think.
+ */
+ cblend = R200_TXC_OP_MADD | R200_TXC_ARG_C_ZERO;
+ ablend = R200_TXA_OP_MADD | R200_TXA_ARG_C_ZERO;
+
+ if (pDstPicture->format == PICT_a8)
+ cblend |= R200_TXC_ARG_A_R0_ALPHA;
+ else if (pSrcPicture->format == PICT_a8)
+ cblend |= R200_TXC_ARG_A_ZERO;
+ else
+ cblend |= R200_TXC_ARG_A_R0_COLOR;
+ ablend |= R200_TXA_ARG_B_R0_ALPHA;
+
+ if (pMask) {
+ if (pMaskPicture->componentAlpha &&
+ pDstPicture->format != PICT_a8)
+ cblend |= R200_TXC_ARG_B_R1_COLOR;
else
- OUT_REG(RADEON_REG_PP_TXCBLEND_0,
- RADEON_COLOR_ARG_A_T0_COLOR |
- RADEON_COLOR_ARG_B_T1_ALPHA |
- RADEON_COLOR_ARG_C_ZERO |
- RADEON_BLEND_CTL_ADD |
- RADEON_CLAMP_TX);
- OUT_REG(RADEON_REG_PP_TXABLEND_0,
- RADEON_ALPHA_ARG_A_T0_ALPHA |
- RADEON_ALPHA_ARG_B_T1_ALPHA |
- RADEON_ALPHA_ARG_C_ZERO |
- RADEON_BLEND_CTL_ADD);
+ cblend |= R200_TXC_ARG_B_R1_ALPHA;
+ ablend |= R200_TXA_ARG_B_R1_ALPHA;
} else {
- OUT_REG(RADEON_REG_PP_TXCBLEND_0,
- RADEON_COLOR_ARG_A_ZERO |
- RADEON_COLOR_ARG_B_ZERO |
- RADEON_COLOR_ARG_C_T0_COLOR |
- RADEON_BLEND_CTL_ADD |
- RADEON_CLAMP_TX);
- OUT_REG(RADEON_REG_PP_TXABLEND_0,
- RADEON_ALPHA_ARG_A_ZERO |
- RADEON_ALPHA_ARG_B_ZERO |
- RADEON_ALPHA_ARG_C_T0_ALPHA |
- RADEON_BLEND_CTL_ADD);
+ cblend |= R200_TXC_ARG_B_ZERO | R200_TXC_COMP_ARG_B;
+ ablend |= R200_TXA_ARG_B_ZERO | R200_TXA_COMP_ARG_B;
}
- /* Op operator. */
- OUT_REG(RADEON_RB3D_BLENDCNTL, RadeonBlendOp[op]);
- END();
- RadeonSwitchTo3D();
+ OUT_REG(R200_REG_PP_TXCBLEND_0, cblend);
+ OUT_REG(R200_REG_PP_TXABLEND_0, ablend);
+ OUT_REG(R200_REG_PP_TXCBLEND2_0, 0);
+ OUT_REG(R200_REG_PP_TXABLEND2_0, 0);
+
+ /* Op operator. */
+ blendcntl = RadeonBlendOp[op].blend_cntl;
+ if (PICT_FORMAT_A(pDstPicture->format) == 0 &&
+ RadeonBlendOp[op].dst_alpha) {
+ blendcntl &= ~RADEON_SBLEND_MASK;
+ if ((blendcntl & RADEON_SBLEND_MASK) ==
+ RADEON_SBLEND_GL_DST_ALPHA)
+ blendcntl |= RADEON_SBLEND_GL_ONE;
+ else if ((blendcntl & RADEON_SBLEND_MASK) ==
+ RADEON_SBLEND_GL_INV_DST_ALPHA)
+ blendcntl |= RADEON_SBLEND_GL_ZERO;
+ }
+ OUT_REG(RADEON_REG_RB3D_BLENDCNTL, blendcntl);
+ END_DMA();
return TRUE;
}
@@ -289,7 +563,7 @@
union intfloat s1, t1;
};
-#define VTX_REG_COUNT 6
+#define VTX_DWORD_COUNT 6
#define VTX_OUT(vtx) \
do { \
@@ -299,8 +573,6 @@
OUT_RING(vtx.t0.i); \
OUT_RING(vtx.s1.i); \
OUT_RING(vtx.t1.i); \
- /*ErrorF("%f,%f %f,%f %f,%f\n", vtx.x.f, vtx.y.f, vtx.s0.f, \
- vtx.t0.f, vtx.s1.f, vtx.t1.f);*/ \
} while (0)
void
@@ -310,21 +582,10 @@
ATIScreenInfo *atis = accel_atis;
ATICardInfo *atic = atis->atic;
struct blend_vertex vtx[4];
- LOCALS;
+ RING_LOCALS;
- /*ErrorF("RadeonComposite %d %d %d %d %d %d\n", srcX, srcY, maskX, maskY,
- dstX, dstY, w, h);*/
- BEGIN_RING(3 + 4 * VTX_REG_COUNT);
- OUT_RING(RADEON_CP_PACKET3_3D_DRAW_IMMD |
- ((4 * VTX_REG_COUNT + 1) << 16));
- OUT_RING(RADEON_CP_VC_FRMT_XY |
- RADEON_CP_VC_FRMT_ST0 |
- RADEON_CP_VC_FRMT_ST1);
- OUT_RING(RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_FAN |
- RADEON_CP_VC_CNTL_PRIM_WALK_RING |
- RADEON_CP_VC_CNTL_MAOS_ENABLE |
- RADEON_CP_VC_CNTL_VTX_FMT_RADEON_MODE |
- (4 << RADEON_CP_VC_CNTL_NUM_SHIFT));
+ /*ErrorF("RadeonComposite (%d,%d) (%d,%d) (%d,%d) (%d,%d)\n",
+ srcX, srcY, maskX, maskY,dstX, dstY, w, h);*/
vtx[0].x.f = dstX;
vtx[0].y.f = dstY;
@@ -354,36 +615,36 @@
vtx[3].s1.f = maskX + w;
vtx[3].t1.f = maskY;
+ if (atic->is_r100) {
+ BEGIN_DMA(4 * VTX_DWORD_COUNT + 3);
+ OUT_RING(DMA_PACKET3(RADEON_CP_PACKET3_3D_DRAW_IMMD,
+ 4 * VTX_DWORD_COUNT + 2));
+ OUT_RING(RADEON_CP_VC_FRMT_XY |
+ RADEON_CP_VC_FRMT_ST0 |
+ RADEON_CP_VC_FRMT_ST1);
+ OUT_RING(RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_FAN |
+ RADEON_CP_VC_CNTL_PRIM_WALK_RING |
+ RADEON_CP_VC_CNTL_MAOS_ENABLE |
+ RADEON_CP_VC_CNTL_VTX_FMT_RADEON_MODE |
+ (4 << RADEON_CP_VC_CNTL_NUM_SHIFT));
+ } else {
+ BEGIN_DMA(4 * VTX_DWORD_COUNT + 2);
+ OUT_RING(DMA_PACKET3(R200_CP_PACKET3_3D_DRAW_IMMD_2,
+ 4 * VTX_DWORD_COUNT + 1));
+ OUT_RING(RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_FAN |
+ RADEON_CP_VC_CNTL_PRIM_WALK_RING |
+ (4 << RADEON_CP_VC_CNTL_NUM_SHIFT));
+ }
+
VTX_OUT(vtx[0]);
VTX_OUT(vtx[1]);
VTX_OUT(vtx[2]);
VTX_OUT(vtx[3]);
- ADVANCE_RING();
+ END_DMA();
}
void
RadeonDoneComposite(void)
{
- /*ErrorF("RadeonDoneComposite\n");*/
-}
-
-Bool
-RadeonPrepareBlend(int op, PicturePtr pSrcPicture, PicturePtr pDstPicture,
- PixmapPtr pSrc, PixmapPtr pDst)
-{
- return RadeonPrepareComposite(op, pSrcPicture, NULL, pDstPicture, pSrc,
- NULL, pDst);
-}
-
-void
-RadeonBlend(int srcX, int srcY, int dstX, int dstY, int width, int height)
-{
- RadeonComposite(srcX, srcY, 0, 0, dstX, dstY, width, height);
-}
-
-void
-RadeonDoneBlend(void)
-{
- RadeonDoneComposite();
}
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