xserver/hw/kdrive/ati ati.h, 1.13, 1.14 ati_draw.c, 1.27, 1.28 ati_reg.h, 1.13, 1.14 radeon_composite.c, 1.15, 1.16

Keith Packard xserver-commit@pdx.freedesktop.org
Mon Jan 24 18:39:50 PST 2005


Committed by: keithp

Update of /cvs/xserver/xserver/hw/kdrive/ati
In directory gabe:/tmp/cvs-serv32446

Modified Files:
	ati.h ati_draw.c ati_reg.h radeon_composite.c 
Log Message:
Add tracing.  Hack Radeon cache registers to use 3D addresses.  Works on M6

Index: ati.h
===================================================================
RCS file: /cvs/xserver/xserver/hw/kdrive/ati/ati.h,v
retrieving revision 1.13
retrieving revision 1.14
diff -u -d -r1.13 -r1.14
--- ati.h	12 Sep 2004 20:31:39 -0000	1.13
+++ ati.h	25 Jan 2005 02:39:48 -0000	1.14
@@ -343,6 +343,22 @@
 void
 R300CGWorkaround(ATIScreenInfo *atis);
 
+#define ATI_TRACE 0
+
+#if ATI_TRACE
+#define ENTER_DRAW(pix) ATIEnterDraw(pix, __FUNCTION__)
+#define LEAVE_DRAW(pix) ATILeaveDraw(pix, __FUNCTION__)
+
+void
+ATIEnterDraw (PixmapPtr pPixmap, char *function);
+
+void
+ATILeaveDraw (PixmapPtr pPixmap, char *function);
+#else
+#define ENTER_DRAW(pix)
+#define LEAVE_DRAW(pix)
+#endif
+
 /* ati_draw.c */
 void
 ATIDrawSetup(ScreenPtr pScreen);

Index: ati_draw.c
===================================================================
RCS file: /cvs/xserver/xserver/hw/kdrive/ati/ati_draw.c,v
retrieving revision 1.27
retrieving revision 1.28
diff -u -d -r1.27 -r1.28
--- ati_draw.c	22 Dec 2004 18:39:41 -0000	1.27
+++ ati_draw.c	25 Jan 2005 02:39:48 -0000	1.28
@@ -153,13 +153,16 @@
 		END_DMA();
 
 		if (atic->is_r100) {
-			BEGIN_DMA(4);
+			BEGIN_DMA(6);
 			OUT_REG(RADEON_REG_SE_CNTL_STATUS, RADEON_TCL_BYPASS);
 			OUT_REG(RADEON_REG_SE_COORD_FMT,
 			    RADEON_VTX_XY_PRE_MULT_1_OVER_W0 |
 			    RADEON_VTX_ST0_NONPARAMETRIC |
 			    RADEON_VTX_ST1_NONPARAMETRIC |
 			    RADEON_TEX1_W_ROUTING_USE_W0);
+			OUT_REG(RADEON_REG_RB3D_DSTCACHE_MODE, 
+				RADEON_RB2D_DC_2D_CACHE_AUTOFLUSH|
+				RADEON_RB2D_DC_3D_CACHE_AUTOFLUSH);
 			END_DMA();
 		} else {
 			BEGIN_DMA(16);
@@ -186,12 +189,14 @@
 {
 	RING_LOCALS;
 
+	ENTER_DRAW(0);
 	BEGIN_DMA(4);
 	OUT_REG(RADEON_REG_RB2D_DSTCACHE_CTLSTAT,
 		RADEON_RB2D_DC_FLUSH);
 	OUT_REG(ATI_REG_WAIT_UNTIL,
 	    RADEON_WAIT_HOST_IDLECLEAN | RADEON_WAIT_3D_IDLECLEAN);
 	END_DMA();
+	LEAVE_DRAW(0);
 }
 
 void
@@ -199,13 +204,51 @@
 {
 	RING_LOCALS;
 
+	ENTER_DRAW(0);
 	BEGIN_DMA(4);
 	OUT_REG(RADEON_REG_RB2D_DSTCACHE_CTLSTAT,
 		RADEON_RB2D_DC_FLUSH);
 	OUT_REG(ATI_REG_WAIT_UNTIL,
 	    RADEON_WAIT_HOST_IDLECLEAN | RADEON_WAIT_2D_IDLECLEAN);
 	END_DMA();
+	LEAVE_DRAW(0);
+}
+
+#if ATI_TRACE
+void
+ATIEnterDraw (PixmapPtr pPix, char *function)
+{
+    if (pPix)
+    {
+	KdScreenPriv(pPix->drawable.pScreen);
+	CARD32 offset;
+    
+	offset = ((CARD8 *)pPix->devPrivate.ptr -
+		  pScreenPriv->screen->memory_base);
+    
+	ErrorF ("Enter %s 0x%x\n", function, offset);
+    }
+    else
+	ErrorF ("Enter %s\n", function);
+}
+
+void
+ATILeaveDraw (PixmapPtr pPix, char *function)
+{
+    if (pPix)
+    {
+	KdScreenPriv(pPix->drawable.pScreen);
+	CARD32 offset;
+    
+	offset = ((CARD8 *)pPix->devPrivate.ptr -
+		  pScreenPriv->screen->memory_base);
+    
+	ErrorF ("Leave %s 0x%x\n", function, offset);
+    }
+    else
+	ErrorF ("Leave %s\n", function);
 }
+#endif
 
 /* Assumes that depth 15 and 16 can be used as depth 16, which is okay since we
  * require src and dest datatypes to be equal.
@@ -310,6 +353,8 @@
 	if (!ATIGetPixmapOffsetPitch(pPix, &dst_pitch_offset))
 		return FALSE;
 
+	ENTER_DRAW(pPix);
+
 	if (atic->is_radeon)
 		RadeonSwitchTo2D(atis);
 
@@ -344,12 +389,14 @@
 	END_DMA();
 #endif
 
+	LEAVE_DRAW(pPix);
 	return TRUE;
 }
 
 static void
 ATISolid(int x1, int y1, int x2, int y2)
 {
+	ENTER_DRAW(0);
 	ATIScreenInfo *atis = accel_atis;
 	RING_LOCALS;
 	
@@ -373,11 +420,14 @@
 	OUT_RING(((y2 - y1) << 16) | (x2 - x1));
 	END_DMA();
 #endif
+	LEAVE_DRAW(0);
 }
 
 static void
 ATIDoneSolid(void)
 {
+	ENTER_DRAW(0);
+	LEAVE_DRAW(0);
 }
 
 static Bool
@@ -405,6 +455,7 @@
 	if (!ATIGetPixmapOffsetPitch(pDst, &dst_pitch_offset))
 		return FALSE;
 
+	ENTER_DRAW (pDst);
 	if (atic->is_radeon)
 		RadeonSwitchTo2D(atis);
 
@@ -442,6 +493,7 @@
 	    (dy >= 0 ? ATI_DST_Y_TOP_TO_BOTTOM : 0));
 	END_DMA();
 #endif
+	LEAVE_DRAW(pDst);
 
 	return TRUE;
 }
@@ -508,6 +560,8 @@
 	Bool success;
 	RING_LOCALS;
 
+	ENTER_DRAW (pDst);
+	
 	dst_offset = ((CARD8 *)pDst->devPrivate.ptr -
 	    pScreenPriv->screen->memory_base);
 	dst_pitch = pDst->devKind;
@@ -534,6 +588,8 @@
 	if (atis->using_pio)
 		return FALSE;
 
+	LEAVE_DRAW (pDst);
+
 	/* XXX: Hostdata uploads aren't working yet. */
 	return FALSE;
 
@@ -545,7 +601,7 @@
 	if (atic->is_radeon) {
 		BEGIN_DMA(4);
 		OUT_REG(RADEON_REG_RB2D_DSTCACHE_CTLSTAT,
-		    RADEON_RB2D_DC_FLUSH);
+		    RADEON_RB2D_DC_FLUSH_ALL);
 		OUT_REG(ATI_REG_WAIT_UNTIL,
 		    RADEON_WAIT_2D_IDLECLEAN |
 		    RADEON_WAIT_3D_IDLECLEAN |
@@ -586,7 +642,7 @@
 	if (atic->is_radeon) {
 		BEGIN_DMA(4);
 		OUT_REG(RADEON_REG_RB2D_DSTCACHE_CTLSTAT,
-		    RADEON_RB2D_DC_FLUSH);
+		    RADEON_RB2D_DC_FLUSH_ALL);
 		OUT_REG(ATI_REG_WAIT_UNTIL,
 		    RADEON_WAIT_2D_IDLECLEAN |
 		    RADEON_WAIT_HOST_IDLECLEAN);
@@ -615,6 +671,7 @@
 	unsigned char *dst, *src;
 	RING_LOCALS;
 
+	ENTER_DRAW(pSrc);
 	/* Align width to log 2, useful for R128 composite.  This should be a
 	 * KAA flag we check for (and supported in kaa.c in general) since many
 	 * older bits of hardware are going to want POT pitches.
@@ -669,6 +726,7 @@
 		END_DMA();
 	}
 
+	LEAVE_DRAW(pSrc);
 	return TRUE;
 }
 
@@ -761,6 +819,7 @@
 	ATIDMASetup(pScreen);
 	ATIDrawSetup(pScreen);
 
+	atis->scratch_area = NULL;
 	atis->kaa.PrepareBlend = NULL;
 	atis->kaa.Blend = NULL;
 	atis->kaa.DoneBlend = NULL;
@@ -768,7 +827,10 @@
 	atis->kaa.PrepareComposite = NULL;
 	atis->kaa.Composite = NULL;
 	atis->kaa.DoneComposite = NULL;
+	atis->kaa.UploadToScreen = NULL;
+    	atis->kaa.UploadToScratch = NULL;
 
+#if 1
 	/* We can't dispatch 3d commands in PIO mode. */
 	if (!atis->using_pio) {
 		if (!atic->is_radeon) {
@@ -813,8 +875,8 @@
 	if (atis->scratch_area != NULL) {
 		atis->scratch_next = atis->scratch_area->offset;
 		atis->kaa.UploadToScratch = ATIUploadToScratch;
-	} else
-		atis->kaa.UploadToScratch = NULL;
+	}
+#endif
 
 	KdMarkSync(pScreen);
 }
@@ -850,5 +912,7 @@
 	KdScreenPriv(pScreen);
 	ATIScreenInfo(pScreenPriv);
 
+	ENTER_DRAW(0);
 	ATIWaitIdle(atis);
+	LEAVE_DRAW(0);
 }

Index: ati_reg.h
===================================================================
RCS file: /cvs/xserver/xserver/hw/kdrive/ati/ati_reg.h,v
retrieving revision 1.13
retrieving revision 1.14
diff -u -d -r1.13 -r1.14
--- ati_reg.h	20 Jan 2005 01:09:48 -0000	1.13
+++ ati_reg.h	25 Jan 2005 02:39:48 -0000	1.14
@@ -1715,7 +1715,26 @@
 # define R200_TXA_REPL_ARG_C_SHIFT		30
 # define R200_TXA_REPL_ARG_C_MASK		(3 << 30)
 
-#define RADEON_REG_RB2D_DSTCACHE_CTLSTAT	0x342c
+#define RADEON_REG_RB2D_DSTCACHE_MODE		0x3428
+#define RADEON_REG_RB3D_DSTCACHE_MODE		0x3258
+# define RADEON_RB2D_DC_CACHE_ENABLE		0
+# define RADEON_RB2D_DC_2D_CACHE_DISABLE	1
+# define RADEON_RB2D_DC_3D_CACHE_DISABLE	1
+# define RADEON_RB2D_DC_CACHE_DISABLE		3
+# define RADEON_RB2D_DC_2D_CACHE_LINESIZE_128	4
+# define RADEON_RB2D_DC_3D_CACHE_LINESIZE_128	8
+# define RADEON_RB2D_DC_2D_CACHE_AUTOFLUSH	0x100
+# define RADEON_RB2D_DC_3D_CACHE_AUTOFLUSH	0x200
+# define RADEON_RB2D_DC_FORCE_RMW		0x10000
+# define RADEON_RB2D_DC_DISABLE_RI_FILL		0x1000000
+# define RADEON_RB2D_DC_DISABLE_RI_READ		0x2000000
+
+/* XXX The 2D shadow isn't writable on the M6.  The right fix is to rename
+ * all uses, but Eric is doing that
+ */
+/* #define RADEON_REG_RB2D_DSTCACHE_CTLSTAT	0x342C */
+#define RADEON_REG_RB2D_DSTCACHE_CTLSTAT	0x325C
+#define RADEON_REG_RB3D_DSTCACHE_CTLSTAT	0x325C
 # define RADEON_RB2D_DC_FLUSH			(3 << 0)
 # define RADEON_RB2D_DC_FREE			(3 << 2)
 # define RADEON_RB2D_DC_FLUSH_ALL		0xf

Index: radeon_composite.c
===================================================================
RCS file: /cvs/xserver/xserver/hw/kdrive/ati/radeon_composite.c,v
retrieving revision 1.15
retrieving revision 1.16
diff -u -d -r1.15 -r1.16
--- radeon_composite.c	20 Jan 2005 07:28:02 -0000	1.15
+++ radeon_composite.c	25 Jan 2005 02:39:48 -0000	1.16
@@ -251,6 +251,9 @@
 	if (pMaskPicture != NULL && !R100CheckCompositeTexture(pMaskPicture, 1))
 		return FALSE;
 
+	if (pDstPicture->componentAlpha)
+		return FALSE;
+
 	if (!RadeonGetDestFormat(pDstPicture, &tmp1))
 		return FALSE;
 
@@ -293,6 +296,8 @@
 		is_transform[1] = FALSE;
 	}
 
+	ENTER_DRAW(pDst);
+	
 	RadeonSwitchTo3D(atis);
 
 	BEGIN_DMA(12);
@@ -357,6 +362,8 @@
 	OUT_REG(RADEON_REG_RB3D_BLENDCNTL, blendcntl);
 	END_DMA();
 
+	LEAVE_DRAW(pDst);
+
 	return TRUE;
 }
 
@@ -621,6 +628,8 @@
 	RING_LOCALS;
 	PictVector v;
 
+	ENTER_DRAW(0);
+	
 	/*ErrorF("RadeonComposite (%d,%d) (%d,%d) (%d,%d) (%d,%d)\n",
 	    srcX, srcY, maskX, maskY,dstX, dstY, w, h);*/
 
@@ -683,12 +692,16 @@
 	VTX_OUT(dstX + w, dstY + h, srcXend, srcYend, maskXend, maskYend);
 	VTX_OUT(dstX + w, dstY,     srcXend, srcY,    maskXend, maskY);
 
+	LEAVE_DRAW(0);
+
 	END_DMA();
 }
 
 void
 RadeonDoneComposite(void)
 {
+	ENTER_DRAW(0);
+	LEAVE_DRAW(0);
 }
 
 Bool



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