dri-devel January 2021

dri-devel@lists.freedesktop.org

322 participants
737 discussions

[PATCH] drm/amdkfd: dqm fence memory corruption
by Qu Huang 26 Mar '21

26 Mar '21

Amdgpu driver uses 4-byte data type as DQM fence memory, and transmits GPU address of fence memory to microcode through query status PM4 message. However, query status PM4 message definition and microcode processing are all processed according to 8 bytes. Fence memory only allocates 4 bytes of memory, but microcode does write 8 bytes of memory, so there is a memory corruption. Signed-off-by: Qu Huang <jinsdb(a)126.com> --- drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c index e686ce2..8b38d0c 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c @@ -1161,7 +1161,7 @@ static int start_cpsch(struct device_queue_manager *dqm) pr_debug("Allocating fence memory\n"); /* allocate fence memory on the gart */ - retval = kfd_gtt_sa_allocate(dqm->dev, sizeof(*dqm->fence_addr), + retval = kfd_gtt_sa_allocate(dqm->dev, sizeof(uint64_t), &dqm->fence_mem); if (retval) -- 1.8.3.1

2 3

[PATCH v5 1/6] mfd: rt4831: Adds support for Richtek RT4831 core
by cy_huang 25 Mar '21

25 Mar '21

From: ChiYuan Huang <cy_huang(a)richtek.com> This adds support Richtek RT4831 core. It includes four channel WLED driver and Display Bias Voltage outputs. Signed-off-by: ChiYuan Huang <cy_huang(a)richtek.com> --- since v5 - Rename file name from rt4831-core.c to rt4831.c - Change RICHTEK_VID to RICHTEK_VENDOR_ID. - Change gpio_desc nameing from 'enable' to 'enable_gpio' in probe. - Change variable 'val' to the meaningful name 'chip_id'. - Refine the error log when vendor id is not matched. - Remove of_match_ptr. since v2 - Refine Kconfig descriptions. - Add copyright. - Refine error logs in probe. - Refine comment lines in remove and shutdown. --- drivers/mfd/Kconfig | 10 +++++ drivers/mfd/Makefile | 1 + drivers/mfd/rt4831.c | 124 +++++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 135 insertions(+) create mode 100644 drivers/mfd/rt4831.c diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 8b99a13..dfb2640 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1088,6 +1088,16 @@ config MFD_RDC321X southbridge which provides access to GPIOs and Watchdog using the southbridge PCI device configuration space. +config MFD_RT4831 + tristate "Richtek RT4831 four channel WLED and Display Bias Voltage" + depends on I2C + select MFD_CORE + select REGMAP_I2C + help + This enables support for the Richtek RT4831 that includes 4 channel + WLED driving and Display Bias Voltage. It's commonly used to provide + power to the LCD display and LCD backlight. + config MFD_RT5033 tristate "Richtek RT5033 Power Management IC" depends on I2C diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 1780019..28d247b 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -235,6 +235,7 @@ obj-$(CONFIG_MFD_MENF21BMC) += menf21bmc.o obj-$(CONFIG_MFD_HI6421_PMIC) += hi6421-pmic-core.o obj-$(CONFIG_MFD_HI655X_PMIC) += hi655x-pmic.o obj-$(CONFIG_MFD_DLN2) += dln2.o +obj-$(CONFIG_MFD_RT4831) += rt4831.o obj-$(CONFIG_MFD_RT5033) += rt5033.o obj-$(CONFIG_MFD_SKY81452) += sky81452.o diff --git a/drivers/mfd/rt4831.c b/drivers/mfd/rt4831.c new file mode 100644 index 00000000..2bf8364 --- /dev/null +++ b/drivers/mfd/rt4831.c @@ -0,0 +1,124 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2020 Richtek Technology Corp. + * + * Author: ChiYuan Huang <cy_huang(a)richtek.com> + */ + +#include <linux/gpio/consumer.h> +#include <linux/i2c.h> +#include <linux/kernel.h> +#include <linux/mfd/core.h> +#include <linux/module.h> +#include <linux/regmap.h> + +#define RT4831_REG_REVISION 0x01 +#define RT4831_REG_ENABLE 0x08 +#define RT4831_REG_I2CPROT 0x15 + +#define RICHTEK_VENDOR_ID 0x03 +#define RT4831_VID_MASK GENMASK(1, 0) +#define RT4831_RESET_MASK BIT(7) +#define RT4831_I2CSAFETMR_MASK BIT(0) + +static const struct mfd_cell rt4831_subdevs[] = { + OF_MFD_CELL("rt4831-backlight", NULL, NULL, 0, 0, "richtek,rt4831-backlight"), + MFD_CELL_NAME("rt4831-regulator") +}; + +static bool rt4831_is_accessible_reg(struct device *dev, unsigned int reg) +{ + if (reg >= RT4831_REG_REVISION && reg <= RT4831_REG_I2CPROT) + return true; + return false; +} + +static const struct regmap_config rt4831_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = RT4831_REG_I2CPROT, + + .readable_reg = rt4831_is_accessible_reg, + .writeable_reg = rt4831_is_accessible_reg, +}; + +static int rt4831_probe(struct i2c_client *client) +{ + struct gpio_desc *enable_gpio; + struct regmap *regmap; + unsigned int chip_id; + int ret; + + enable_gpio = devm_gpiod_get_optional(&client->dev, "enable", GPIOD_OUT_HIGH); + if (IS_ERR(enable_gpio)) { + dev_err(&client->dev, "Failed to get 'enable' GPIO\n"); + return PTR_ERR(enable_gpio); + } + + regmap = devm_regmap_init_i2c(client, &rt4831_regmap_config); + if (IS_ERR(regmap)) { + dev_err(&client->dev, "Failed to initialize regmap\n"); + return PTR_ERR(regmap); + } + + ret = regmap_read(regmap, RT4831_REG_REVISION, &chip_id); + if (ret) { + dev_err(&client->dev, "Failed to get H/W revision\n"); + return ret; + } + + if ((chip_id & RT4831_VID_MASK) != RICHTEK_VENDOR_ID) { + dev_err(&client->dev, "Chip vendor ID 0x%02x not matched\n", chip_id); + return -ENODEV; + } + + /* + * Used to prevent the abnormal shutdown. + * If SCL/SDA both keep low for one second to reset HW. + */ + ret = regmap_update_bits(regmap, RT4831_REG_I2CPROT, RT4831_I2CSAFETMR_MASK, + RT4831_I2CSAFETMR_MASK); + if (ret) { + dev_err(&client->dev, "Failed to enable I2C safety timer\n"); + return ret; + } + + return devm_mfd_add_devices(&client->dev, PLATFORM_DEVID_AUTO, rt4831_subdevs, + ARRAY_SIZE(rt4831_subdevs), NULL, 0, NULL); +} + +static int rt4831_remove(struct i2c_client *client) +{ + struct regmap *regmap = dev_get_regmap(&client->dev, NULL); + + /* Disable WLED and DSV outputs */ + return regmap_update_bits(regmap, RT4831_REG_ENABLE, RT4831_RESET_MASK, RT4831_RESET_MASK); +} + +static void rt4831_shutdown(struct i2c_client *client) +{ + struct regmap *regmap = dev_get_regmap(&client->dev, NULL); + + /* Disable WLED and DSV outputs */ + regmap_update_bits(regmap, RT4831_REG_ENABLE, RT4831_RESET_MASK, RT4831_RESET_MASK); +} + +static const struct of_device_id __maybe_unused rt4831_of_match[] = { + { .compatible = "richtek,rt4831", }, + {} +}; +MODULE_DEVICE_TABLE(of, rt4831_of_match); + +static struct i2c_driver rt4831_driver = { + .driver = { + .name = "rt4831", + .of_match_table = rt4831_of_match, + }, + .probe_new = rt4831_probe, + .remove = rt4831_remove, + .shutdown = rt4831_shutdown, +}; +module_i2c_driver(rt4831_driver); + +MODULE_AUTHOR("ChiYuan Huang <cy_huang(a)richtek.com>"); +MODULE_LICENSE("GPL v2"); -- 2.7.4

4 9

[PATCH v5 5/6] backlight: rt4831: Adds support for Richtek RT4831 backlight
by cy_huang 25 Mar '21

25 Mar '21

From: ChiYuan Huang <cy_huang(a)richtek.com> Adds support for Richtek RT4831 backlight. Signed-off-by: ChiYuan Huang <cy_huang(a)richtek.com> --- drivers/video/backlight/Kconfig | 8 ++ drivers/video/backlight/Makefile | 1 + drivers/video/backlight/rt4831-backlight.c | 219 +++++++++++++++++++++++++++++ 3 files changed, 228 insertions(+) create mode 100644 drivers/video/backlight/rt4831-backlight.c diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig index d83c87b..666bdb0 100644 --- a/drivers/video/backlight/Kconfig +++ b/drivers/video/backlight/Kconfig @@ -289,6 +289,14 @@ config BACKLIGHT_QCOM_WLED If you have the Qualcomm PMIC, say Y to enable a driver for the WLED block. Currently it supports PM8941 and PMI8998. +config BACKLIGHT_RT4831 + tristate "Richtek RT4831 Backlight Driver" + depends on MFD_RT4831 + help + This enables support for Richtek RT4831 Backlight driver. + It's commont used to drive the display WLED. There're four channels + inisde, and each channel can provide up to 30mA current. + config BACKLIGHT_SAHARA tristate "Tabletkiosk Sahara Touch-iT Backlight Driver" depends on X86 diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile index 685f3f1..cae2c83 100644 --- a/drivers/video/backlight/Makefile +++ b/drivers/video/backlight/Makefile @@ -49,6 +49,7 @@ obj-$(CONFIG_BACKLIGHT_PANDORA) += pandora_bl.o obj-$(CONFIG_BACKLIGHT_PCF50633) += pcf50633-backlight.o obj-$(CONFIG_BACKLIGHT_PWM) += pwm_bl.o obj-$(CONFIG_BACKLIGHT_QCOM_WLED) += qcom-wled.o +obj-$(CONFIG_BACKLIGHT_RT4831) += rt4831-backlight.o obj-$(CONFIG_BACKLIGHT_SAHARA) += kb3886_bl.o obj-$(CONFIG_BACKLIGHT_SKY81452) += sky81452-backlight.o obj-$(CONFIG_BACKLIGHT_TOSA) += tosa_bl.o diff --git a/drivers/video/backlight/rt4831-backlight.c b/drivers/video/backlight/rt4831-backlight.c new file mode 100644 index 00000000..816c4d6 --- /dev/null +++ b/drivers/video/backlight/rt4831-backlight.c @@ -0,0 +1,219 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include <dt-bindings/leds/rt4831-backlight.h> +#include <linux/backlight.h> +#include <linux/bitops.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/mutex.h> +#include <linux/platform_device.h> +#include <linux/property.h> +#include <linux/regmap.h> + +#define RT4831_REG_BLCFG 0x02 +#define RT4831_REG_BLDIML 0x04 +#define RT4831_REG_ENABLE 0x08 + +#define BL_MAX_BRIGHTNESS 2048 + +#define RT4831_BLOVP_MASK GENMASK(7, 5) +#define RT4831_BLOVP_SHIFT 5 +#define RT4831_BLPWMEN_MASK BIT(0) +#define RT4831_BLEN_MASK BIT(4) +#define RT4831_BLCH_MASK GENMASK(3, 0) +#define RT4831_BLDIML_MASK GENMASK(2, 0) +#define RT4831_BLDIMH_MASK GENMASK(10, 3) +#define RT4831_BLDIMH_SHIFT 3 + +struct rt4831_priv { + struct regmap *regmap; + struct mutex lock; + struct backlight_device *bl; +}; + +static int rt4831_bl_update_status(struct backlight_device *bl_dev) +{ + struct rt4831_priv *priv = bl_get_data(bl_dev); + int brightness = backlight_get_brightness(bl_dev); + unsigned int enable = brightness ? RT4831_BLEN_MASK : 0; + u8 v[2]; + int ret; + + mutex_lock(&priv->lock); + + if (brightness) { + v[0] = (brightness - 1) & RT4831_BLDIML_MASK; + v[1] = ((brightness - 1) & RT4831_BLDIMH_MASK) >> RT4831_BLDIMH_SHIFT; + + ret = regmap_raw_write(priv->regmap, RT4831_REG_BLDIML, v, sizeof(v)); + if (ret) + goto unlock; + } + + ret = regmap_update_bits(priv->regmap, RT4831_REG_ENABLE, RT4831_BLEN_MASK, enable); + +unlock: + mutex_unlock(&priv->lock); + return ret; +} + +static int rt4831_bl_get_brightness(struct backlight_device *bl_dev) +{ + struct rt4831_priv *priv = bl_get_data(bl_dev); + unsigned int val; + u8 v[2]; + int ret; + + mutex_lock(&priv->lock); + + ret = regmap_read(priv->regmap, RT4831_REG_ENABLE, &val); + if (ret) + return ret; + + if (!(val & RT4831_BLEN_MASK)) { + ret = 0; + goto unlock; + } + + ret = regmap_raw_read(priv->regmap, RT4831_REG_BLDIML, v, sizeof(v)); + if (ret) + goto unlock; + + ret = (v[1] << RT4831_BLDIMH_SHIFT) + (v[0] & RT4831_BLDIML_MASK) + 1; + +unlock: + mutex_unlock(&priv->lock); + return ret; +} + +static const struct backlight_ops rt4831_bl_ops = { + .options = BL_CORE_SUSPENDRESUME, + .update_status = rt4831_bl_update_status, + .get_brightness = rt4831_bl_get_brightness, +}; + +static int rt4831_init_device_properties(struct rt4831_priv *priv, struct device *dev, + struct backlight_properties *bl_props) +{ + u8 propval; + u32 brightness; + unsigned int val = 0; + int ret; + + /* common properties */ + ret = device_property_read_u32(dev, "max-brightness", &brightness); + if (ret) { + dev_warn(dev, "max-brightness DT property missing, use HW max as default\n"); + brightness = BL_MAX_BRIGHTNESS; + } + + bl_props->max_brightness = min_t(u32, brightness, BL_MAX_BRIGHTNESS); + + ret = device_property_read_u32(dev, "default-brightness", &brightness); + if (ret) { + dev_warn(dev, "default-brightness DT property missing, use max limit as default\n"); + brightness = bl_props->max_brightness; + } + + bl_props->brightness = min_t(u32, brightness, bl_props->max_brightness); + + /* vendor properties */ + if (device_property_read_bool(dev, "richtek,pwm-enable")) + val = RT4831_BLPWMEN_MASK; + + ret = regmap_update_bits(priv->regmap, RT4831_REG_BLCFG, RT4831_BLPWMEN_MASK, val); + if (ret) + return ret; + + ret = device_property_read_u8(dev, "richtek,bled-ovp-sel", &propval); + if (ret) { + dev_warn(dev, "richtek,bled-ovp-sel DT property missing, use default 21V\n"); + propval = RT4831_BLOVPLVL_21V; + } + + propval = min_t(u8, propval, RT4831_BLOVPLVL_29V); + ret = regmap_update_bits(priv->regmap, RT4831_REG_BLCFG, RT4831_BLOVP_MASK, + propval << RT4831_BLOVP_SHIFT); + if (ret) + return ret; + + ret = device_property_read_u8(dev, "richtek,channel-use", &propval); + if (ret) { + dev_err(dev, "richtek,channel-use DT property missing\n"); + return ret; + } + + if (!(propval & RT4831_BLCH_MASK)) { + dev_err(dev, "No channel specified\n"); + return -EINVAL; + } + + return regmap_update_bits(priv->regmap, RT4831_REG_ENABLE, RT4831_BLCH_MASK, propval); +} + +static int rt4831_bl_probe(struct platform_device *pdev) +{ + struct rt4831_priv *priv; + struct backlight_properties bl_props = { .type = BACKLIGHT_RAW, }; + int ret; + + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + mutex_init(&priv->lock); + + priv->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (IS_ERR(priv->regmap)) { + dev_err(&pdev->dev, "Failed to init regmap\n"); + return PTR_ERR(priv->regmap); + } + + ret = rt4831_init_device_properties(priv, &pdev->dev, &bl_props); + if (ret) { + dev_err(&pdev->dev, "Failed to init device properties\n"); + return ret; + } + + priv->bl = devm_backlight_device_register(&pdev->dev, pdev->name, &pdev->dev, priv, + &rt4831_bl_ops, &bl_props); + if (IS_ERR(priv->bl)) { + dev_err(&pdev->dev, "Failed to register backlight\n"); + return PTR_ERR(priv->bl); + } + + backlight_update_status(priv->bl); + platform_set_drvdata(pdev, priv); + + return 0; +} + +static int rt4831_bl_remove(struct platform_device *pdev) +{ + struct rt4831_priv *priv = platform_get_drvdata(pdev); + struct backlight_device *bl_dev = priv->bl; + + bl_dev->props.brightness = 0; + backlight_update_status(priv->bl); + + return 0; +} + +static const struct of_device_id __maybe_unused rt4831_bl_of_match[] = { + { .compatible = "richtek,rt4831-backlight", }, + {} +}; +MODULE_DEVICE_TABLE(of, rt4831_bl_of_match); + +static struct platform_driver rt4831_bl_driver = { + .driver = { + .name = "rt4831-backlight", + .of_match_table = rt4831_bl_of_match, + }, + .probe = rt4831_bl_probe, + .remove = rt4831_bl_remove, +}; +module_platform_driver(rt4831_bl_driver); + +MODULE_AUTHOR("ChiYuan Huang <cy_huang(a)richtek.com>"); +MODULE_LICENSE("GPL v2"); -- 2.7.4

3 3

[PATCH] drm/imx: fix memory leak when fails to init
by Pan Bian 25 Mar '21

25 Mar '21

Put DRM device on initialization failure path rather than directly return error code. Fixes: a67d5088ceb8 ("drm/imx: drop explicit drm_mode_config_cleanup") Signed-off-by: Pan Bian <bianpan2016(a)163.com> --- drivers/gpu/drm/imx/imx-drm-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/imx/imx-drm-core.c b/drivers/gpu/drm/imx/imx-drm-core.c index d1a9841adeed..e6a88c8cbd69 100644 --- a/drivers/gpu/drm/imx/imx-drm-core.c +++ b/drivers/gpu/drm/imx/imx-drm-core.c @@ -215,7 +215,7 @@ static int imx_drm_bind(struct device *dev) ret = drmm_mode_config_init(drm); if (ret) - return ret; + goto err_kms; ret = drm_vblank_init(drm, MAX_CRTC); if (ret) -- 2.17.1

2 1

[PATCH v2 0/3] Fixes to bridge/panel and ingenic-drm
by Paul Cercueil 24 Mar '21

24 Mar '21

Hi, Here are three independent fixes. The first one addresses a use-after-free in bridge/panel.c; the second one addresses a use-after-free in the ingenic-drm driver; finally, the third one makes the ingenic-drm driver work again on older Ingenic SoCs. Changes from v1: - patch [1/3]: the connector is cleaned up only if it was initialized in the first place; - patch [2/3]: use __drmm_simple_encoder_alloc; - patch [3/3] is unmodified. Note to linux-stable guys: patch [v2 2/3] will only apply on the current drm-misc-next branch, to fix it for v5.11 and older kernels, use the V1 of that patch. Cheers, -Paul Paul Cercueil (3): drm: bridge/panel: Cleanup connector on bridge detach drm/ingenic: Register devm action to cleanup encoders drm/ingenic: Fix non-OSD mode drivers/gpu/drm/bridge/panel.c | 6 +++++ drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 27 ++++++++++++----------- 2 files changed, 20 insertions(+), 13 deletions(-) -- 2.29.2

3 14

[PATCH v3 0/4] Fixes to bridge/panel and ingenic-drm
by Paul Cercueil 24 Mar '21

24 Mar '21

Hi, Here are three independent fixes. The first one addresses a use-after-free in bridge/panel.c; the second one addresses a use-after-free in the ingenic-drm driver; finally, the third one makes the ingenic-drm driver work again on older Ingenic SoCs. Changes from v2: - patch [1/4] added a FIXME. - patch [2/4] is new. It introduces a drmm_plain_simple_encoder_alloc() macro that will be used in patch [3/4]. - patch [3/4] uses the macro introduced in patch [2/4]. - patch [4/4] is unmodified. Note to linux-stable guys: patch [v2 2/3] will only apply on the current drm-misc-next branch, to fix it for v5.11 and older kernels, use the V1 of that patch. Cheers, -Paul Paul Cercueil (4): drm: bridge/panel: Cleanup connector on bridge detach drm/simple_kms_helper: Add macro drmm_plain_simple_encoder_alloc() drm/ingenic: Register devm action to cleanup encoders drm/ingenic: Fix non-OSD mode drivers/gpu/drm/bridge/panel.c | 12 +++++++++++ drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 26 +++++++++++------------ include/drm/drm_simple_kms_helper.h | 17 +++++++++++++++ 3 files changed, 42 insertions(+), 13 deletions(-) -- 2.29.2

3 15

[PATCH] RFC: dma-buf: Add an API for importing and exporting sync files
by Jason Ekstrand 23 Mar '21

23 Mar '21

Explicit synchronization is the future. At least, that seems to be what most userspace APIs are agreeing on at this point. However, most of our Linux APIs (both userspace and kernel UAPI) are currently built around implicit synchronization with dma-buf. While work is ongoing to change many of the userspace APIs and protocols to an explicit synchronization model, switching over piecemeal is difficult due to the number of potential components involved. On the kernel side, many drivers use dma-buf including GPU (3D/compute), display, v4l, and others. In userspace, we have X11, several Wayland compositors, 3D drivers, compute drivers (OpenCL etc.), media encode/decode, and the list goes on. This patch provides a path forward by allowing userspace to manually manage the fences attached to a dma-buf. Alternatively, one can think of this as making dma-buf's implicit synchronization simply a carrier for an explicit fence. This is accomplished by adding two IOCTLs to dma-buf for importing and exporting a sync file to/from the dma-buf. This way a userspace component which is uses explicit synchronization, such as a Vulkan driver, can manually set the write fence on a buffer before handing it off to an implicitly synchronized component such as a Wayland compositor or video encoder. In this way, each of the different components can be upgraded to an explicit synchronization model one at a time as long as the userspace pieces connecting them are aware of it and import/export fences at the right times. There is a potential race condition with this API if userspace is not careful. A typical use case for implicit synchronization is to wait for the dma-buf to be ready, use it, and then signal it for some other component. Because a sync_file cannot be created until it is guaranteed to complete in finite time, userspace can only signal the dma-buf after it has already submitted the work which uses it to the kernel and has received a sync_file back. There is no way to atomically submit a wait-use-signal operation. This is not, however, really a problem with this API so much as it is a problem with explicit synchronization itself. The way this is typically handled is to have very explicit ownership transfer points in the API or protocol which ensure that only one component is using it at any given time. Both X11 (via the PRESENT extension) and Wayland provide such ownership transfer points via explicit present and idle messages. The decision was intentionally made in this patch to make the import and export operations IOCTLs on the dma-buf itself rather than as a DRM IOCTL. This makes it the import/export operation universal across all components which use dma-buf including GPU, display, v4l, and others. It also means that a userspace component can do the import/export without access to the DRM fd which may be tricky to get in cases where the client communicates with DRM via a userspace API such as OpenGL or Vulkan. At a future date we may choose to add direct import/export APIs to components such as drm_syncobj to avoid allocating a file descriptor and going through two ioctls. However, that seems to be something of a micro-optimization as import/export operations are likely to happen at a rate of a few per frame of rendered or decoded video. Signed-off-by: Jason Ekstrand <jason(a)jlekstrand.net> --- This is marked as an RFC because I intend it to start a discussion about how to solve a problem. The current patch compiles but that's it for now. I'll be writing IGT tests and Vulkan driver patches which exercise it over the next couple of days. In the mean time, feel free to tell me why you think this is a great and/or terrible idea. :-) --Jason drivers/dma-buf/dma-buf.c | 115 +++++++++++++++++++++++++++++++++++ include/uapi/linux/dma-buf.h | 13 +++- 2 files changed, 126 insertions(+), 2 deletions(-) diff --git a/drivers/dma-buf/dma-buf.c b/drivers/dma-buf/dma-buf.c index d4097856c86b..3845b87e209e 100644 --- a/drivers/dma-buf/dma-buf.c +++ b/drivers/dma-buf/dma-buf.c @@ -20,6 +20,7 @@ #include <linux/debugfs.h> #include <linux/module.h> #include <linux/seq_file.h> +#include <linux/sync_file.h> #include <linux/poll.h> #include <linux/dma-resv.h> #include <linux/mm.h> @@ -348,6 +349,114 @@ static long dma_buf_set_name(struct dma_buf *dmabuf, const char __user *buf) return ret; } +static long dma_buf_wait_sync_file(struct dma_buf *dmabuf, + const void __user *user_data) +{ + struct dma_buf_sync_file arg; + struct dma_fence *fence; + + if (copy_from_user(&arg, user_data, sizeof(arg))) + return -EFAULT; + + if (arg.flags != 0 && arg.flags != DMA_BUF_SYNC_FILE_SYNC_WRITE) + return -EINVAL; + + fence = sync_file_get_fence(arg.fd); + if (!fence) + return -EINVAL; + + if (arg.flags & DMA_BUF_SYNC_FILE_SYNC_WRITE) { + dma_resv_add_excl_fence(dmabuf->resv, fence); + } else { + dma_resv_add_shared_fence(dmabuf->resv, fence); + } + + return 0; +} + +static long dma_buf_signal_sync_file(struct dma_buf *dmabuf, + void __user *user_data) +{ + struct dma_buf_sync_file arg; + struct dma_fence *fence = NULL; + struct sync_file *sync_file; + int fd, ret; + + if (copy_from_user(&arg, user_data, sizeof(arg))) + return -EFAULT; + + if (arg.flags != 0 && arg.flags != DMA_BUF_SYNC_FILE_SYNC_WRITE) + return -EINVAL; + + fd = get_unused_fd_flags(O_CLOEXEC); + if (fd < 0) + return fd; + + if (arg.flags & DMA_BUF_SYNC_FILE_SYNC_WRITE) { + /* We need to include both the exclusive fence and all of + * the shared fences in our fence. + */ + struct dma_fence **fences = NULL; + unsigned i, num_fences = 0; + + ret = dma_resv_get_fences_rcu(dmabuf->resv, NULL, + &num_fences, &fences); + if (ret) + goto err_put_fd; + + if (num_fences == 0) { + fence = dma_fence_get_stub(); + } else if (num_fences == 1) { + fence = fences[0]; + kfree(fences); + } else { + struct dma_fence_array *fence_arr; + + fence_arr = dma_fence_array_create(num_fences, fences, + dma_fence_context_alloc(1), + 1, false); + if (!fence_arr) { + for (i = 0; i < num_fences; i++) + dma_fence_put(fences[i]); + kfree(fences); + ret = -ENOMEM; + goto err_put_fd; + } + + /* The fence array now owns fences_arr and our + * references to each of the individual fences. We + * only own a reference to the one array fence. + */ + fence = &fence_arr->base; + } + } else { + fence = dma_resv_get_excl_rcu(dmabuf->resv); + if (!fence) + fence = dma_fence_get_stub(); + } + + sync_file = sync_file_create(fence); + + dma_fence_put(fence); + + if (!sync_file) { + ret = -EINVAL; + goto err_put_fd; + } + + fd_install(fd, sync_file->file); + + arg.fd = fd; + if (copy_to_user(user_data, &arg, sizeof(arg))) + return -EFAULT; + + return 0; + +err_put_fd: + put_unused_fd(fd); + return ret; +} + static long dma_buf_ioctl(struct file *file, unsigned int cmd, unsigned long arg) { @@ -390,6 +499,12 @@ static long dma_buf_ioctl(struct file *file, case DMA_BUF_SET_NAME: return dma_buf_set_name(dmabuf, (const char __user *)arg); + case DMA_BUF_IOCTL_WAIT_SYNC_FILE: + return dma_buf_wait_sync_file(dmabuf, (const void __user *)arg); + + case DMA_BUF_IOCTL_SIGNAL_SYNC_FILE: + return dma_buf_signal_sync_file(dmabuf, (void __user *)arg); + default: return -ENOTTY; } diff --git a/include/uapi/linux/dma-buf.h b/include/uapi/linux/dma-buf.h index dbc7092e04b5..825b9a913c89 100644 --- a/include/uapi/linux/dma-buf.h +++ b/include/uapi/linux/dma-buf.h @@ -37,8 +37,17 @@ struct dma_buf_sync { #define DMA_BUF_NAME_LEN 32 +struct dma_buf_sync_file { + __u32 flags; + __s32 fd; +}; + +#define DMA_BUF_SYNC_FILE_SYNC_WRITE (1 << 0) + #define DMA_BUF_BASE 'b' -#define DMA_BUF_IOCTL_SYNC _IOW(DMA_BUF_BASE, 0, struct dma_buf_sync) -#define DMA_BUF_SET_NAME _IOW(DMA_BUF_BASE, 1, const char *) +#define DMA_BUF_IOCTL_SYNC _IOW(DMA_BUF_BASE, 0, struct dma_buf_sync) +#define DMA_BUF_SET_NAME _IOW(DMA_BUF_BASE, 1, const char *) +#define DMA_BUF_IOCTL_WAIT_SYNC_FILE _IOW(DMA_BUF_BASE, 2, struct dma_buf_sync) +#define DMA_BUF_IOCTL_SIGNAL_SYNC_FILE _IOW(DMA_BUF_BASE, 3, struct dma_buf_sync) #endif -- 2.24.1

9 52

[PATCH v2 0/4] drm/bridge: ti-sn65dsi86: Support EDID reading
by Stephen Boyd 23 Mar '21

23 Mar '21

This patch series cleans up the DDC code a little bit so that it is more efficient time wise and supports grabbing the EDID of the eDP panel over the aux channel. I timed this on a board I have on my desk and it takes about 20ms to grab the EDID out of the panel and make sure it is valid. The first two patches seem less controversial so I stuck them at the beginning. The third patch does the EDID reading and caches it so we don't have to keep grabbing it over and over again. And finally the last patch updates the reply field so that short reads and nacks over the channel are reflected properly instead of treating them as some sort of error that can't be discerned. Stephen Boyd (4): drm/bridge: ti-sn65dsi86: Combine register accesses in ti_sn_aux_transfer() drm/bridge: ti-sn65dsi86: Make polling a busy loop drm/bridge: ti-sn65dsi86: Read EDID blob over DDC drm/bridge: ti-sn65dsi86: Update reply on aux failures drivers/gpu/drm/bridge/ti-sn65dsi86.c | 108 ++++++++++++++++++-------- 1 file changed, 75 insertions(+), 33 deletions(-) Cc: Douglas Anderson <dianders(a)chromium.org> Cc: Laurent Pinchart <Laurent.pinchart(a)ideasonboard.com> Cc: Jonas Karlman <jonas(a)kwiboo.se> Cc: Jernej Skrabec <jernej.skrabec(a)siol.net> Cc: Sean Paul <seanpaul(a)chromium.org> base-commit: 3650b228f83adda7e5ee532e2b90429c03f7b9ec -- Sent by a computer, using git, on the internet

5 19

[PATCH v6 0/5] Enable rk3066a HDMI sound
by Johan Jonker 22 Mar '21

22 Mar '21

Update the rk3066a HDMI documents with a #sound-dai-cells property. Include the code for sound in the HDMI driver. Add a simple-sound-card compatible node to rk3066a.dtsi, because I2S0 and HDMI TX are connected internally. And as last enable rk3066a HDMI sound in the rk3066a-mk808.dts file. make ARCH=arm CROSS_COMPILE=/usr/bin/arm-linux-gnueabi- -j4 cp ./arch/arm/boot/zImage ../zImage-dtb cat ./arch/arm/boot/dts/rk3066a-mk808.dtb >> ../zImage-dtb ../tools/rkcrc -k ../zImage-dtb ../mk808.img sudo ../tools/rkflashtool w 0x4000 0x8000 < ../mk808.img sudo ../tools/rkflashtool b Changed v6: remove patches that are applied to linux-next add platform_device_unregister() restyle Changed v5: removed unused variable fill frame structure Johan Jonker (4): dt-bindings: display: add #sound-dai-cells property to rockchip rk3066 hdmi ARM: dts: rockchip: rk3066a: add #sound-dai-cells to hdmi node ARM: dts: rockchip: add hdmi-sound node to rk3066a.dtsi ARM: dts: rockchip: enable hdmi_sound and i2s0 for rk3066a-mk808 Zheng Yang (1): drm: rockchip: add sound support to rk3066 hdmi driver .../display/rockchip/rockchip,rk3066-hdmi.yaml | 4 + arch/arm/boot/dts/rk3066a-mk808.dts | 8 + arch/arm/boot/dts/rk3066a.dtsi | 17 ++ drivers/gpu/drm/rockchip/Kconfig | 2 + drivers/gpu/drm/rockchip/rk3066_hdmi.c | 277 ++++++++++++++++++++- 5 files changed, 307 insertions(+), 1 deletion(-) -- 2.11.0

2 7

[PATCH v4, 00/10] soc: mediatek: mmsys: Use function call for setting the routing registers
by Yongqiang Niu 22 Mar '21

22 Mar '21

The following series are intended to prepare the mtk-mmsys driver to allow different DDP (Data Display Path) function call per SoC. base 5.11-rc1 change since v3: - move register operation into mmsys path select function Yongqiang Niu (10): soc: mediatek: mmsys: create mmsys folder soc: mediatek: mmsys: Create struct mtk_mmsys to store context data soc: mediatek: mmsys: move register operation into mmsys path select function soc: mediatek: mmsys: Use function call for setting the routing registers soc: mediatek: mmsys: add mt8183 function call for setting the routing registers soc: mediatek: mmsys: add component OVL_2L2 soc: mediatek: mmsys: add component POSTMASK soc: mediatek: mmsys: add component RDMA4 soc: mediatek: mmsys: Use function call for setting mmsys ovl mout register soc: mediatek: mmsys: add mt8192 mmsys support drivers/soc/mediatek/Makefile | 2 +- drivers/soc/mediatek/mmsys/Makefile | 5 + drivers/soc/mediatek/mmsys/mt2701-mmsys.c | 254 ++++++++++++++++++++ drivers/soc/mediatek/mmsys/mt8183-mmsys.c | 110 +++++++++ drivers/soc/mediatek/mmsys/mt8192-mmsys.c | 149 ++++++++++++ drivers/soc/mediatek/mmsys/mtk-mmsys.c | 180 ++++++++++++++ drivers/soc/mediatek/mtk-mmsys.c | 373 ------------------------------ include/linux/soc/mediatek/mtk-mmsys.h | 25 ++ 8 files changed, 724 insertions(+), 374 deletions(-) create mode 100644 drivers/soc/mediatek/mmsys/Makefile create mode 100644 drivers/soc/mediatek/mmsys/mt2701-mmsys.c create mode 100644 drivers/soc/mediatek/mmsys/mt8183-mmsys.c create mode 100644 drivers/soc/mediatek/mmsys/mt8192-mmsys.c create mode 100644 drivers/soc/mediatek/mmsys/mtk-mmsys.c delete mode 100644 drivers/soc/mediatek/mtk-mmsys.c -- 1.8.1.1.dirty

6 18

← Newer
1
...
7
8
9
10
11
12
13
...
74
Older →

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

dri-devel January 2021