dri-devel December 2021

dri-devel@lists.freedesktop.org

310 participants
720 discussions

[PATCH] drm/ast: Enable the supporting of wide screen on AST2600
by KuoHsiang Chou 06 Jan '22

06 Jan '22

Enable the supporting of wide sscreen on AST2600, so that the resolution of 16:9 and 16:10 are able to be selected on Display Settings. Signed-off-by: KuoHsiang Chou <kuohsiang_chou(a)aspeedtech.com> --- drivers/gpu/drm/ast/ast_main.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c index 9f25fa2c8..1113ee1cb 100644 --- a/drivers/gpu/drm/ast/ast_main.c +++ b/drivers/gpu/drm/ast/ast_main.c @@ -209,6 +209,8 @@ static int ast_detect_chip(struct drm_device *dev, bool *need_post) if (ast->chip == AST2500 && scu_rev == 0x100) /* ast2510 */ ast->support_wide_screen = true; + if (ast->chip == AST2600) /* ast2600 */ + ast->support_wide_screen = true; } break; } -- 2.27.0

2 1

[PATCH v4 00/34] component: Make into an aggregate bus
by Stephen Boyd 06 Jan '22

06 Jan '22

This series is from discussion we had on reordering the device lists for drm shutdown paths[1]. I've introduced an 'aggregate' bus that we put the aggregate device onto and then we probe the aggregate device once all the components are probed and call component_add(). The probe/remove hooks are where the bind/unbind calls go, and then a shutdown hook is added that can be used to shutdown the drm display pipeline at the right time. This works for me on my sc7180 board. I no longer get a warning from i2c at shutdown that we're trying to make an i2c transaction after the i2c bus has been shutdown. There's more work to do on the msm drm driver to extract component device resources like clks, regulators, etc. out of the component bind function into the driver probe but I wanted to move everything over now in other component drivers before tackling that problem. Tested-by tags would be appreciated, and Acked-by/Reviewed-by tags too. Changes since v3 (https://lore.kernel.org/r/20211026000044.885195-1-swboyd@chromium.org): - Picked up tags - Rebased to v5.16-rc2 - Updated component.c for a few new patches there - Dropped a conversion patch - Added a conversion patch Changes since v2 (https://lore.kernel.org/r/20211006193819.2654854-1-swboyd@chromium.org): - Picked up acks - Fixed build warnings/errors - Reworked patch series to rename 'master' in a different patch Changes since v1 (https://lore.kernel.org/r/20210520002519.3538432-1-swboyd@chromium.org): - Use devlink to connect components to the aggregate device - Don't set the registering device as a parent of the aggregate device - New patch for bind_component/unbind_component ops that takes the aggregate device - Convert all drivers in the tree to use the aggregate driver approach - Allow one aggregate driver to be used for multiple aggregate devices [1] https://lore.kernel.org/r/20210508074118.1621729-1-swboyd@chromium.org Stephen Boyd (34): component: Introduce struct aggregate_device component: Remove most references to 'master' component: Introduce the aggregate bus_type component: Move struct aggregate_device out to header file component: Add {bind,unbind}_component() ops that take aggregate device drm/of: Add a drm_of_aggregate_probe() API drm/msm: Migrate to aggregate driver drm/komeda: Migrate to aggregate driver drm/arm/hdlcd: Migrate to aggregate driver drm/malidp: Migrate to aggregate driver drm/armada: Migrate to aggregate driver drm/etnaviv: Migrate to aggregate driver drm/kirin: Migrate to aggregate driver drm/exynos: Migrate to aggregate driver drm/imx: Migrate to aggregate driver drm/ingenic: Migrate to aggregate driver drm/mcde: Migrate to aggregate driver drm/mediatek: Migrate to aggregate driver drm/meson: Migrate to aggregate driver drm/omap: Migrate to aggregate driver drm/rockchip: Migrate to aggregate driver drm/sti: Migrate to aggregate driver drm/sun4i: Migrate to aggregate driver drm/tilcdc: Migrate to aggregate driver drm/vc4: Migrate to aggregate driver iommu/mtk: Migrate to aggregate driver mei: Migrate to aggregate driver power: supply: ab8500: Migrate to aggregate driver fbdev: omap2: Migrate to aggregate driver sound: hdac: Migrate to aggregate driver ASoC: codecs: wcd938x: Migrate to aggregate driver mei: pxp: Migrate to aggregate driver component: Get rid of drm_of_component_probe() component: Remove component_master_ops and friends drivers/base/component.c | 544 ++++++++++-------- .../gpu/drm/arm/display/komeda/komeda_drv.c | 20 +- drivers/gpu/drm/arm/hdlcd_drv.c | 21 +- drivers/gpu/drm/arm/malidp_drv.c | 21 +- drivers/gpu/drm/armada/armada_drv.c | 23 +- drivers/gpu/drm/drm_drv.c | 2 +- drivers/gpu/drm/drm_of.c | 18 +- drivers/gpu/drm/etnaviv/etnaviv_drv.c | 20 +- drivers/gpu/drm/exynos/exynos_drm_drv.c | 21 +- .../gpu/drm/hisilicon/kirin/kirin_drm_drv.c | 20 +- drivers/gpu/drm/imx/imx-drm-core.c | 20 +- drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 25 +- drivers/gpu/drm/mcde/mcde_drv.c | 23 +- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 20 +- drivers/gpu/drm/meson/meson_drv.c | 21 +- drivers/gpu/drm/msm/msm_drv.c | 46 +- drivers/gpu/drm/omapdrm/dss/dss.c | 20 +- drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 20 +- drivers/gpu/drm/sti/sti_drv.c | 20 +- drivers/gpu/drm/sun4i/sun4i_drv.c | 26 +- drivers/gpu/drm/tilcdc/tilcdc_drv.c | 28 +- drivers/gpu/drm/vc4/vc4_drv.c | 20 +- drivers/iommu/mtk_iommu.c | 14 +- drivers/iommu/mtk_iommu.h | 6 +- drivers/iommu/mtk_iommu_v1.c | 14 +- drivers/misc/mei/hdcp/mei_hdcp.c | 22 +- drivers/misc/mei/pxp/mei_pxp.c | 22 +- drivers/power/supply/ab8500_charger.c | 22 +- drivers/video/fbdev/omap2/omapfb/dss/dss.c | 20 +- include/drm/drm_of.h | 10 +- include/linux/component.h | 92 ++- sound/hda/hdac_component.c | 21 +- sound/soc/codecs/wcd938x.c | 20 +- 33 files changed, 772 insertions(+), 490 deletions(-) Cc: Arnd Bergmann <arnd(a)arndb.de> Cc: Benjamin Gaignard <benjamin.gaignard(a)linaro.org> Cc: Chen Feng <puck.chen(a)hisilicon.com> Cc: Chen-Yu Tsai <wens(a)csie.org> Cc: Christian Gmeiner <christian.gmeiner(a)gmail.com> Cc: Chun-Kuang Hu <chunkuang.hu(a)kernel.org> Cc: Daniel Vetter <daniel.vetter(a)ffwll.ch> Cc: Emma Anholt <emma(a)anholt.net> Cc: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> Cc: "Heiko Stübner" <heiko(a)sntech.de> Cc: Inki Dae <inki.dae(a)samsung.com> Cc: James Qian Wang (Arm Technology China) <james.qian.wang(a)arm.com> Cc: Jaroslav Kysela <perex(a)perex.cz> Cc: Joerg Roedel <joro(a)8bytes.org> Cc: John Stultz <john.stultz(a)linaro.org> Cc: Joonyoung Shim <jy0922.shim(a)samsung.com> Cc: Jyri Sarha <jyri.sarha(a)iki.fi> Cc: Kai Vehmanen <kai.vehmanen(a)linux.intel.com> Cc: Kyungmin Park <kyungmin.park(a)samsung.com> Cc: Laurent Pinchart <laurent.pinchart(a)ideasonboard.com> Cc: <linux-fbdev(a)vger.kernel.org> Cc: <linux-omap(a)vger.kernel.org> Cc: <linux-pm(a)vger.kernel.org> Cc: Linus Walleij <linus.walleij(a)linaro.org> Cc: Liviu Dudau <liviu.dudau(a)arm.com> Cc: Lucas Stach <l.stach(a)pengutronix.de> Cc: Mark Brown <broonie(a)kernel.org> Cc: Maxime Ripard <mripard(a)kernel.org> Cc: Neil Armstrong <narmstrong(a)baylibre.com> Cc: Paul Cercueil <paul(a)crapouillou.net> Cc: Philipp Zabel <p.zabel(a)pengutronix.de> Cc: "Rafael J. Wysocki" <rafael(a)kernel.org> Cc: Rob Clark <robdclark(a)gmail.com> Cc: Russell King <linux(a)armlinux.org.uk> Cc: Russell King <linux+etnaviv(a)armlinux.org.uk> Cc: Russell King <rmk+kernel(a)arm.linux.org.uk> Cc: Sandy Huang <hjc(a)rock-chips.com> Cc: Saravana Kannan <saravanak(a)google.com> Cc: Sebastian Reichel <sre(a)kernel.org> Cc: Seung-Woo Kim <sw0312.kim(a)samsung.com> Cc: Takashi Iwai <tiwai(a)suse.com> Cc: Tian Tao <tiantao6(a)hisilicon.com> Cc: Tomas Winkler <tomas.winkler(a)intel.com> Cc: Tomi Valkeinen <tomba(a)kernel.org> Cc: Will Deacon <will(a)kernel.org> Cc: Xinliang Liu <xinliang.liu(a)linaro.org> Cc: Xinwei Kong <kong.kongxinwei(a)hisilicon.com> Cc: Yong Wu <yong.wu(a)mediatek.com> Cc: Vitaly Lubart <vitaly.lubart(a)intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio(a)intel.com> Cc: Rodrigo Vivi <rodrigo.vivi(a)intel.com> Cc: Kai Vehmanen <kai.vehmanen(a)linux.intel.com> base-commit: 136057256686de39cc3a07c2e39ef6bc43003ff6 -- https://chromeos.dev

4 42

[v1 0/2] drm/msm/dsi: Add 10nm dsi phy tuning configuration support
by Rajeev Nandan 06 Jan '22

06 Jan '22

This series is to add DSI PHY tuning support in Qualcomm Snapdragon SoCs with 10nm DSI PHY e.g. SC7180 In most cases the default values of DSI PHY tuning registers should be sufficient as they are fully optimized. However, in some cases (for example, where extreme board parasitics cause the eye shape to degrade), the override bits can be used to improve the signal quality. As per the MSM DSI PHY (10nm) tuning guideline, the drive strength can be adjusted using DSIPHY_RESCODE_OFFSET_TOP & DSIPHY_RESCODE_OFFSET_BOT registers, and the drive level can be adjusted using DSIPHY_CMN_VREG_CTRL register. Add DSI PHY tuning support for 10nm PHY. This can be extended to other DSI PHY versions if needed. Number of registers to configure the PHY tuning per lane can be different for different versions of the DSI PHY. I tried to make it generic so that it can be extended to other versions. Rajeev Nandan (2): dt-bindings: msm/dsi: Add 10nm dsi phy tuning properties drm/msm/dsi: Add 10nm dsi phy tuning configuration support .../bindings/display/msm/dsi-phy-10nm.yaml | 19 ++++++++ drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 55 ++++++++++++++++++++++ drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 23 +++++++++ drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c | 31 +++++++++--- 4 files changed, 122 insertions(+), 6 deletions(-) -- 2.7.4

4 7

[PATCH] drm/msm/dpu: remove extra wrappers around dpu_core_irq
by Dmitry Baryshkov 06 Jan '22

06 Jan '22

Remove extra dpu_irq_* wrappers from dpu_kms.c, merge them directly into dpu_core_irq_* functions. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov(a)linaro.org> --- drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h | 12 ++++----- .../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 9 ++++--- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 27 +++---------------- 3 files changed, 15 insertions(+), 33 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h index 90ae6c9ccc95..7023ccb79814 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h @@ -10,24 +10,24 @@ /** * dpu_core_irq_preinstall - perform pre-installation of core IRQ handler - * @dpu_kms: DPU handle + * @kms: MSM KMS handle * @return: none */ -void dpu_core_irq_preinstall(struct dpu_kms *dpu_kms); +void dpu_core_irq_preinstall(struct msm_kms *kms); /** * dpu_core_irq_uninstall - uninstall core IRQ handler - * @dpu_kms: DPU handle + * @kms: MSM KMS handle * @return: none */ -void dpu_core_irq_uninstall(struct dpu_kms *dpu_kms); +void dpu_core_irq_uninstall(struct msm_kms *kms); /** * dpu_core_irq - core IRQ handler - * @dpu_kms: DPU handle + * @kms: MSM KMS handle * @return: interrupt handling status */ -irqreturn_t dpu_core_irq(struct dpu_kms *dpu_kms); +irqreturn_t dpu_core_irq(struct msm_kms *kms); /** * dpu_core_irq_read - IRQ helper function for reading IRQ status diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c index fc1b6c47c93d..d76edf55693a 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c @@ -144,8 +144,9 @@ static void dpu_core_irq_callback_handler(struct dpu_kms *dpu_kms, int irq_idx) cb->func(cb->arg, irq_idx); } -irqreturn_t dpu_core_irq(struct dpu_kms *dpu_kms) +irqreturn_t dpu_core_irq(struct msm_kms *kms) { + struct dpu_kms *dpu_kms = to_dpu_kms(kms); struct dpu_hw_intr *intr = dpu_kms->hw_intr; int reg_idx; int irq_idx; @@ -551,8 +552,9 @@ void dpu_debugfs_core_irq_init(struct dpu_kms *dpu_kms, } #endif -void dpu_core_irq_preinstall(struct dpu_kms *dpu_kms) +void dpu_core_irq_preinstall(struct msm_kms *kms) { + struct dpu_kms *dpu_kms = to_dpu_kms(kms); int i; pm_runtime_get_sync(&dpu_kms->pdev->dev); @@ -571,8 +573,9 @@ void dpu_core_irq_preinstall(struct dpu_kms *dpu_kms) } } -void dpu_core_irq_uninstall(struct dpu_kms *dpu_kms) +void dpu_core_irq_uninstall(struct msm_kms *kms) { + struct dpu_kms *dpu_kms = to_dpu_kms(kms); int i; if (!dpu_kms->hw_intr) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index a15b26428280..704474c4d655 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -784,20 +784,6 @@ static void dpu_kms_destroy(struct msm_kms *kms) msm_kms_destroy(&dpu_kms->base); } -static irqreturn_t dpu_irq(struct msm_kms *kms) -{ - struct dpu_kms *dpu_kms = to_dpu_kms(kms); - - return dpu_core_irq(dpu_kms); -} - -static void dpu_irq_preinstall(struct msm_kms *kms) -{ - struct dpu_kms *dpu_kms = to_dpu_kms(kms); - - dpu_core_irq_preinstall(dpu_kms); -} - static int dpu_irq_postinstall(struct msm_kms *kms) { struct msm_drm_private *priv; @@ -817,13 +803,6 @@ static int dpu_irq_postinstall(struct msm_kms *kms) return 0; } -static void dpu_irq_uninstall(struct msm_kms *kms) -{ - struct dpu_kms *dpu_kms = to_dpu_kms(kms); - - dpu_core_irq_uninstall(dpu_kms); -} - static void dpu_kms_mdp_snapshot(struct msm_disp_state *disp_state, struct msm_kms *kms) { int i; @@ -871,10 +850,10 @@ static void dpu_kms_mdp_snapshot(struct msm_disp_state *disp_state, struct msm_k static const struct msm_kms_funcs kms_funcs = { .hw_init = dpu_kms_hw_init, - .irq_preinstall = dpu_irq_preinstall, + .irq_preinstall = dpu_core_irq_preinstall, .irq_postinstall = dpu_irq_postinstall, - .irq_uninstall = dpu_irq_uninstall, - .irq = dpu_irq, + .irq_uninstall = dpu_core_irq_uninstall, + .irq = dpu_core_irq, .enable_commit = dpu_kms_enable_commit, .disable_commit = dpu_kms_disable_commit, .vsync_time = dpu_kms_vsync_time, -- 2.33.0

2 1

[PATCH] drm/panel: Update Boe-tv110c9m initial code
by yangcong 06 Jan '22

06 Jan '22

Optimize two problems a)Turn off low voltage detection register.During the esd test, the low-voltage detection ic may be triggered to enter the slpin state, so a black screen occurs on the panel. b)Optimize CMD2 page1 gamma. Signed-off-by: yangcong <yangcong5(a)huaqin.corp-partner.google.com> --- drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c index 5fcbde789ddb..1be150ac758f 100644 --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c @@ -86,7 +86,7 @@ static const struct panel_init_cmd boe_tv110c9m_init_cmd[] = { _INIT_DCS_CMD(0x0F, 0x73), _INIT_DCS_CMD(0x95, 0xE6), _INIT_DCS_CMD(0x96, 0xF0), - _INIT_DCS_CMD(0x30, 0x11), + _INIT_DCS_CMD(0x30, 0x00), _INIT_DCS_CMD(0x6D, 0x66), _INIT_DCS_CMD(0x75, 0xA2), _INIT_DCS_CMD(0x77, 0x3B), @@ -112,17 +112,17 @@ static const struct panel_init_cmd boe_tv110c9m_init_cmd[] = { _INIT_DCS_CMD(0xB1, 0x00, 0xD2, 0x01, 0x0B, 0x01, 0x34, 0x01, 0x76, 0x01, 0xA3, 0x01, 0xEF, 0x02, 0x27, 0x02, 0x29), _INIT_DCS_CMD(0xB2, 0x02, 0x5F, 0x02, 0x9E, 0x02, 0xC9, 0x03, 0x00, 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73), - _INIT_DCS_CMD(0xB3, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xA7, 0x03, 0xCF, 0x03, 0xDE, 0x03, 0xE0), + _INIT_DCS_CMD(0xB3, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xAF, 0x03, 0xDF, 0x03, 0xF5, 0x03, 0xE0), _INIT_DCS_CMD(0xB4, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, 0x99, 0x00, 0xAE, 0x00, 0xC1), _INIT_DCS_CMD(0xB5, 0x00, 0xD2, 0x01, 0x0B, 0x01, 0x34, 0x01, 0x76, 0x01, 0xA3, 0x01, 0xEF, 0x02, 0x27, 0x02, 0x29), _INIT_DCS_CMD(0xB6, 0x02, 0x5F, 0x02, 0x9E, 0x02, 0xC9, 0x03, 0x00, 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73), - _INIT_DCS_CMD(0xB7, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xA7, 0x03, 0xCF, 0x03, 0xDE, 0x03, 0xE0), + _INIT_DCS_CMD(0xB7, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xAF, 0x03, 0xDF, 0x03, 0xF5, 0x03, 0xE0), _INIT_DCS_CMD(0xB8, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, 0x99, 0x00, 0xAE, 0x00, 0xC1), _INIT_DCS_CMD(0xB9, 0x00, 0xD2, 0x01, 0x0B, 0x01, 0x34, 0x01, 0x76, 0x01, 0xA3, 0x01, 0xEF, 0x02, 0x27, 0x02, 0x29), _INIT_DCS_CMD(0xBA, 0x02, 0x5F, 0x02, 0x9E, 0x02, 0xC9, 0x03, 0x00, 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73), - _INIT_DCS_CMD(0xBB, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xA7, 0x03, 0xCF, 0x03, 0xDE, 0x03, 0xE0), + _INIT_DCS_CMD(0xBB, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xAF, 0x03, 0xDF, 0x03, 0xF5, 0x03, 0xE0), _INIT_DCS_CMD(0xFF, 0x24), _INIT_DCS_CMD(0xFB, 0x01), -- 2.25.1

2 1

[PATCH] drm/msm/dp: Simplify dp_debug_init() and dp_debug_get()
by Christophe JAILLET 05 Jan '22

05 Jan '22

dp_debug_init() always returns 0. So, make it a void function and simplify the only caller accordingly. While at it remove a useless 'rc' initialization in dp_debug_get() Signed-off-by: Christophe JAILLET <christophe.jaillet(a)wanadoo.fr> --- drivers/gpu/drm/msm/dp/dp_debug.c | 13 +++---------- 1 file changed, 3 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_debug.c b/drivers/gpu/drm/msm/dp/dp_debug.c index da4323556ef3..338f1f9c4d14 100644 --- a/drivers/gpu/drm/msm/dp/dp_debug.c +++ b/drivers/gpu/drm/msm/dp/dp_debug.c @@ -207,9 +207,8 @@ static const struct file_operations test_active_fops = { .write = dp_test_active_write }; -static int dp_debug_init(struct dp_debug *dp_debug, struct drm_minor *minor) +static void dp_debug_init(struct dp_debug *dp_debug, struct drm_minor *minor) { - int rc = 0; struct dp_debug_private *debug = container_of(dp_debug, struct dp_debug_private, dp_debug); @@ -229,17 +228,15 @@ static int dp_debug_init(struct dp_debug *dp_debug, struct drm_minor *minor) debug, &dp_test_type_fops); debug->root = minor->debugfs_root; - - return rc; } struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel, struct dp_usbpd *usbpd, struct dp_link *link, struct drm_connector *connector, struct drm_minor *minor) { - int rc = 0; struct dp_debug_private *debug; struct dp_debug *dp_debug; + int rc; if (!dev || !panel || !usbpd || !link) { DRM_ERROR("invalid input\n"); @@ -266,11 +263,7 @@ struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel, dp_debug->hdisplay = 0; dp_debug->vrefresh = 0; - rc = dp_debug_init(dp_debug, minor); - if (rc) { - devm_kfree(dev, debug); - goto error; - } + dp_debug_init(dp_debug, minor); return dp_debug; error: -- 2.32.0

2 1

[i-g-t 00/14] Add IGT support for plane color management
by Bhanuprakash Modem 05 Jan '22

05 Jan '22

>From the Plane Color Management feature design, userspace can take the smart blending decisions based on hardware supported plane color features to obtain an accurate color profile. These IGT patches extend the existing pipe color management tests to the plane level. Kernel implementation: https://patchwork.freedesktop.org/series/90825/ Bhanuprakash Modem (11): HAX: Get uapi headers to compile the IGT lib/igt_kms: Add plane color mgmt properties kms_color_helper: Add helper functions for plane color mgmt tests/kms_color: New subtests for Plane gamma tests/kms_color: New subtests for Plane degamma tests/kms_color: New subtests for Plane CTM tests/kms_color: New negative tests for plane level color mgmt tests/kms_color_chamelium: New subtests for Plane gamma tests/kms_color_chamelium: New subtests for Plane degamma tests/kms_color_chamelium: New subtests for Plane CTM tests/kms_color_chamelium: Extended IGT tests to support logarithmic gamma mode Mukunda Pramodh Kumar (3): lib/igt_kms: Add pipe color mgmt properties kms_color_helper: Add helper functions to support logarithmic gamma mode tests/kms_color: Extended IGT tests to support logarithmic gamma mode include/drm-uapi/drm.h | 10 + include/drm-uapi/drm_mode.h | 28 ++ lib/igt_kms.c | 6 + lib/igt_kms.h | 6 + tests/kms_color.c | 674 +++++++++++++++++++++++++++++++++++- tests/kms_color_chamelium.c | 588 ++++++++++++++++++++++++++++++- tests/kms_color_helper.c | 300 ++++++++++++++++ tests/kms_color_helper.h | 45 +++ 8 files changed, 1648 insertions(+), 9 deletions(-) -- 2.32.0

4 42

[PATCH] mediatek: Set default value for Panel Orientation connector prop.
by Mark Yacoub 05 Jan '22

05 Jan '22

From: Mark Yacoub <markyacoub(a)google.com> [Why] Creating the prop uses UNKNOWN as the initial value, which is not a supported value if the props is to be supported. [How] Set the panel orientation default value to NORMAL right after creating the prop. Tested on Jacuzzi(MTK) Fixes IGT@kms_properties@get_properties-sanity-{atomic,non-atomic} Signed-off-by: Mark Yacoub <markyacoub(a)chromium.org> --- drivers/gpu/drm/mediatek/mtk_dsi.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index 0ad7157660afa..b7c2528a8f41c 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -1039,6 +1039,8 @@ static int mtk_dsi_encoder_init(struct drm_device *drm, struct mtk_dsi *dsi) DRM_ERROR("Unable to init panel orientation\n"); goto err_cleanup_encoder; } + drm_connector_set_panel_orientation(dsi->connector, + DRM_MODE_PANEL_ORIENTATION_NORMAL); drm_connector_attach_encoder(dsi->connector, &dsi->encoder); -- 2.33.0.1079.g6e70778dc9-goog

3 10

[PATCH v2] drm/msm/dp: add support of tps4 (training pattern 4) for HBR3
by Kuogee Hsieh 05 Jan '22

05 Jan '22

From: Kuogee Hsieh <khsieh(a)codeaurora.org> Some DP sinkers prefer to use tps4 instead of tps3 during training #2. This patch will use tps4 to perform link training #2 if sinker's DPCD supports it. Changes in V2: -- replace dp_catalog_ctrl_set_pattern() with dp_catalog_ctrl_set_pattern_state_bit() Signed-off-by: Kuogee Hsieh <quic_khsieh(a)quicinc.com> --- drivers/gpu/drm/msm/dp/dp_catalog.c | 12 ++++++------ drivers/gpu/drm/msm/dp/dp_catalog.h | 2 +- drivers/gpu/drm/msm/dp/dp_ctrl.c | 19 ++++++++++++++----- 3 files changed, 21 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.c b/drivers/gpu/drm/msm/dp/dp_catalog.c index 6ae9b29..64f0b26 100644 --- a/drivers/gpu/drm/msm/dp/dp_catalog.c +++ b/drivers/gpu/drm/msm/dp/dp_catalog.c @@ -456,19 +456,19 @@ void dp_catalog_ctrl_config_msa(struct dp_catalog *dp_catalog, dp_write_p0(catalog, MMSS_DP_DSC_DTO, 0x0); } -int dp_catalog_ctrl_set_pattern(struct dp_catalog *dp_catalog, - u32 pattern) +int dp_catalog_ctrl_set_pattern_state_bit(struct dp_catalog *dp_catalog, + u32 state_bit) { int bit, ret; u32 data; struct dp_catalog_private *catalog = container_of(dp_catalog, struct dp_catalog_private, dp_catalog); - bit = BIT(pattern - 1); - DRM_DEBUG_DP("hw: bit=%d train=%d\n", bit, pattern); + bit = BIT(state_bit - 1); + DRM_DEBUG_DP("hw: bit=%d train=%d\n", bit, state_bit); dp_catalog_ctrl_state_ctrl(dp_catalog, bit); - bit = BIT(pattern - 1) << DP_MAINLINK_READY_LINK_TRAINING_SHIFT; + bit = BIT(state_bit - 1) << DP_MAINLINK_READY_LINK_TRAINING_SHIFT; /* Poll for mainlink ready status */ ret = readx_poll_timeout(readl, catalog->io->dp_controller.link.base + @@ -476,7 +476,7 @@ int dp_catalog_ctrl_set_pattern(struct dp_catalog *dp_catalog, data, data & bit, POLLING_SLEEP_US, POLLING_TIMEOUT_US); if (ret < 0) { - DRM_ERROR("set pattern for link_train=%d failed\n", pattern); + DRM_ERROR("set state_bit for link_train=%d failed\n", state_bit); return ret; } return 0; diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.h b/drivers/gpu/drm/msm/dp/dp_catalog.h index 6965afa..7dea101 100644 --- a/drivers/gpu/drm/msm/dp/dp_catalog.h +++ b/drivers/gpu/drm/msm/dp/dp_catalog.h @@ -94,7 +94,7 @@ void dp_catalog_ctrl_mainlink_ctrl(struct dp_catalog *dp_catalog, bool enable); void dp_catalog_ctrl_config_misc(struct dp_catalog *dp_catalog, u32 cc, u32 tb); void dp_catalog_ctrl_config_msa(struct dp_catalog *dp_catalog, u32 rate, u32 stream_rate_khz, bool fixed_nvid); -int dp_catalog_ctrl_set_pattern(struct dp_catalog *dp_catalog, u32 pattern); +int dp_catalog_ctrl_set_pattern_state_bit(struct dp_catalog *dp_catalog, u32 pattern); void dp_catalog_ctrl_reset(struct dp_catalog *dp_catalog); bool dp_catalog_ctrl_mainlink_ready(struct dp_catalog *dp_catalog); void dp_catalog_ctrl_enable_irq(struct dp_catalog *dp_catalog, bool enable); diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c index 39558a2..da6c083 100644 --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c @@ -1078,12 +1078,13 @@ static int dp_ctrl_link_train_1(struct dp_ctrl_private *ctrl, int tries, old_v_level, ret = 0; u8 link_status[DP_LINK_STATUS_SIZE]; int const maximum_retries = 4; + char state_ctrl_bit = 1; dp_catalog_ctrl_state_ctrl(ctrl->catalog, 0); *training_step = DP_TRAINING_1; - ret = dp_catalog_ctrl_set_pattern(ctrl->catalog, DP_TRAINING_PATTERN_1); + ret = dp_catalog_ctrl_set_pattern_state_bit(ctrl->catalog, state_ctrl_bit); if (ret) return ret; dp_ctrl_train_pattern_set(ctrl, DP_TRAINING_PATTERN_1 | @@ -1181,7 +1182,7 @@ static int dp_ctrl_link_train_2(struct dp_ctrl_private *ctrl, int *training_step) { int tries = 0, ret = 0; - char pattern; + char pattern, state_ctrl_bit; int const maximum_retries = 5; u8 link_status[DP_LINK_STATUS_SIZE]; @@ -1189,12 +1190,20 @@ static int dp_ctrl_link_train_2(struct dp_ctrl_private *ctrl, *training_step = DP_TRAINING_2; - if (drm_dp_tps3_supported(ctrl->panel->dpcd)) + if (drm_dp_tps4_supported(ctrl->panel->dpcd)) { + pattern = DP_TRAINING_PATTERN_4; + state_ctrl_bit = 4; + } + else if (drm_dp_tps3_supported(ctrl->panel->dpcd)) { pattern = DP_TRAINING_PATTERN_3; - else + state_ctrl_bit = 3; + } + else { pattern = DP_TRAINING_PATTERN_2; + state_ctrl_bit = 2; + } - ret = dp_catalog_ctrl_set_pattern(ctrl->catalog, pattern); + ret = dp_catalog_ctrl_set_pattern_state_bit(ctrl->catalog, state_ctrl_bit); if (ret) return ret; -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project

2 1

[PATCH] drm/msm/dp: Fix a potential double free in an error handling path
by Christophe JAILLET 05 Jan '22

05 Jan '22

'dp_bridge' is devm_alloc'ed, so there is no need to free it explicitly or there will be a double free(). Fixes: 8a3b4c17f863 ("drm/msm/dp: employ bridge mechanism for display enable and disable") Signed-off-by: Christophe JAILLET <christophe.jaillet(a)wanadoo.fr> --- drivers/gpu/drm/msm/dp/dp_drm.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/msm/dp/dp_drm.c b/drivers/gpu/drm/msm/dp/dp_drm.c index 188e77c59885..d4d360d19eba 100644 --- a/drivers/gpu/drm/msm/dp/dp_drm.c +++ b/drivers/gpu/drm/msm/dp/dp_drm.c @@ -243,7 +243,6 @@ struct drm_bridge *msm_dp_bridge_init(struct msm_dp *dp_display, struct drm_devi rc = drm_bridge_attach(encoder, bridge, NULL, DRM_BRIDGE_ATTACH_NO_CONNECTOR); if (rc) { DRM_ERROR("failed to attach bridge, rc=%d\n", rc); - kfree(dp_bridge); return ERR_PTR(rc); } -- 2.32.0

3 3

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dri-devel December 2021