dri-devel August 2021

dri-devel@lists.freedesktop.org

324 participants
762 discussions

[PATCH] drm/sun4i: Fix macros in sun8i_csc.h
by Jernej Skrabec 01 Sep '21

01 Sep '21

Macros SUN8I_CSC_CTRL() and SUN8I_CSC_COEFF() don't follow usual recommendation of having arguments enclosed in parenthesis. While that didn't change anything for quiet sometime, it actually become important after CSC code rework with commit ea067aee45a8 ("drm/sun4i: de2/de3: Remove redundant CSC matrices"). Without this fix, colours are completely off for supported YVU formats on SoCs with DE2 (A64, H3, R40, etc.). Fix the issue by enclosing macro arguments in parenthesis. Cc: stable(a)vger.kernel.org # 5.12+ Fixes: 883029390550 ("drm/sun4i: Add DE2 CSC library") Reported-by: Roman Stratiienko <r.stratiienko(a)gmail.com> Signed-off-by: Jernej Skrabec <jernej.skrabec(a)gmail.com> --- drivers/gpu/drm/sun4i/sun8i_csc.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.h b/drivers/gpu/drm/sun4i/sun8i_csc.h index a55a38ad849c..022cafa6c06c 100644 --- a/drivers/gpu/drm/sun4i/sun8i_csc.h +++ b/drivers/gpu/drm/sun4i/sun8i_csc.h @@ -16,8 +16,8 @@ struct sun8i_mixer; #define CCSC10_OFFSET 0xA0000 #define CCSC11_OFFSET 0xF0000 -#define SUN8I_CSC_CTRL(base) (base + 0x0) -#define SUN8I_CSC_COEFF(base, i) (base + 0x10 + 4 * i) +#define SUN8I_CSC_CTRL(base) ((base) + 0x0) +#define SUN8I_CSC_COEFF(base, i) ((base) + 0x10 + 4 * (i)) #define SUN8I_CSC_CTRL_EN BIT(0) -- 2.33.0

3 2

[PATCH] drm/sun4i: Make use of the helper function devm_platform_ioremap_resource()
by Cai Huoqing 01 Sep '21

01 Sep '21

Use the devm_platform_ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately Signed-off-by: Cai Huoqing <caihuoqing(a)baidu.com> --- drivers/gpu/drm/sun4i/sun4i_backend.c | 4 +--- drivers/gpu/drm/sun4i/sun4i_frontend.c | 4 +--- drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c | 4 +--- drivers/gpu/drm/sun4i/sun4i_tcon.c | 4 +--- drivers/gpu/drm/sun4i/sun4i_tv.c | 4 +--- drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 4 +--- drivers/gpu/drm/sun4i/sun8i_mixer.c | 4 +--- drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 4 +--- 8 files changed, 8 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c b/drivers/gpu/drm/sun4i/sun4i_backend.c index bf8cfefa0365..f52ff4e6c662 100644 --- a/drivers/gpu/drm/sun4i/sun4i_backend.c +++ b/drivers/gpu/drm/sun4i/sun4i_backend.c @@ -782,7 +782,6 @@ static int sun4i_backend_bind(struct device *dev, struct device *master, struct sun4i_drv *drv = drm->dev_private; struct sun4i_backend *backend; const struct sun4i_backend_quirks *quirks; - struct resource *res; void __iomem *regs; int i, ret; @@ -815,8 +814,7 @@ static int sun4i_backend_bind(struct device *dev, struct device *master, if (IS_ERR(backend->frontend)) dev_warn(dev, "Couldn't find matching frontend, frontend features disabled\n"); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - regs = devm_ioremap_resource(dev, res); + regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(regs)) return PTR_ERR(regs); diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.c b/drivers/gpu/drm/sun4i/sun4i_frontend.c index edb60ae0a9b7..56ae38389db0 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.c +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.c @@ -561,7 +561,6 @@ static int sun4i_frontend_bind(struct device *dev, struct device *master, struct sun4i_frontend *frontend; struct drm_device *drm = data; struct sun4i_drv *drv = drm->dev_private; - struct resource *res; void __iomem *regs; frontend = devm_kzalloc(dev, sizeof(*frontend), GFP_KERNEL); @@ -576,8 +575,7 @@ static int sun4i_frontend_bind(struct device *dev, struct device *master, if (!frontend->data) return -ENODEV; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - regs = devm_ioremap_resource(dev, res); + regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(regs)) return PTR_ERR(regs); diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c b/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c index 2f2c9f0a1071..3799a745b7dd 100644 --- a/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c +++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c @@ -489,7 +489,6 @@ static int sun4i_hdmi_bind(struct device *dev, struct device *master, struct cec_connector_info conn_info; struct sun4i_drv *drv = drm->dev_private; struct sun4i_hdmi *hdmi; - struct resource *res; u32 reg; int ret; @@ -504,8 +503,7 @@ static int sun4i_hdmi_bind(struct device *dev, struct device *master, if (!hdmi->variant) return -EINVAL; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - hdmi->base = devm_ioremap_resource(dev, res); + hdmi->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(hdmi->base)) { dev_err(dev, "Couldn't map the HDMI encoder registers\n"); return PTR_ERR(hdmi->base); diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index 9f06dec0fc61..88db2d2a9336 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -841,11 +841,9 @@ static int sun4i_tcon_init_regmap(struct device *dev, struct sun4i_tcon *tcon) { struct platform_device *pdev = to_platform_device(dev); - struct resource *res; void __iomem *regs; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - regs = devm_ioremap_resource(dev, res); + regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(regs)) return PTR_ERR(regs); diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c index cb91bc11a0c7..94883abe0dfd 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tv.c +++ b/drivers/gpu/drm/sun4i/sun4i_tv.c @@ -538,7 +538,6 @@ static int sun4i_tv_bind(struct device *dev, struct device *master, struct drm_device *drm = data; struct sun4i_drv *drv = drm->dev_private; struct sun4i_tv *tv; - struct resource *res; void __iomem *regs; int ret; @@ -548,8 +547,7 @@ static int sun4i_tv_bind(struct device *dev, struct device *master, tv->drv = drv; dev_set_drvdata(dev, tv); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - regs = devm_ioremap_resource(dev, res); + regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(regs)) { dev_err(dev, "Couldn't map the TV encoder registers\n"); return PTR_ERR(regs); diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c index 4f5efcace68e..4371684697bd 100644 --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c @@ -1104,7 +1104,6 @@ static int sun6i_dsi_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; const char *bus_clk_name = NULL; struct sun6i_dsi *dsi; - struct resource *res; void __iomem *base; int ret; @@ -1120,8 +1119,7 @@ static int sun6i_dsi_probe(struct platform_device *pdev) "allwinner,sun6i-a31-mipi-dsi")) bus_clk_name = "bus"; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - base = devm_ioremap_resource(dev, res); + base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(base)) { dev_err(dev, "Couldn't map the DSI encoder registers\n"); return PTR_ERR(base); diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index 5b42cf25cc86..f5e8aeaa3cdf 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -337,7 +337,6 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, struct drm_device *drm = data; struct sun4i_drv *drv = drm->dev_private; struct sun8i_mixer *mixer; - struct resource *res; void __iomem *regs; unsigned int base; int plane_cnt; @@ -390,8 +389,7 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, if (!mixer->cfg) return -EINVAL; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - regs = devm_ioremap_resource(dev, res); + regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(regs)) return PTR_ERR(regs); diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c index 75d8e60c149d..1b9b8b48f4a7 100644 --- a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c +++ b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c @@ -128,7 +128,6 @@ static int sun8i_tcon_top_bind(struct device *dev, struct device *master, struct clk_hw_onecell_data *clk_data; struct sun8i_tcon_top *tcon_top; const struct sun8i_tcon_top_quirks *quirks; - struct resource *res; void __iomem *regs; int ret, i; @@ -158,8 +157,7 @@ static int sun8i_tcon_top_bind(struct device *dev, struct device *master, return PTR_ERR(tcon_top->bus); } - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - regs = devm_ioremap_resource(dev, res); + regs = devm_platform_ioremap_resource(pdev, 0); tcon_top->regs = regs; if (IS_ERR(regs)) return PTR_ERR(regs); -- 2.25.1

3 2

[PATCH] drm/vc4: Make use of the helper function devm_platform_ioremap_resource()
by Cai Huoqing 01 Sep '21

01 Sep '21

Use the devm_platform_ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately Signed-off-by: Cai Huoqing <caihuoqing(a)baidu.com> --- drivers/gpu/drm/vc4/vc4_drv.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_drv.c b/drivers/gpu/drm/vc4/vc4_drv.c index f6c16c5aee68..16abc3a3d601 100644 --- a/drivers/gpu/drm/vc4/vc4_drv.c +++ b/drivers/gpu/drm/vc4/vc4_drv.c @@ -50,13 +50,11 @@ #define DRIVER_PATCHLEVEL 0 /* Helper function for mapping the regs on a platform device. */ -void __iomem *vc4_ioremap_regs(struct platform_device *dev, int index) +void __iomem *vc4_ioremap_regs(struct platform_device *pdev, int index) { - struct resource *res; void __iomem *map; - res = platform_get_resource(dev, IORESOURCE_MEM, index); - map = devm_ioremap_resource(&dev->dev, res); + map = devm_platform_ioremap_resource(pdev, index); if (IS_ERR(map)) return map; -- 2.25.1

2 1

[PATCH] drm/imx: imx-tve: Make use of the helper function devm_platform_ioremap_resource()
by Cai Huoqing 01 Sep '21

01 Sep '21

Use the devm_platform_ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately Signed-off-by: Cai Huoqing <caihuoqing(a)baidu.com> --- drivers/gpu/drm/imx/imx-tve.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpu/drm/imx/imx-tve.c b/drivers/gpu/drm/imx/imx-tve.c index bc8c3f802a15..2b1fdf2cbbce 100644 --- a/drivers/gpu/drm/imx/imx-tve.c +++ b/drivers/gpu/drm/imx/imx-tve.c @@ -526,7 +526,6 @@ static int imx_tve_probe(struct platform_device *pdev) struct device_node *np = dev->of_node; struct device_node *ddc_node; struct imx_tve *tve; - struct resource *res; void __iomem *base; unsigned int val; int irq; @@ -568,8 +567,7 @@ static int imx_tve_probe(struct platform_device *pdev) } } - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - base = devm_ioremap_resource(dev, res); + base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(base)) return PTR_ERR(base); -- 2.25.1

2 1

[PATCH v6 0/3] support gce on mt8192 platform
by Yongqiang Niu 01 Sep '21

01 Sep '21

Change since v5: -rebase on linux 5.14-rc1 Yongqiang Niu (3): dt-binding: gce: add gce header file for mt8192 arm64: dts: mt8192: add gce node mailbox: cmdq: add mt8192 support .../devicetree/bindings/mailbox/mtk-gce.txt | 7 +- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 10 + drivers/mailbox/mtk-cmdq-mailbox.c | 10 + include/dt-bindings/gce/mt8192-gce.h | 335 +++++++++++++++++++++ 4 files changed, 359 insertions(+), 3 deletions(-) create mode 100644 include/dt-bindings/gce/mt8192-gce.h -- 1.8.1.1.dirty

2 4

[PATCH] drm/sched: fix the bug of time out calculation(v3)
by Monk Liu 01 Sep '21

01 Sep '21

issue: in cleanup_job the cancle_delayed_work will cancel a TO timer even the its corresponding job is still running. fix: do not cancel the timer in cleanup_job, instead do the cancelling only when the heading job is signaled, and if there is a "next" job we start_timeout again. v2: further cleanup the logic, and do the TDR timer cancelling if the signaled job is the last one in its scheduler. v3: change the issue description remove the cancel_delayed_work in the begining of the cleanup_job recover the implement of drm_sched_job_begin. TODO: 1)introduce pause/resume scheduler in job_timeout to serial the handling of scheduler and job_timeout. 2)drop the bad job's del and insert in scheduler due to above serialization (no race issue anymore with the serialization) Signed-off-by: Monk Liu <Monk.Liu(a)amd.com> --- drivers/gpu/drm/scheduler/sched_main.c | 25 ++++++++++--------------- 1 file changed, 10 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c index a2a9536..ecf8140 100644 --- a/drivers/gpu/drm/scheduler/sched_main.c +++ b/drivers/gpu/drm/scheduler/sched_main.c @@ -676,13 +676,7 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) { struct drm_sched_job *job, *next; - /* - * Don't destroy jobs while the timeout worker is running OR thread - * is being parked and hence assumed to not touch pending_list - */ - if ((sched->timeout != MAX_SCHEDULE_TIMEOUT && - !cancel_delayed_work(&sched->work_tdr)) || - kthread_should_park()) + if (kthread_should_park()) return NULL; spin_lock(&sched->job_list_lock); @@ -693,17 +687,21 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) if (job && dma_fence_is_signaled(&job->s_fence->finished)) { /* remove job from pending_list */ list_del_init(&job->list); + + /* cancel this job's TO timer */ + cancel_delayed_work(&sched->work_tdr); /* make the scheduled timestamp more accurate */ next = list_first_entry_or_null(&sched->pending_list, typeof(*next), list); - if (next) + + if (next) { next->s_fence->scheduled.timestamp = job->s_fence->finished.timestamp; - + /* start TO timer for next job */ + drm_sched_start_timeout(sched); + } } else { job = NULL; - /* queue timeout for next job */ - drm_sched_start_timeout(sched); } spin_unlock(&sched->job_list_lock); @@ -791,11 +789,8 @@ static int drm_sched_main(void *param) (entity = drm_sched_select_entity(sched))) || kthread_should_stop()); - if (cleanup_job) { + if (cleanup_job) sched->ops->free_job(cleanup_job); - /* queue timeout for next job */ - drm_sched_start_timeout(sched); - } if (!entity) continue; -- 2.7.4

6 19

[PATCH 0/8] Enable triggered perf query for Xe_HP
by Umesh Nerlige Ramappa 31 Aug '21

31 Aug '21

This is a revival of the patch series to support triggered perf query reports from here - https://patchwork.freedesktop.org/series/83831/ The patches were not pushed earlier because corresponding UMD changes were missing. This revival addresses UMD changes in GPUvis for this series. GPUvis uses the perf library in igt-gpu-tools. Changes to the library are here - https://patchwork.freedesktop.org/series/93355/ GPUvis changes will be posted as a PR once the above library and kernel changes are pushed. Summary of the feature: Current platforms provide MI_REPORT_PERF_COUNT to query a snapshot of perf counters from a batch. This mechanism does not have consistent support on all engines for newer platforms. To support perf query, all new platforms use a mechanism to trigger OA report snapshots into the OA buffer by writing to a HW register from a batch. To lookup this report in the OA buffer quickly, the OA buffer is mmapped into the user space. This series implements the new query mechanism. v2: Fix BAT failure (Umesh) v3: Fix selftest (Umesh) v4: Update uapi comment (Umesh) Test-with: 20210830193337.15260-1-umesh.nerlige.ramappa(a)intel.com Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa(a)intel.com> Chris Wilson (3): drm/i915/gt: Refactor _wa_add to reuse wa_index and wa_list_grow drm/i915/gt: Check for conflicting RING_NONPRIV drm/i915/gt: Enable dynamic adjustment of RING_NONPRIV Piotr Maciejewski (1): drm/i915/perf: Ensure observation logic is not clock gated Umesh Nerlige Ramappa (4): drm/i915/gt: Lock intel_engine_apply_whitelist with uncore->lock drm/i915/perf: Whitelist OA report trigger registers drm/i915/perf: Whitelist OA counter and buffer registers drm/i915/perf: Map OA buffer to user space for gen12 performance query drivers/gpu/drm/i915/gem/i915_gem_mman.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_mman.h | 2 + drivers/gpu/drm/i915/gt/intel_workarounds.c | 269 +++++++++++++----- drivers/gpu/drm/i915/gt/intel_workarounds.h | 7 + .../gpu/drm/i915/gt/selftest_workarounds.c | 267 +++++++++++++++++ drivers/gpu/drm/i915/i915_perf.c | 228 ++++++++++++++- drivers/gpu/drm/i915/i915_perf_types.h | 8 + drivers/gpu/drm/i915/i915_reg.h | 30 +- include/uapi/drm/i915_drm.h | 33 +++ 9 files changed, 758 insertions(+), 88 deletions(-) -- 2.20.1

3 11

[PATCH 00/27] Clean up GuC CI failures, simplify locking, and kernel DOC
by Matthew Brost 31 Aug '21

31 Aug '21

Daniel Vetter pointed out that locking in the GuC submission code was overly complicated, let's clean this up a bit before introducing more features in the GuC submission backend. Also fix some CI failures, port fixes from our internal tree, and add a few more selftests for coverage. Lastly, add some kernel DOC explaining how the GuC submission backend works. v2: Fix logic error in 'Workaround reset G2H is received after schedule done G2H', don't propagate errors to dependent fences in execlists submissiom, resolve checkpatch issues, resend to correct lists v3: Fix issue kicking tasklet, drop guc_active, fix ref counting in xarray, add guc_id sub structure, drop inline fuctions, and various other cleanup suggested by Daniel v4: Address Daniele's feedback, rebase to tip, resend for CI Signed-off-by: Matthew Brost <matthew.brost(a)intel.com> Matthew Brost (27): drm/i915/guc: Fix blocked context accounting drm/i915/guc: Fix outstanding G2H accounting drm/i915/guc: Unwind context requests in reverse order drm/i915/guc: Don't drop ce->guc_active.lock when unwinding context drm/i915/guc: Process all G2H message at once in work queue drm/i915/guc: Workaround reset G2H is received after schedule done G2H Revert "drm/i915/gt: Propagate change in error status to children on unhold" drm/i915/selftests: Add a cancel request selftest that triggers a reset drm/i915/guc: Kick tasklet after queuing a request drm/i915/guc: Don't enable scheduling on a banned context, guc_id invalid, not registered drm/i915/guc: Copy whole golden context, set engine state size of subset drm/i915/selftests: Add initial GuC selftest for scrubbing lost G2H drm/i915/guc: Take context ref when cancelling request drm/i915/guc: Don't touch guc_state.sched_state without a lock drm/i915/guc: Reset LRC descriptor if register returns -ENODEV drm/i915: Allocate error capture in nowait context drm/i915/guc: Flush G2H work queue during reset drm/i915/guc: Release submit fence from an irq_work drm/i915/guc: Move guc_blocked fence to struct guc_state drm/i915/guc: Rework and simplify locking drm/i915/guc: Proper xarray usage for contexts_lookup drm/i915/guc: Drop pin count check trick between sched_disable and re-pin drm/i915/guc: Move GuC priority fields in context under guc_active drm/i915/guc: Move fields protected by guc->contexts_lock into sub structure drm/i915/guc: Drop guc_active move everything into guc_state drm/i915/guc: Add GuC kernel doc drm/i915/guc: Drop static inline functions intel_guc_submission.c drivers/gpu/drm/i915/gt/intel_context.c | 19 +- drivers/gpu/drm/i915/gt/intel_context_types.h | 81 +- .../drm/i915/gt/intel_execlists_submission.c | 4 - drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 6 +- drivers/gpu/drm/i915/gt/uc/intel_guc.h | 19 +- drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 28 +- drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 6 +- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 996 +++++++++++------- drivers/gpu/drm/i915/gt/uc/selftest_guc.c | 127 +++ drivers/gpu/drm/i915/i915_gpu_error.c | 39 +- drivers/gpu/drm/i915/i915_request.h | 23 +- drivers/gpu/drm/i915/i915_trace.h | 12 +- .../drm/i915/selftests/i915_live_selftests.h | 1 + drivers/gpu/drm/i915/selftests/i915_request.c | 100 ++ .../i915/selftests/intel_scheduler_helpers.c | 12 + .../i915/selftests/intel_scheduler_helpers.h | 2 + 16 files changed, 983 insertions(+), 492 deletions(-) create mode 100644 drivers/gpu/drm/i915/gt/uc/selftest_guc.c -- 2.32.0

5 39

DE2.0 YV12 playback issues after ea067aee45a8
by Roman Stratiienko 31 Aug '21

31 Aug '21

Hello Jernej, During local testing I faced an issue where YV12 buffers are displayed all in blue. Issue can be fixed by reverting: ea067aee45a8 ("drm/sun4i: de2/de3: Remove redundant CSC matrices") Could you have a look please? Best regards, Roman Stratiienko

2 5

[PATCH] drm/mipi: set fwnode when a mipi_dsi_device is registered
by Will McVicker 31 Aug '21

31 Aug '21

This allows the fw_devlink feature to work across mipi_dsi bus devices too. This feature avoids unnecessary probe deferrals of mipi_dsi devices, defers consumers of mipi_dsi devices till the mipi_dsi devices probe, and allows mipi_dsi drivers to implement sync_state() callbacks. Suggested-by: Saravana Kannan <saravanak(a)google.com> Signed-off-by: Will McVicker <willmcvicker(a)google.com> Reviewed-by: Saravana Kannan <saravanak(a)google.com> --- drivers/gpu/drm/drm_mipi_dsi.c | 1 + 1 file changed, 1 insertion(+) v2: Thanks Saravana for the comments! I updated the commit message and added your reviewed-by. diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c index 5dd475e82995..469d56cf2a50 100644 --- a/drivers/gpu/drm/drm_mipi_dsi.c +++ b/drivers/gpu/drm/drm_mipi_dsi.c @@ -222,6 +222,7 @@ mipi_dsi_device_register_full(struct mipi_dsi_host *host, } dsi->dev.of_node = info->node; + dsi->dev.fwnode = of_fwnode_handle(info->node); dsi->channel = info->channel; strlcpy(dsi->name, info->type, sizeof(dsi->name)); -- 2.32.0.402.g57bb445576-goog

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dri-devel August 2021