dri-devel August 2021

dri-devel@lists.freedesktop.org

324 participants
762 discussions

nouveau resume regression after 64f7c698bea9 ("drm/nouveau/fifo: add engine_id hook")
by Jarkko Nikula 18 Aug '21

18 Aug '21

Hi My old Thinkpad T410i won't resume properly anymore after suspend or hibernation after v5.12 including today's head 614cb2751d31 ("Merge tag 'trace-v5.14-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace"). I bisected regression to commit 64f7c698bea9 ("drm/nouveau/fifo: add engine_id hook"). Issue is that Xorg screen is completely messed up, like screen is filled with random pixels and changing patterns. Text console is fine but Xorg doesn't get better when switching between them. $ sudo lspci -s 01:00.0 -nnv 01:00.0 VGA compatible controller [0300]: NVIDIA Corporation GT218M [NVS 3100M] [10de:0a6c] (rev a2) (prog-if 00 [VGA controller]) Subsystem: Lenovo ThinkPad T410 [17aa:2142] Flags: bus master, fast devsel, latency 0, IRQ 30 Memory at cc000000 (32-bit, non-prefetchable) [size=16M] Memory at d0000000 (64-bit, prefetchable) [size=256M] Memory at ce000000 (64-bit, prefetchable) [size=32M] I/O ports at 2000 [size=128] Expansion ROM at 000c0000 [virtual] [disabled] [size=128K] Capabilities: [60] Power Management version 3 Capabilities: [68] MSI: Enable+ Count=1/1 Maskable- 64bit+ Capabilities: [78] Express Endpoint, MSI 00 Capabilities: [b4] Vendor Specific Information: Len=14 <?> Capabilities: [100] Virtual Channel Capabilities: [128] Power Budgeting <?> Capabilities: [600] Vendor Specific Information: ID=0001 Rev=1 Len=024 <?> Kernel driver in use: nouveau Kernel modules: nouveau "dmesg | grep -i nouveau" before suspend: [ 0.698044] nouveau 0000:01:00.0: vgaarb: deactivate vga console [ 0.699574] nouveau 0000:01:00.0: NVIDIA GT218 (0a8600a2) [ 0.737665] nouveau 0000:01:00.0: bios: version 70.18.88.00.06 [ 0.738228] nouveau 0000:01:00.0: fb: 256 MiB GDDR3 [ 0.838796] nouveau 0000:01:00.0: DRM: VRAM: 256 MiB [ 0.838798] nouveau 0000:01:00.0: DRM: GART: 1048576 MiB [ 0.838802] nouveau 0000:01:00.0: DRM: TMDS table version 2.0 [ 0.838804] nouveau 0000:01:00.0: DRM: DCB version 4.0 [ 0.838807] nouveau 0000:01:00.0: DRM: DCB outp 00: 01800323 00010034 [ 0.838809] nouveau 0000:01:00.0: DRM: DCB outp 01: 02811300 00000000 [ 0.838811] nouveau 0000:01:00.0: DRM: DCB outp 02: 028223a6 0f220010 [ 0.838813] nouveau 0000:01:00.0: DRM: DCB outp 03: 02822362 00020010 [ 0.838815] nouveau 0000:01:00.0: DRM: DCB outp 04: 048333b6 0f220010 [ 0.838817] nouveau 0000:01:00.0: DRM: DCB outp 05: 04833372 00020010 [ 0.838819] nouveau 0000:01:00.0: DRM: DCB outp 06: 088443c6 0f220010 [ 0.838821] nouveau 0000:01:00.0: DRM: DCB outp 07: 08844382 00020010 [ 0.838823] nouveau 0000:01:00.0: DRM: DCB conn 00: 00000040 [ 0.838825] nouveau 0000:01:00.0: DRM: DCB conn 01: 00000100 [ 0.838827] nouveau 0000:01:00.0: DRM: DCB conn 02: 00101246 [ 0.838828] nouveau 0000:01:00.0: DRM: DCB conn 03: 00202346 [ 0.838830] nouveau 0000:01:00.0: DRM: DCB conn 04: 00410446 [ 0.841812] nouveau 0000:01:00.0: DRM: MM: using COPY for buffer copies [ 1.268466] nouveau 0000:01:00.0: DRM: allocated 1440x900 fb: 0x50000, bo (____ptrval____) [ 1.268527] fbcon: nouveaudrmfb (fb0) is primary device [ 2.600674] nouveau 0000:01:00.0: [drm] fb0: nouveaudrmfb frame buffer device [ 2.632208] [drm] Initialized nouveau 1.3.1 20120801 for 0000:01:00.0 on minor 0 Around suspend/resume dmesg is overrun with these kind of errors: [ 80.883468] nouveau 0000:01:00.0: fb: trapped read at 00005756c0 on channel 1 [0fbce000 DRM] engine 0d [PCE0] client 13 [] subclient 01 [] reason 00000006 [NULL_DMAOBJ] [ 80.883479] nouveau 0000:01:00.0: ce: intr 00000300 [ 80.883504] nouveau 0000:01:00.0: fb: trapped read at 0000576000 on channel 1 [0fbce000 DRM] engine 0d [PCE0] client 13 [] subclient 01 [] reason 00000006 [NULL_DMAOBJ] [ 80.883515] nouveau 0000:01:00.0: ce: intr 00000300 [ 80.883523] nouveau 0000:01:00.0: fb: trapped read at 0000579170 on channel 1 [0fbce000 DRM] engine 0d [PCE0] client 13 [] subclient 01 [] reason 00000006 [NULL_DMAOBJ] [ 80.883535] nouveau 0000:01:00.0: ce: intr 00000300 [ 80.883557] nouveau 0000:01:00.0: fb: trapped write at 000057dbd0 on channel 1 [0fbce000 DRM] engine 0d [PCE0] client 13 [] subclient 02 [] reason 00000006 [NULL_DMAOBJ] ... [ 81.435778] OOM killer enabled. [ 81.435780] Restarting tasks ... [ 81.436020] systemd-journald[248]: /dev/kmsg buffer overrun, some messages lost. [ 81.443134] done. [ 81.445883] nouveau 0000:01:00.0: ce: intr 00000300 [ 81.445908] nouveau 0000:01:00.0: fb: trapped read at 0000026000 on channel 1 [0fbce000 DRM] engine 0d [PCE0] client 13 [] subclient 01 [] reason 00000006 [NULL_DMAOBJ] [ 81.445932] nouveau 0000:01:00.0: ce: intr 00000300 ... [ 81.977050] nouveau 0000:01:00.0: fb: trapped write at 00219728b0 on channel 1 [0fbce000 DRM] engine 0d [PCE0] client 13 [] subclient 02 [] reason 00000006 [NULL_DMAOBJ] [ 81.983342] nouveau 0000:01:00.0: ce: intr 00000300 [ 81.989505] nouveau 0000:01:00.0: fb: trapped write at 0021bbd2c0 on channel 1 [0fbce000 DRM] engine 0d [PCE0] client 13 [] subclient 02 [] reason 00000006 [NULL_DMAOBJ] [ 81.995758] nouveau 0000:01:00.0: ce: intr 00000300 [ 82.001600] nouveau 0000:01:00.0: fb: trapped write at 0021e13320 on channel 1 [0fbce000 DRM] engine 0d [PCE0] client 13 [] subclient 02 [] reason 00000006 [NULL_DMAOBJ] [ 82.006931] nouveau 0000:01:00.0: gr: TRAP_PROP - TP 0 - 00000040 [RT_FAULT] - Address 0020230000 [ 82.012021] nouveau 0000:01:00.0: gr: TRAP_PROP - TP 0 - e0c: 00000000, e18: 00000000, e1c: 00000000, e20: 00002a00, e24: 00030000 [ 82.017184] nouveau 0000:01:00.0: gr: 00200000 [] ch 4 [000f8c8000 Xorg[628]] subc 3 class 8597 mthd 15f0 data 00170017 [ 82.022332] nouveau 0000:01:00.0: fb: trapped write at 002026bd00 on channel 4 [0f8c8000 Xorg[628]] engine 00 [PGRAPH] client 0b [PROP] subclient 00 [RT0] reason 00000002 [PAGE_NOT_PRESENT] Jarkko

2 1

[PATCH] drm/mgag200: Initialize delta variable in PLL compute function
by Thomas Zimmermann 18 Aug '21

18 Aug '21

Initialize delta variable in PLL compute function for G200SE, rev 00 to the maximum value. Fixes uninitialized usage. smatch warnings: drivers/gpu/drm/mgag200/mgag200_pll.c:142 mgag200_pixpll_compute_g200se_00() \ error: uninitialized symbol 'delta'. Signed-off-by: Thomas Zimmermann <tzimmermann(a)suse.de> Fixes: 2545ac960364 ("drm/mgag200: Abstract pixel PLL via struct mgag200_pll") Reported-by: kernel test robot <lkp(a)intel.com> Reported-by: Dan Carpenter <dan.carpenter(a)oracle.com> Cc: Thomas Zimmermann <tzimmermann(a)suse.de> Cc: Sam Ravnborg <sam(a)ravnborg.org> Cc: Dave Airlie <airlied(a)redhat.com> Cc: dri-devel(a)lists.freedesktop.org --- drivers/gpu/drm/mgag200/mgag200_pll.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/mgag200/mgag200_pll.c b/drivers/gpu/drm/mgag200/mgag200_pll.c index 7c903cf19c0d..e9ae22b4f813 100644 --- a/drivers/gpu/drm/mgag200/mgag200_pll.c +++ b/drivers/gpu/drm/mgag200/mgag200_pll.c @@ -124,6 +124,7 @@ static int mgag200_pixpll_compute_g200se_00(struct mgag200_pll *pixpll, long clo unsigned int computed; m = n = p = s = 0; + delta = 0xffffffff; permitteddelta = clock * 5 / 1000; for (testp = 8; testp > 0; testp /= 2) { -- 2.32.0

2 2

[PATCH] drm/msm/dpu: add support for alpha blending properties
by Dmitry Baryshkov 18 Aug '21

18 Aug '21

Add support for alpha blending properties. Setup the plane blend state according to those properties. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov(a)linaro.org> --- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 43 ++++++++++++++++------- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 10 ++++-- 2 files changed, 37 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c index 9a5c70c87cc8..768012243b44 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -30,12 +30,6 @@ #include "dpu_core_perf.h" #include "dpu_trace.h" -#define DPU_DRM_BLEND_OP_NOT_DEFINED 0 -#define DPU_DRM_BLEND_OP_OPAQUE 1 -#define DPU_DRM_BLEND_OP_PREMULTIPLIED 2 -#define DPU_DRM_BLEND_OP_COVERAGE 3 -#define DPU_DRM_BLEND_OP_MAX 4 - /* layer mixer index on dpu_crtc */ #define LEFT_MIXER 0 #define RIGHT_MIXER 1 @@ -146,20 +140,43 @@ static void _dpu_crtc_setup_blend_cfg(struct dpu_crtc_mixer *mixer, { struct dpu_hw_mixer *lm = mixer->hw_lm; uint32_t blend_op; + uint32_t fg_alpha, bg_alpha; - /* default to opaque blending */ - blend_op = DPU_BLEND_FG_ALPHA_FG_CONST | - DPU_BLEND_BG_ALPHA_BG_CONST; + fg_alpha = pstate->base.alpha >> 8; + bg_alpha = 0xff - fg_alpha; - if (format->alpha_enable) { + /* default to opaque blending */ + if (pstate->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE || + !format->alpha_enable) { + blend_op = DPU_BLEND_FG_ALPHA_FG_CONST | + DPU_BLEND_BG_ALPHA_BG_CONST; + } else if (pstate->base.pixel_blend_mode == DRM_MODE_BLEND_PREMULTI) { + blend_op = DPU_BLEND_FG_ALPHA_FG_CONST | + DPU_BLEND_BG_ALPHA_FG_PIXEL; + if (fg_alpha != 0xff) { + bg_alpha = fg_alpha; + blend_op |= DPU_BLEND_BG_MOD_ALPHA | + DPU_BLEND_BG_INV_MOD_ALPHA; + } else { + blend_op |= DPU_BLEND_BG_INV_ALPHA; + } + } else { /* coverage blending */ blend_op = DPU_BLEND_FG_ALPHA_FG_PIXEL | - DPU_BLEND_BG_ALPHA_FG_PIXEL | - DPU_BLEND_BG_INV_ALPHA; + DPU_BLEND_BG_ALPHA_FG_PIXEL; + if (fg_alpha != 0xff) { + bg_alpha = fg_alpha; + blend_op |= DPU_BLEND_FG_MOD_ALPHA | + DPU_BLEND_FG_INV_MOD_ALPHA | + DPU_BLEND_BG_MOD_ALPHA | + DPU_BLEND_BG_INV_MOD_ALPHA; + } else { + blend_op |= DPU_BLEND_BG_INV_ALPHA; + } } lm->ops.setup_blend_config(lm, pstate->stage, - 0xFF, 0, blend_op); + fg_alpha, bg_alpha, blend_op); DRM_DEBUG_ATOMIC("format:%p4cc, alpha_en:%u blend_op:0x%x\n", &format->base.pixel_format, format->alpha_enable, blend_op); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index ec4a6f04394a..c989621209aa 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -1339,9 +1339,7 @@ static void dpu_plane_reset(struct drm_plane *plane) return; } - pstate->base.plane = plane; - - plane->state = &pstate->base; + __drm_atomic_helper_plane_reset(plane, &pstate->base); } #ifdef CONFIG_DEBUG_FS @@ -1647,6 +1645,12 @@ struct drm_plane *dpu_plane_init(struct drm_device *dev, if (ret) DPU_ERROR("failed to install zpos property, rc = %d\n", ret); + drm_plane_create_alpha_property(plane); + drm_plane_create_blend_mode_property(plane, + BIT(DRM_MODE_BLEND_PIXEL_NONE) | + BIT(DRM_MODE_BLEND_PREMULTI) | + BIT(DRM_MODE_BLEND_COVERAGE)); + drm_plane_create_rotation_property(plane, DRM_MODE_ROTATE_0, DRM_MODE_ROTATE_0 | -- 2.30.2

2 2

[PULL] drm-misc-fixes
by Thomas Zimmermann 18 Aug '21

18 Aug '21

Hi Dave and Daniel, here's the drm-misc-fixes PR for this week. The vblank fix is a UAPI change that unifies the behaviour of the regular and compat ioctl. Best regards Thomas drm-misc-fixes-2021-08-18: Short summary of fixes pull: * UAPI: Return results for failed drm_wait_vblank_ioctl() * ttm: Fix debugfs initialization The following changes since commit bf33677a3c394bb8fddd48d3bbc97adf0262e045: drm/meson: fix colour distortion from HDR set during vendor u-boot (2021-08-10 10:00:02 +0200) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-misc tags/drm-misc-fixes-2021-08-18 for you to fetch changes up to fa0b1ef5f7a694f48e00804a391245f3471aa155: drm: Copy drm_wait_vblank to user before returning (2021-08-17 13:56:03 -0400) ---------------------------------------------------------------- Short summary of fixes pull: * UAPI: Return results for failed drm_wait_vblank_ioctl() * ttm: Fix debugfs initialization ---------------------------------------------------------------- Dan Moulding (1): drm: ttm: Don't bail from ttm_global_init if debugfs_create_dir fails Mark Yacoub (1): drm: Copy drm_wait_vblank to user before returning drivers/gpu/drm/drm_ioc32.c | 4 +--- drivers/gpu/drm/ttm/ttm_device.c | 2 -- 2 files changed, 1 insertion(+), 5 deletions(-) -- Thomas Zimmermann Graphics Driver Developer SUSE Software Solutions Germany GmbH Maxfeldstr. 5, 90409 Nürnberg, Germany (HRB 36809, AG Nürnberg) Geschäftsführer: Felix Imendörffer

1 0

[PATCH v2 1/2] drm/bridge: anx7625: Propagate errors from sp_tx_rst_aux()
by Robert Foss 18 Aug '21

18 Aug '21

The return value of sp_tx_rst_aux() is not propagated, which means both compiler warnings and potential errors not being handled. Fixes: 8bdfc5dae4e3 ("drm/bridge: anx7625: Add anx7625 MIPI DSI/DPI to DP") Reported-by: kernel test robot <lkp(a)intel.com> Signed-off-by: Robert Foss <robert.foss(a)linaro.org> --- Changes since v1: - Instead of discarding the error, propagate it until it is handled properly drivers/gpu/drm/bridge/analogix/anx7625.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c index 14d73fb1dd15b..ea414cd349b5c 100644 --- a/drivers/gpu/drm/bridge/analogix/anx7625.c +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c @@ -720,7 +720,7 @@ static int edid_read(struct anx7625_data *ctx, ret = sp_tx_aux_rd(ctx, 0xf1); if (ret) { - sp_tx_rst_aux(ctx); + ret = sp_tx_rst_aux(ctx); DRM_DEV_DEBUG_DRIVER(dev, "edid read fail, reset!\n"); } else { ret = anx7625_reg_block_read(ctx, ctx->i2c.rx_p0_client, @@ -735,7 +735,7 @@ static int edid_read(struct anx7625_data *ctx, if (cnt > EDID_TRY_CNT) return -EIO; - return 0; + return ret; } static int segments_edid_read(struct anx7625_data *ctx, @@ -785,7 +785,7 @@ static int segments_edid_read(struct anx7625_data *ctx, if (cnt > EDID_TRY_CNT) return -EIO; - return 0; + return ret; } static int sp_tx_edid_read(struct anx7625_data *ctx, @@ -887,7 +887,11 @@ static int sp_tx_edid_read(struct anx7625_data *ctx, } /* Reset aux channel */ - sp_tx_rst_aux(ctx); + ret = sp_tx_rst_aux(ctx); + if (ret < 0) { + DRM_DEV_ERROR(dev, "Failed to reset aux channel!\n"); + return ret; + } return (blocks_num + 1); } -- 2.30.2

2 4

[PATCH 1/3] drm/panel-simple: Add Vivax TPC-9150 panel v4
by Nikola Pavlica 18 Aug '21

18 Aug '21

The model and make of the LCD panel of the Vivax TPC-9150 is unknown, hence the panel settings that were retrieved with a FEX dump are named after the device NOT the actual panel. The LCD in question is a 50 pin MISO TFT LCD panel of the resolution 1024x600 used by the aforementioned device. Version 2, as Thierry kindly suggested that I fix the order in which the panel was ordered compared to others. Version 3, filling in the required info suggested by Sam. Plus some factual issues that I've corrected myself (tested working) Version 4, rearranged the display parameters and fix invalid bit format issue. (Thanks Sam) Thanks, Nikola Signed-off-by: Nikola Pavlica <pavlica.nikola(a)gmail.com> --- drivers/gpu/drm/panel/panel-simple.c | 29 ++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 4e2dad314c79..9e06c375f8a0 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -3989,6 +3989,32 @@ static const struct panel_desc urt_umsh_8596md_parallel = { .bus_format = MEDIA_BUS_FMT_RGB666_1X18, }; +static const struct drm_display_mode vivax_tpc9150_panel_mode = { + .clock = 60000, + .hdisplay = 1024, + .hsync_start = 1024 + 160, + .hsync_end = 1024 + 160 + 100, + .htotal = 1024 + 160 + 100 + 60, + .vdisplay = 600, + .vsync_start = 600 + 12, + .vsync_end = 600 + 12 + 10, + .vtotal = 600 + 12 + 10 + 13, +}; + +static const struct panel_desc vivax_tpc9150_panel = { + .modes = &vivax_tpc9150_panel_mode, + .num_modes = 1, + .bpc = 6, + .size = { + .width = 200, + .height = 115, + }, + .bus_format = MEDIA_BUS_FMT_RGB666_1X18, + .bus_flags = DRM_BUS_FLAG_DE_HIGH, + .connector_type = DRM_MODE_CONNECTOR_LVDS, +}; + + static const struct drm_display_mode vl050_8048nt_c01_mode = { .clock = 33333, .hdisplay = 800, @@ -4490,6 +4516,9 @@ static const struct of_device_id platform_of_match[] = { }, { .compatible = "urt,umsh-8596md-20t", .data = &urt_umsh_8596md_parallel, + }, { + .compatible = "vivax,tpc9150-panel", + .data = &vivax_tpc9150_panel, }, { .compatible = "vxt,vl050-8048nt-c01", .data = &vl050_8048nt_c01, -- 2.32.0

2 6

[PATCH 03/17] drm/dp: add LTTPR DP 2.0 DPCD addresses
by Jani Nikula 18 Aug '21

18 Aug '21

DP 2.0 brings some new DPCD addresses for PHY repeaters. Cc: dri-devel(a)lists.freedesktop.org Reviewed-by: Manasi Navare <manasi.d.navare(a)intel.com> Signed-off-by: Jani Nikula <jani.nikula(a)intel.com> --- include/drm/drm_dp_helper.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 1d5b3dbb6e56..f3a61341011d 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -1319,6 +1319,10 @@ struct drm_panel; #define DP_MAX_LANE_COUNT_PHY_REPEATER 0xf0004 /* 1.4a */ #define DP_Repeater_FEC_CAPABILITY 0xf0004 /* 1.4 */ #define DP_PHY_REPEATER_EXTENDED_WAIT_TIMEOUT 0xf0005 /* 1.4a */ +#define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xf0006 /* 2.0 */ +# define DP_PHY_REPEATER_128B132B_SUPPORTED (1 << 0) +/* See DP_128B132B_SUPPORTED_LINK_RATES for values */ +#define DP_PHY_REPEATER_128B132B_RATES 0xf0007 /* 2.0 */ enum drm_dp_phy { DP_PHY_DPRX, -- 2.20.1

1 0

[PATCH 02/17] drm/dp: use more of the extended receiver cap
by Jani Nikula 18 Aug '21

18 Aug '21

Extend the use of extended receiver cap at 0x2200 to cover MAIN_LINK_CHANNEL_CODING_CAP in 0x2206, in case an implementation hides the DP 2.0 128b/132b channel encoding cap. Cc: dri-devel(a)lists.freedesktop.org Reviewed-by: Manasi Navare <manasi.d.navare(a)intel.com> Signed-off-by: Jani Nikula <jani.nikula(a)intel.com> --- drivers/gpu/drm/drm_dp_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index 9b2a2961fca8..9389f92cb944 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -608,7 +608,7 @@ static u8 drm_dp_downstream_port_count(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) static int drm_dp_read_extended_dpcd_caps(struct drm_dp_aux *aux, u8 dpcd[DP_RECEIVER_CAP_SIZE]) { - u8 dpcd_ext[6]; + u8 dpcd_ext[DP_MAIN_LINK_CHANNEL_CODING + 1]; int ret; /* -- 2.20.1

1 0

[PATCH v2 0/2] Add support for Sharp LS060T1SX01 panel
by Dmitry Baryshkov 18 Aug '21

18 Aug '21

Add driver to support Sharp LS06T1SX01 6.0" FullHD panel found e.g. in the kwaek.ca Dragonboard Display Adapter Bundle. Changes since v1: - Fix the id in the schema file ---------------------------------------------------------------- Dmitry Baryshkov (2): dt-bindings: add bindings for the Sharp LS060T1SX01 panel drm/panel: Add support for Sharp LS060T1SX01 panel .../bindings/display/panel/sharp,ls060t1sx01.yaml | 51 ++++ drivers/gpu/drm/panel/Kconfig | 10 + drivers/gpu/drm/panel/Makefile | 1 + drivers/gpu/drm/panel/panel-sharp-ls060t1sx01.c | 274 +++++++++++++++++++++ 4 files changed, 336 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/sharp,ls060t1sx01.yaml create mode 100644 drivers/gpu/drm/panel/panel-sharp-ls060t1sx01.c

2 4

[PATCH v1] drm/bridge: anx7625: Don't store unread return value
by Robert Foss 18 Aug '21

18 Aug '21

The return value of sp_tx_rst_aux() is stored, but never read. This happens in the context EDID communication already failing, which means that this additional failure doesn't necessarily convey any additional inforamation. This means that we can safely avoid storing the value. Fixes: 8bdfc5dae4e3 ("drm/bridge: anx7625: Add anx7625 MIPI DSI/DPI to DP") Reported-by: kernel test robot <lkp(a)intel.com> Signed-off-by: Robert Foss <robert.foss(a)linaro.org> --- drivers/gpu/drm/bridge/analogix/anx7625.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c index 14d73fb1dd15b..3471785915c45 100644 --- a/drivers/gpu/drm/bridge/analogix/anx7625.c +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c @@ -771,7 +771,7 @@ static int segments_edid_read(struct anx7625_data *ctx, ret = sp_tx_aux_rd(ctx, 0xf1); if (ret) { - ret = sp_tx_rst_aux(ctx); + sp_tx_rst_aux(ctx); DRM_DEV_ERROR(dev, "segment read fail, reset!\n"); } else { ret = anx7625_reg_block_read(ctx, ctx->i2c.rx_p0_client, -- 2.30.2

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dri-devel August 2021