dri-devel January 2022

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842 discussions

[PATCH] drm: rcar-du: Fix CRTC timings when CMM is used
by Laurent Pinchart 22 Feb '22

22 Feb '22

When the CMM is enabled, an offset of 25 pixels must be subtracted from the HDS (horizontal display start) and HDE (horizontal display end) registers. Fix the timings calculation, and take this into account in the mode validation. This fixes a visible horizontal offset in the image with VGA monitors. HDMI monitors seem to be generally more tolerant to incorrect timings, but may be affected too. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas(a)ideasonboard.com> --- drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c index 5672830ca184..ee6ba74627a2 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c @@ -215,6 +215,7 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc) const struct drm_display_mode *mode = &rcrtc->crtc.state->adjusted_mode; struct rcar_du_device *rcdu = rcrtc->dev; unsigned long mode_clock = mode->clock * 1000; + unsigned int hdse_offset; u32 dsmr; u32 escr; @@ -298,10 +299,15 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc) | DSMR_DIPM_DISP | DSMR_CSPM; rcar_du_crtc_write(rcrtc, DSMR, dsmr); + hdse_offset = 19; + if (rcrtc->group->cmms_mask & BIT(rcrtc->index % 2)) + hdse_offset += 25; + /* Display timings */ - rcar_du_crtc_write(rcrtc, HDSR, mode->htotal - mode->hsync_start - 19); + rcar_du_crtc_write(rcrtc, HDSR, mode->htotal - mode->hsync_start - + hdse_offset); rcar_du_crtc_write(rcrtc, HDER, mode->htotal - mode->hsync_start + - mode->hdisplay - 19); + mode->hdisplay - hdse_offset); rcar_du_crtc_write(rcrtc, HSWR, mode->hsync_end - mode->hsync_start - 1); rcar_du_crtc_write(rcrtc, HCR, mode->htotal - 1); @@ -836,6 +842,7 @@ rcar_du_crtc_mode_valid(struct drm_crtc *crtc, struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); struct rcar_du_device *rcdu = rcrtc->dev; bool interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE; + unsigned int min_sync_porch; unsigned int vbp; if (interlaced && !rcar_du_has(rcdu, RCAR_DU_FEATURE_INTERLACED)) @@ -843,9 +850,14 @@ rcar_du_crtc_mode_valid(struct drm_crtc *crtc, /* * The hardware requires a minimum combined horizontal sync and back - * porch of 20 pixels and a minimum vertical back porch of 3 lines. + * porch of 20 pixels (when CMM isn't used) or 45 pixels (when CMM is + * used), and a minimum vertical back porch of 3 lines. */ - if (mode->htotal - mode->hsync_start < 20) + min_sync_porch = 20; + if (rcrtc->group->cmms_mask & BIT(rcrtc->index % 2)) + min_sync_porch += 25; + + if (mode->htotal - mode->hsync_start < min_sync_porch) return MODE_HBLANK_NARROW; vbp = (mode->vtotal - mode->vsync_end) / (interlaced ? 2 : 1); base-commit: c18c8891111bb5e014e144716044991112f16833 prerequisite-patch-id: dc9121a1b85ea05bf3eae2b0ac2168d47101ee87 -- Regards, Laurent Pinchart

3 2

[PATCH 0/7] Per client GPU stats
by Tvrtko Ursulin 22 Feb '22

22 Feb '22

From: Tvrtko Ursulin <tvrtko.ursulin(a)intel.com> Same old work but now rebased and series ending with some DRM docs proposing the common specification which should enable nice common userspace tools to be written. For the moment I only have intel_gpu_top converted to use this and that seems to work okay. v2: * Added prototype of possible amdgpu changes and spec updates to align with the common spec. v3: * Documented that 'drm-driver' tag shall correspond with struct drm_driver.name. v4: * Dropped amdgpu conversion from the series for now until AMD folks can find some time to finish that patch. Test-with: 20220106164915.56855-1-tvrtko.ursulin(a)linux.intel.com Tvrtko Ursulin (7): drm/i915: Explicitly track DRM clients drm/i915: Make GEM contexts track DRM clients drm/i915: Track runtime spent in closed and unreachable GEM contexts drm/i915: Track all user contexts per client drm/i915: Track context current active time drm: Document fdinfo format specification drm/i915: Expose client engine utilisation via fdinfo Documentation/gpu/drm-usage-stats.rst | 103 +++++++++++++ Documentation/gpu/i915.rst | 27 ++++ Documentation/gpu/index.rst | 1 + drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/gem/i915_gem_context.c | 42 ++++- .../gpu/drm/i915/gem/i915_gem_context_types.h | 6 + drivers/gpu/drm/i915/gt/intel_context.c | 27 +++- drivers/gpu/drm/i915/gt/intel_context.h | 15 +- drivers/gpu/drm/i915/gt/intel_context_types.h | 24 ++- .../drm/i915/gt/intel_execlists_submission.c | 23 ++- .../gpu/drm/i915/gt/intel_gt_clock_utils.c | 4 + drivers/gpu/drm/i915/gt/intel_lrc.c | 27 ++-- drivers/gpu/drm/i915/gt/intel_lrc.h | 24 +++ drivers/gpu/drm/i915/gt/selftest_lrc.c | 10 +- drivers/gpu/drm/i915/i915_driver.c | 9 ++ drivers/gpu/drm/i915/i915_drm_client.c | 143 ++++++++++++++++++ drivers/gpu/drm/i915/i915_drm_client.h | 66 ++++++++ drivers/gpu/drm/i915/i915_drv.h | 5 + drivers/gpu/drm/i915/i915_gem.c | 21 ++- drivers/gpu/drm/i915/i915_gpu_error.c | 9 +- drivers/gpu/drm/i915/i915_gpu_error.h | 2 +- 21 files changed, 535 insertions(+), 54 deletions(-) create mode 100644 Documentation/gpu/drm-usage-stats.rst create mode 100644 drivers/gpu/drm/i915/i915_drm_client.c create mode 100644 drivers/gpu/drm/i915/i915_drm_client.h -- 2.32.0

5 16

[PATCH v5 0/5] drm: exynos: dsi: Convert drm bridge
by Jagan Teki 22 Feb '22

22 Feb '22

Updated series about drm bridge conversion of exynos dsi. Previous version can be accessible, here [1]. Patch 1: connector reset Patch 2: panel_bridge API Patch 3: bridge conversion Patch 4: atomic functions Patch 5: DSI init in pre_enable Apply below patches to test on Exynos DSI: - https://patchwork.amarulasolutions.com/patch/1825/ - https://patchwork.amarulasolutions.com/patch/1838/ [1] https://patchwork.amarulasolutions.com/cover/1826/ Any inputs? Jagan. Jagan Teki (5): drm: bridge: panel: Reset the connector state pointer drm: exynos: dsi: Use drm panel_bridge API drm: exynos: dsi: Convert to bridge driver drm: exynos: dsi: Switch to atomic funcs drm: exynos: dsi: Move DSI init in bridge pre_enable drivers/gpu/drm/bridge/panel.c | 3 + drivers/gpu/drm/exynos/exynos_drm_dsi.c | 248 +++++++----------------- 2 files changed, 76 insertions(+), 175 deletions(-) -- 2.25.1

2 11

[PATCH v11 00/22] Add MediaTek SoC DRM (vdosys1) support for mt8195
by Nancy.Lin 22 Feb '22

22 Feb '22

The hardware path of vdosys1 with DPTx output need to go through by several modules, such as, OVL_ADAPTOR and MERGE. Add DRM and these modules support by the patches below: Changes in v11: - remove ethdr vblank spin lock - refine ovl_adaptor print message Changes in v10: - refine ethdr reset control using devm_reset_control_array_get_optional_exclusive - fix ovl_adaptor mtk_ovl_adaptor_clk_enable error handle issue Changes in v9: - rebase on kernel-5.16-rc1 - rebase on vdosys0 series v13. (ref [5]) - fix ovl_adaptor sub driver is brought up unintentionally - fix clang build test fail- duplicate ethdr/mdp_rdma init_module/cleanup_module symbol issue Changes in v8: - separate merge async reset to new patch. - separate drm ovl_adaptor sub driver to new patch. - fix reviewer comment in v7. Changes in v7: - rebase on vdosys0 series v12 (ref[5]) - add dma description in ethdr binding document. - refine vdosys1 bit definition of mmsys routing table. - separate merge modification into 3 pathces. - separate mutex modification into 2 patches. - add plane color coding for mdp_rdma csc. - move mdp_rdma pm control to ovl_adaptor. - fix reviewer comment in v6. Changes in v6: - rebase on kernel-5.15-rc1. - change mbox label to gce0 for dts node of vdosys1. - modify mmsys reset num for mt8195. - rebase on vdosys0 series v10. (ref [5]) - use drm to bring up ovl_adaptor driver. - move drm iommu/mutex check from kms init to drm bind. - modify rdma binding doc location. (Documentation/devicetree/bindings/arm/) - modify for reviewer's comment in v5. Changes in v5: - add mmsys reset controller reference. Changes in v4: - use merge common driver for merge1~4. - refine ovl_adaptor rdma driver. - use ovl_adaptor ddp_comp function instead of ethdr. - modify for reviewer's comment in v3. Changes in v3: - modify for reviewer's comment in v2. - add vdosys1 2 pixels align limit. - add mixer odd offset support. Changes in v2: - Merge PSEUDO_OVL and ETHDR into one DRM component. - Add mmsys config API for vdosys1 hardware setting. - Add mmsys reset control using linux reset framework. Signed-off-by: Nancy.Lin <nancy.lin(a)mediatek.com> This series are based on the following patch: [1] arm64: dts: Add Mediatek SoC MT8195 and evaluation board dts and Makefile https://patchwork.kernel.org/project/linux-mediatek/patch/20210601075350.31… [2] arm64: dts: mt8195: add IOMMU and smi nodes https://patchwork.kernel.org/project/linux-mediatek/patch/20210615173233.26… [3] [01/24] dt-bindings: mediatek: mt8195: Add binding for MM IOMMU https://patchwork.kernel.org/project/linux-mediatek/patch/20210630023504.18… [4] Add gce support for mt8195 https://patchwork.kernel.org/project/linux-mediatek/list/?series=537069 [5] Add MediaTek SoC DRM (vdosys0) support for mt8195 https://patchwork.kernel.org/project/linux-mediatek/list/?series=587313 [6] [v8,1/2] dt-bindings: reset: mt8195: add toprgu reset-controller header file https://patchwork.kernel.org/project/linux-mediatek/patch/20210806023606.16… Nancy.Lin (22): dt-bindings: mediatek: add vdosys1 RDMA definition for mt8195 dt-bindings: mediatek: add vdosys1 MERGE property for mt8195 dt-bindings: mediatek: add ethdr definition for mt8195 dt-bindings: reset: mt8195: add vdosys1 reset control bit soc: mediatek: add mtk-mmsys support for mt8195 vdosys1 soc: mediatek: add mtk-mmsys config API for mt8195 vdosys1 soc: mediatek: add cmdq support of mtk-mmsys config API for mt8195 vdosys1 soc: mediatek: mmsys: modify reset controller for MT8195 vdosys1 soc: mediatek: change the mutex defines and the mutex_mod type soc: mediatek: add mtk-mutex support for mt8195 vdosys1 drm/mediatek: add display MDP RDMA support for MT8195 drm/mediatek: add display merge advance config API for MT8195 drm/mediatek: add display merge start/stop API for cmdq support drm/mediatek: add display merge mute/unmute support for MT8195 drm/mediatek: add display merge async reset control drm/mediatek: add ETHDR support for MT8195 drm/mediatek: add mediatek-drm plane color encoding info drm/mediatek: add ovl_adaptor support for MT8195 drm/mediatek: modify mediatek-drm for mt8195 multi mmsys support drm/mediatek: add drm ovl_adaptor sub driver for MT8195 drm/mediatek: add mediatek-drm of vdosys1 support for MT8195 arm64: dts: mt8195: add display node for vdosys1 .../arm/mediatek/mediatek,mdp-rdma.yaml | 77 ++++ .../display/mediatek/mediatek,ethdr.yaml | 147 ++++++ .../display/mediatek/mediatek,merge.yaml | 4 + arch/arm64/boot/dts/mediatek/mt8195.dtsi | 222 +++++++++ drivers/gpu/drm/mediatek/Makefile | 5 +- drivers/gpu/drm/mediatek/mtk_disp_drv.h | 28 ++ drivers/gpu/drm/mediatek/mtk_disp_merge.c | 89 +++- .../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 436 ++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 38 +- drivers/gpu/drm/mediatek/mtk_drm_crtc.h | 3 +- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 30 +- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 + drivers/gpu/drm/mediatek/mtk_drm_drv.c | 343 ++++++++++---- drivers/gpu/drm/mediatek/mtk_drm_drv.h | 13 +- drivers/gpu/drm/mediatek/mtk_drm_plane.c | 1 + drivers/gpu/drm/mediatek/mtk_drm_plane.h | 1 + drivers/gpu/drm/mediatek/mtk_ethdr.c | 376 +++++++++++++++ drivers/gpu/drm/mediatek/mtk_ethdr.h | 25 + drivers/gpu/drm/mediatek/mtk_mdp_rdma.c | 315 +++++++++++++ drivers/gpu/drm/mediatek/mtk_mdp_rdma.h | 20 + drivers/soc/mediatek/mt8195-mmsys.h | 199 ++++++++ drivers/soc/mediatek/mtk-mmsys.c | 80 +++- drivers/soc/mediatek/mtk-mmsys.h | 12 + drivers/soc/mediatek/mtk-mutex.c | 296 +++++++----- include/dt-bindings/reset/mt8195-resets.h | 12 + include/linux/soc/mediatek/mtk-mmsys.h | 22 + 26 files changed, 2552 insertions(+), 243 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mdp-rdma.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c create mode 100644 drivers/gpu/drm/mediatek/mtk_ethdr.c create mode 100644 drivers/gpu/drm/mediatek/mtk_ethdr.h create mode 100644 drivers/gpu/drm/mediatek/mtk_mdp_rdma.c create mode 100644 drivers/gpu/drm/mediatek/mtk_mdp_rdma.h -- 2.18.0

4 37

[PATCH] drm: rcar-du: do not restart rcar-du groups on gen3
by Michael Rodin 21 Feb '22

21 Feb '22

Restarting a display unit group can cause a visible flicker on the display. Particularly when a LVDS display is connected to a Salvator board and an HDMI display is (re)connected, then there will be 2 visible flickers on the LVDS display: 1. during atomic_flush (The need_restart flag is set in this case by rcar_du_vsp_enable.): rcar_du_crtc_atomic_flush rcar_du_crtc_update_planes ... ... /* Restart the group if plane sources have changed. */ if (rcrtc->group->need_restart) rcar_du_group_restart(rcrtc->group); 2. during atomic_enable: rcar_du_crtc_atomic_enable rcar_du_crtc_start rcar_du_group_start_stop(rcrtc->group, true); To avoid flickers in all use cases, do not restart DU groups on the Gen3 SoCs at all, since it is not required any more. Signed-off-by: Michael Rodin <mrodin(a)de.adit-jv.com> --- drivers/gpu/drm/rcar-du/rcar_du_group.c | 5 ++++- drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 2 -- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/rcar-du/rcar_du_group.c b/drivers/gpu/drm/rcar-du/rcar_du_group.c index 8665a1d..ff0a1c8 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_group.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_group.c @@ -250,7 +250,7 @@ void rcar_du_group_start_stop(struct rcar_du_group *rgrp, bool start) * when the display controller will have to be restarted. */ if (start) { - if (rgrp->used_crtcs++ != 0) + if (rgrp->used_crtcs++ != 0 && rgrp->dev->info->gen != 3) __rcar_du_group_start_stop(rgrp, false); __rcar_du_group_start_stop(rgrp, true); } else { @@ -263,6 +263,9 @@ void rcar_du_group_restart(struct rcar_du_group *rgrp) { rgrp->need_restart = false; + if (rgrp->dev->info->gen == 3) + return; + __rcar_du_group_start_stop(rgrp, false); __rcar_du_group_start_stop(rgrp, true); } diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c index b7fc5b0..a652c06 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c @@ -88,8 +88,6 @@ void rcar_du_vsp_enable(struct rcar_du_crtc *crtc) * Ensure that the plane source configuration takes effect by requesting * a restart of the group. See rcar_du_plane_atomic_update() for a more * detailed explanation. - * - * TODO: Check whether this is still needed on Gen3. */ crtc->group->need_restart = true; -- 2.7.4

2 1

[PATCH v2] drm/panel: simple: Tune timing for ET057090DHU
by Francesco Dolcini 21 Feb '22

21 Feb '22

From: Oleksandr Suvorov <oleksandr.suvorov(a)toradex.com> VESA Display Monitor Timing v1.13 has recommendations for the historical VGA mode 640x480 60Hz. These parameters are compatible with EDT ET057090DHU recommended timings. Use VESA DMT timing parameters for EDT ET057090DHU panel. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov(a)toradex.com> Cc: Oleksandr Suvorov <oleksandr.suvorov(a)foundries.io> Signed-off-by: Francesco Dolcini <francesco.dolcini(a)toradex.com> --- v2: removed stale vrefresh field --- drivers/gpu/drm/panel/panel-simple.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 0c8786ebffd1..52e936dd2d6f 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1598,12 +1598,12 @@ static const struct drm_display_mode edt_et057090dhu_mode = { .clock = 25175, .hdisplay = 640, .hsync_start = 640 + 16, - .hsync_end = 640 + 16 + 30, - .htotal = 640 + 16 + 30 + 114, + .hsync_end = 640 + 16 + 48, + .htotal = 640 + 16 + 48 + 96, .vdisplay = 480, .vsync_start = 480 + 10, - .vsync_end = 480 + 10 + 3, - .vtotal = 480 + 10 + 3 + 32, + .vsync_end = 480 + 10 + 2, + .vtotal = 480 + 10 + 2 + 33, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; -- 2.25.1

1 1

[PATCH v16 00/40] NVIDIA Tegra power management patches for 5.17
by Dmitry Osipenko 21 Feb '22

21 Feb '22

This series adds runtime PM support to Tegra drivers and enables core voltage scaling for Tegra20/30 SoCs, resolving overheating troubles. All patches in this series are interdependent and should go via Tegra tree for simplicity. Changelog: v16: - Replaced redundant "context->client" with "client" in gr2d/3d RPM patches, which was spotted by Michał Mirosław in v15. - Added new patch that consolidates the RPM management of older UAPI code path. - Added stable tag to "submit: Add missing pm_runtime_mark_last_busy()" patch and reordered it such that it could be backported without merge conflicts. v15: - Added r-b from Ulf Hansson to "soc/tegra: Enable runtime PM during OPP state-syncing" patch and added extra sanity-check to this patch which ensures that RPM is indeed enabled. - Fixed double RPM-disable on unbind for drivers that used devm_pm_runtime_enable() + pm_runtime_force_suspend(). - Added link with additional info to commit message of "regulators: Prepare for suspend" patch. v14: - Fixed missing runtime PM syncing on removal of drivers, which was spotted by Ulf Hansson in v13. - clk-device driver now resumes RPM on system suspend instead of preparing clock which it backs. This was suggested by Ulf Hansson. - clk-device driver now syncs power domain performance unconditionally during driver's probe time since GENPD API allows to do this now. It was spotted by Ulf Hansson. - Added new "Enable runtime PM during OPP state-syncing" patch, which allows drivers to sync state at any time. Previously drivers were obligated to take care of enabling RPM at the "right" time. - Moved runtime PM initialization/uninitialization of DRM drivers that use host1x channel to host1x client init/deinit phase. I noticed that there is UAF problem because RPM-suspend callback waits until channel is idling and channel is already released/freed during driver's removal phase. - Added system suspend support to the new NVDEC DRM driver. - Added missing pm_runtime_mark_last_busy() to DRM driver. - Corrected VDE GENPD patch which previously made video decoder clock always-enabled by mistake if legacy PD code path was used. It was spotted while we were testing VDE on Tegra114 that doesn't support GENPD yet. - Added ack from Peter Chen to the USB patch that he gave to v13. - Changed OPP table names in accordance to the new naming scheme required by the recent core OPP binding. - Added 500MHz memory OPP entry used by ASUS Transformer tablets. v13: - Fixed compile-test error reported by build bot by reverting the mmc/ patch to v11. The sdhci_suspend/resume_host() functions aren't available with the disabled CONFIG_PM_SLEEP, some code needs the ifdef. - Added last r-b from Rob Herring for the DT patches. - Corrected clk/ PM domain-support patch by not using the devm_tegra_core_dev_init_opp_table_common() helper, which I utilized in v12. The clk driver implements its own power domain state syncing and common helper shouldn't be used. This fixes driver probing for some clocks on some devices. It was reported by Svyatoslav Ryhel for PLLE OPP error on T30 Asus Transformer tablet. v12: - Added r-b from Rob Herring to the host1x binding patch. - Added acks from Hans Verkuil to the video decoder patches. - In the v11 changelog I forgot to mention that the clk-binding patch was also changed with a corrected regex pattern and removed 'clocks' sub-node. This patch needs r-b or ack too. - Added new "Rename 3d power domains" patch to match the DT schema naming requirement. Thanks to David Heidelberg for spotting this problem. - Replaced #ifdef CONFIG_PM_SLEEP with maybe_unused in the MMC patch to make code cleaner. v11: - Added acks and r-b from Rob Herring, Mark Brown and Miquel Raynal that were given to v8. - Corrected order of the new memory controller reset entry in device-trees and host1x DT binding patch, which was requested by Rob Herring. - Switched consumer drivers to use power domain state syncing done by new Tegra's common OPP-initialization helper. - Made use of new devm_pm_runtime_enable() helper that was added to v5.15 kernel, where appropriate. - Added "fuse: Use resource-managed helpers" patch. - Converted Tegra20/30 clk drivers to a proper platform drivers, which was requested by Thierry Reding. - Removed clk-bulk API usage from the MMC patch, which was requested by Thierry Reding. - Changed CORE power domain name to "core" in a new patch "Change name of core power domain". - Misc small fixes for problems that I found since v8, like couple typos in error code paths and restored working RPM for Tegra DRM UAPI v1 that was removed in v8 by accident. v9-v10: Figured out remaining GENPD API changes with Ulf Hansson and Viresh Kumar. The OPP-sync helper that was used in v8 isn't needed anymore because GENPD API now allows consumer drivers to init rpm_pstate of power domains. v8: - Added new generic dev_pm_opp_sync() helper that syncs OPP state with hardware. All drivers changed to use it. This replaces GENPD attach_dev callback hacks that were used in v7. - Added new patch patch "soc/tegra: regulators: Prepare for suspend" that fixes dying Tegra20 SoC after enabling VENC power domain during resume from suspend. It matches to what downstream kernel does on suspend/resume. - After a second thought, I dropped patches which added RPM to memory drivers since hardware is always-on and RPM not needed. - Replaced the "dummy host1x driver" patch with new "Disable unused host1x hardware" patch, since it's a cleaner solution. Dmitry Osipenko (40): soc/tegra: Enable runtime PM during OPP state-syncing soc/tegra: Add devm_tegra_core_dev_init_opp_table_common() soc/tegra: Don't print error message when OPPs not available dt-bindings: clock: tegra-car: Document new clock sub-nodes clk: tegra: Support runtime PM and power domain dt-bindings: host1x: Document OPP and power domain properties dt-bindings: host1x: Document Memory Client resets of Host1x, GR2D and GR3D gpu: host1x: Add initial runtime PM and OPP support gpu: host1x: Add host1x_channel_stop() drm/tegra: submit: Add missing pm_runtime_mark_last_busy() drm/tegra: dc: Support OPP and SoC core voltage scaling drm/tegra: hdmi: Add OPP support drm/tegra: gr2d: Support generic power domain and runtime PM drm/tegra: gr3d: Support generic power domain and runtime PM drm/tegra: vic: Stop channel on suspend drm/tegra: nvdec: Stop channel on suspend drm/tegra: submit: Remove pm_runtime_enabled() checks drm/tegra: Consolidate runtime PM management of older UAPI codepath usb: chipidea: tegra: Add runtime PM and OPP support bus: tegra-gmi: Add runtime PM and OPP support pwm: tegra: Add runtime PM and OPP support mmc: sdhci-tegra: Add runtime PM and OPP support mtd: rawnand: tegra: Add runtime PM and OPP support spi: tegra20-slink: Add OPP support media: dt: bindings: tegra-vde: Convert to schema media: dt: bindings: tegra-vde: Document OPP and power domain media: staging: tegra-vde: Support generic power domain soc/tegra: fuse: Reset hardware soc/tegra: fuse: Use resource-managed helpers soc/tegra: regulators: Prepare for suspend soc/tegra: pmc: Rename 3d power domains soc/tegra: pmc: Rename core power domain soc/tegra: pmc: Enable core domain support for Tegra20 and Tegra30 ARM: tegra: Rename CPU and EMC OPP table device-tree nodes ARM: tegra: Add 500MHz entry to Tegra30 memory OPP table ARM: tegra: Add OPP tables and power domains to Tegra20 device-trees ARM: tegra: Add OPP tables and power domains to Tegra30 device-trees ARM: tegra: Add Memory Client resets to Tegra20 GR2D, GR3D and Host1x ARM: tegra: Add Memory Client resets to Tegra30 GR2D, GR3D and Host1x ARM: tegra20/30: Disable unused host1x hardware .../bindings/clock/nvidia,tegra20-car.yaml | 37 + .../display/tegra/nvidia,tegra20-host1x.txt | 53 + .../bindings/media/nvidia,tegra-vde.txt | 64 - .../bindings/media/nvidia,tegra-vde.yaml | 119 ++ arch/arm/boot/dts/tegra124-apalis-emc.dtsi | 4 +- .../arm/boot/dts/tegra124-jetson-tk1-emc.dtsi | 4 +- arch/arm/boot/dts/tegra124-nyan-big-emc.dtsi | 8 +- .../arm/boot/dts/tegra124-nyan-blaze-emc.dtsi | 8 +- .../boot/dts/tegra124-peripherals-opp.dtsi | 140 +- .../boot/dts/tegra20-acer-a500-picasso.dts | 5 +- arch/arm/boot/dts/tegra20-colibri.dtsi | 5 +- .../boot/dts/tegra20-cpu-opp-microvolt.dtsi | 82 +- arch/arm/boot/dts/tegra20-cpu-opp.dtsi | 82 +- arch/arm/boot/dts/tegra20-harmony.dts | 3 +- arch/arm/boot/dts/tegra20-paz00.dts | 3 +- .../arm/boot/dts/tegra20-peripherals-opp.dtsi | 949 +++++++++++- arch/arm/boot/dts/tegra20-seaboard.dts | 3 +- arch/arm/boot/dts/tegra20-tamonten.dtsi | 3 +- arch/arm/boot/dts/tegra20-trimslice.dts | 9 + arch/arm/boot/dts/tegra20-ventana.dts | 1 + arch/arm/boot/dts/tegra20.dtsi | 118 +- .../tegra30-asus-nexus7-grouper-common.dtsi | 1 + ...30-asus-nexus7-grouper-memory-timings.dtsi | 12 +- arch/arm/boot/dts/tegra30-beaver.dts | 1 + arch/arm/boot/dts/tegra30-cardhu.dtsi | 1 + arch/arm/boot/dts/tegra30-colibri.dtsi | 17 +- .../boot/dts/tegra30-cpu-opp-microvolt.dtsi | 144 +- arch/arm/boot/dts/tegra30-cpu-opp.dtsi | 144 +- arch/arm/boot/dts/tegra30-ouya.dts | 5 +- .../arm/boot/dts/tegra30-peripherals-opp.dtsi | 1373 ++++++++++++++++- arch/arm/boot/dts/tegra30.dtsi | 175 ++- drivers/bus/tegra-gmi.c | 50 +- drivers/clk/tegra/Makefile | 1 + drivers/clk/tegra/clk-device.c | 199 +++ drivers/clk/tegra/clk-pll.c | 2 +- drivers/clk/tegra/clk-super.c | 2 +- drivers/clk/tegra/clk-tegra20.c | 77 +- drivers/clk/tegra/clk-tegra30.c | 116 +- drivers/clk/tegra/clk.c | 75 +- drivers/clk/tegra/clk.h | 2 + drivers/gpu/drm/tegra/dc.c | 79 + drivers/gpu/drm/tegra/dc.h | 2 + drivers/gpu/drm/tegra/drm.c | 11 +- drivers/gpu/drm/tegra/gr2d.c | 174 ++- drivers/gpu/drm/tegra/gr3d.c | 353 ++++- drivers/gpu/drm/tegra/hdmi.c | 16 +- drivers/gpu/drm/tegra/nvdec.c | 43 +- drivers/gpu/drm/tegra/submit.c | 14 +- drivers/gpu/drm/tegra/vic.c | 48 +- drivers/gpu/host1x/channel.c | 8 + drivers/gpu/host1x/debug.c | 15 + drivers/gpu/host1x/dev.c | 150 +- drivers/gpu/host1x/dev.h | 3 +- drivers/gpu/host1x/hw/channel_hw.c | 44 +- drivers/gpu/host1x/intr.c | 3 - drivers/gpu/host1x/syncpt.c | 5 +- drivers/mmc/host/sdhci-tegra.c | 81 +- drivers/mtd/nand/raw/tegra_nand.c | 58 +- drivers/pwm/pwm-tegra.c | 82 +- drivers/soc/tegra/common.c | 29 +- drivers/soc/tegra/fuse/fuse-tegra.c | 51 +- drivers/soc/tegra/fuse/fuse-tegra20.c | 33 +- drivers/soc/tegra/fuse/fuse.h | 1 + drivers/soc/tegra/pmc.c | 14 +- drivers/soc/tegra/regulators-tegra20.c | 99 ++ drivers/soc/tegra/regulators-tegra30.c | 122 ++ drivers/spi/spi-tegra20-slink.c | 9 +- drivers/staging/media/tegra-vde/vde.c | 63 +- drivers/usb/chipidea/ci_hdrc_tegra.c | 53 +- include/linux/host1x.h | 1 + include/soc/tegra/common.h | 15 + 71 files changed, 4930 insertions(+), 846 deletions(-) delete mode 100644 Documentation/devicetree/bindings/media/nvidia,tegra-vde.txt create mode 100644 Documentation/devicetree/bindings/media/nvidia,tegra-vde.yaml create mode 100644 drivers/clk/tegra/clk-device.c -- 2.33.1

6 58

[PATCH] drm: Only select I2C_ALGOBIT for drivers that actually need it
by Uwe Kleine-König 21 Feb '22

21 Feb '22

While working on a drm driver that doesn't need the i2c algobit stuff I noticed that DRM selects this code even tough only 8 drivers actually use it. While also only some drivers use i2c, keep the select for I2C for the next cleanup patch. Still prepare this already by also selecting I2C for the individual drivers. Signed-off-by: Uwe Kleine-König <u.kleine-koenig(a)pengutronix.de> --- drivers/gpu/drm/Kconfig | 5 ++++- drivers/gpu/drm/ast/Kconfig | 2 ++ drivers/gpu/drm/gma500/Kconfig | 2 ++ drivers/gpu/drm/hisilicon/hibmc/Kconfig | 2 ++ drivers/gpu/drm/i915/Kconfig | 2 ++ drivers/gpu/drm/mgag200/Kconfig | 2 ++ drivers/gpu/drm/nouveau/Kconfig | 2 ++ 7 files changed, 16 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig index 3c16bd1afd87..351ea617c498 100644 --- a/drivers/gpu/drm/Kconfig +++ b/drivers/gpu/drm/Kconfig @@ -12,7 +12,6 @@ menuconfig DRM select HDMI select FB_CMDLINE select I2C - select I2C_ALGOBIT select DMA_SHARED_BUFFER select SYNC_FILE # gallium uses SYS_kcmp for os_same_file_description() to de-duplicate @@ -233,6 +232,8 @@ config DRM_RADEON select DRM_KMS_HELPER select DRM_TTM select DRM_TTM_HELPER + select I2C + select I2C_ALGOBIT select POWER_SUPPLY select HWMON select BACKLIGHT_CLASS_DEVICE @@ -254,6 +255,8 @@ config DRM_AMDGPU select DRM_SCHED select DRM_TTM select DRM_TTM_HELPER + select I2C + select I2C_ALGOBIT select POWER_SUPPLY select HWMON select BACKLIGHT_CLASS_DEVICE diff --git a/drivers/gpu/drm/ast/Kconfig b/drivers/gpu/drm/ast/Kconfig index fbcf2f45cef5..bcc25decd485 100644 --- a/drivers/gpu/drm/ast/Kconfig +++ b/drivers/gpu/drm/ast/Kconfig @@ -6,6 +6,8 @@ config DRM_AST select DRM_VRAM_HELPER select DRM_TTM select DRM_TTM_HELPER + select I2C + select I2C_ALGOBIT help Say yes for experimental AST GPU driver. Do not enable this driver without having a working -modesetting, diff --git a/drivers/gpu/drm/gma500/Kconfig b/drivers/gpu/drm/gma500/Kconfig index 0cff20265f97..e26c3a24955d 100644 --- a/drivers/gpu/drm/gma500/Kconfig +++ b/drivers/gpu/drm/gma500/Kconfig @@ -3,6 +3,8 @@ config DRM_GMA500 tristate "Intel GMA500/600/3600/3650 KMS Framebuffer" depends on DRM && PCI && X86 && MMU select DRM_KMS_HELPER + select I2C + select I2C_ALGOBIT # GMA500 depends on ACPI_VIDEO when ACPI is enabled, just like i915 select ACPI_VIDEO if ACPI select BACKLIGHT_CLASS_DEVICE if ACPI diff --git a/drivers/gpu/drm/hisilicon/hibmc/Kconfig b/drivers/gpu/drm/hisilicon/hibmc/Kconfig index 43943e980203..ac8c42dc79f6 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/Kconfig +++ b/drivers/gpu/drm/hisilicon/hibmc/Kconfig @@ -6,6 +6,8 @@ config DRM_HISI_HIBMC select DRM_VRAM_HELPER select DRM_TTM select DRM_TTM_HELPER + select I2C + select I2C_ALGOBIT help Choose this option if you have a Hisilicon Hibmc soc chipset. If M is selected the module will be called hibmc-drm. diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig index 69f57ca9c68d..b3bb6f7cfbbc 100644 --- a/drivers/gpu/drm/i915/Kconfig +++ b/drivers/gpu/drm/i915/Kconfig @@ -13,6 +13,8 @@ config DRM_I915 select DRM_PANEL select DRM_MIPI_DSI select RELAY + select I2C + select I2C_ALGOBIT select IRQ_WORK # i915 depends on ACPI_VIDEO when ACPI is enabled # but for select to work, need to select ACPI_VIDEO's dependencies, ick diff --git a/drivers/gpu/drm/mgag200/Kconfig b/drivers/gpu/drm/mgag200/Kconfig index eec59658a938..b28c5e4828f4 100644 --- a/drivers/gpu/drm/mgag200/Kconfig +++ b/drivers/gpu/drm/mgag200/Kconfig @@ -4,6 +4,8 @@ config DRM_MGAG200 depends on DRM && PCI && MMU select DRM_GEM_SHMEM_HELPER select DRM_KMS_HELPER + select I2C + select I2C_ALGOBIT help This is a KMS driver for Matrox G200 chips. It supports the original MGA G200 desktop chips and the server variants. It requires 0.3.0 diff --git a/drivers/gpu/drm/nouveau/Kconfig b/drivers/gpu/drm/nouveau/Kconfig index 9436310d0854..8823f0b24c73 100644 --- a/drivers/gpu/drm/nouveau/Kconfig +++ b/drivers/gpu/drm/nouveau/Kconfig @@ -7,6 +7,8 @@ config DRM_NOUVEAU select DRM_KMS_HELPER select DRM_TTM select DRM_TTM_HELPER + select I2C + select I2C_ALGOBIT select BACKLIGHT_CLASS_DEVICE if DRM_NOUVEAU_BACKLIGHT select ACPI_VIDEO if ACPI && X86 && BACKLIGHT_CLASS_DEVICE && INPUT select X86_PLATFORM_DEVICES if ACPI && X86 base-commit: 315d99318179b9cd5077ccc9f7f26a164c9fa998 -- 2.30.2

1 1

[PATCH 1/3] drm/panel: Rename Sony ACX424 to Novatek NT35560
by Linus Walleij 19 Feb '22

19 Feb '22

A code drop from Sony Mobile reveals that the ACX424 panels are built around the Novatek NT35560 panel controllers so just bite the bullet and rename the driver and all basic symbols so that we can modify this driver to cover any other panels also using the Novatek NT35560 display controller. Signed-off-by: Linus Walleij <linus.walleij(a)linaro.org> --- MAINTAINERS | 13 +- drivers/gpu/drm/panel/Kconfig | 23 +- drivers/gpu/drm/panel/Makefile | 2 +- ...ny-acx424akp.c => panel-novatek-nt35560.c} | 215 +++++++++--------- 4 files changed, 129 insertions(+), 124 deletions(-) rename drivers/gpu/drm/panel/{panel-sony-acx424akp.c => panel-novatek-nt35560.c} (57%) diff --git a/MAINTAINERS b/MAINTAINERS index 7a2345ce8521..631e68ae923a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6054,6 +6054,13 @@ T: git git://anongit.freedesktop.org/drm/drm-misc F: Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml F: drivers/gpu/drm/panel/panel-novatek-nt35510.c +DRM DRIVER FOR NOVATEK NT35560 PANELS +M: Linus Walleij <linus.walleij(a)linaro.org> +S: Maintained +T: git git://anongit.freedesktop.org/drm/drm-misc +F: Documentation/devicetree/bindings/display/panel/sony,acx424akp.yaml +F: drivers/gpu/drm/panel/panel-novatek-nt35560.c + DRM DRIVER FOR NOVATEK NT36672A PANELS M: Sumit Semwal <sumit.semwal(a)linaro.org> S: Maintained @@ -6171,12 +6178,6 @@ T: git git://anongit.freedesktop.org/drm/drm-misc F: Documentation/devicetree/bindings/display/sitronix,st7735r.yaml F: drivers/gpu/drm/tiny/st7735r.c -DRM DRIVER FOR SONY ACX424AKP PANELS -M: Linus Walleij <linus.walleij(a)linaro.org> -S: Maintained -T: git git://anongit.freedesktop.org/drm/drm-misc -F: drivers/gpu/drm/panel/panel-sony-acx424akp.c - DRM DRIVER FOR ST-ERICSSON MCDE M: Linus Walleij <linus.walleij(a)linaro.org> S: Maintained diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index cfc8d644cedf..f6b54fd41d85 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -272,6 +272,18 @@ config DRM_PANEL_NOVATEK_NT35510 around the Novatek NT35510 display controller, such as some Hydis panels. +config DRM_PANEL_NOVATEK_NT35560 + tristate "Novatek NT35560 DSI command mode panel" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + select VIDEOMODE_HELPERS + help + Say Y here if you want to enable the Novatek NT35560 display + controller. This panel supports DSI in both command and video + mode. This supports several panels such as Sony ACX424AKM and + ACX424AKP. + config DRM_PANEL_NOVATEK_NT36672A tristate "Novatek NT36672A DSI panel" depends on OF @@ -561,17 +573,6 @@ config DRM_PANEL_SITRONIX_ST7789V Say Y here if you want to enable support for the Sitronix ST7789V controller for 240x320 LCD panels -config DRM_PANEL_SONY_ACX424AKP - tristate "Sony ACX424AKP DSI command mode panel" - depends on OF - depends on DRM_MIPI_DSI - depends on BACKLIGHT_CLASS_DEVICE - select VIDEOMODE_HELPERS - help - Say Y here if you want to enable the Sony ACX424 display - panel. This panel supports DSI in both command and video - mode. - config DRM_PANEL_SONY_ACX565AKM tristate "Sony ACX565AKM panel" depends on GPIOLIB && OF && SPI diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile index bca4cc1f2715..540e303a90c5 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile @@ -25,6 +25,7 @@ obj-$(CONFIG_DRM_PANEL_LG_LB035Q02) += panel-lg-lb035q02.o obj-$(CONFIG_DRM_PANEL_LG_LG4573) += panel-lg-lg4573.o obj-$(CONFIG_DRM_PANEL_NEC_NL8048HL11) += panel-nec-nl8048hl11.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35510) += panel-novatek-nt35510.o +obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35560) += panel-novatek-nt35560.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36672A) += panel-novatek-nt36672a.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT39016) += panel-novatek-nt39016.o obj-$(CONFIG_DRM_PANEL_MANTIX_MLAF057WE51) += panel-mantix-mlaf057we51.o @@ -57,7 +58,6 @@ obj-$(CONFIG_DRM_PANEL_SHARP_LS060T1SX01) += panel-sharp-ls060t1sx01.o obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7701) += panel-sitronix-st7701.o obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7703) += panel-sitronix-st7703.o obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7789V) += panel-sitronix-st7789v.o -obj-$(CONFIG_DRM_PANEL_SONY_ACX424AKP) += panel-sony-acx424akp.o obj-$(CONFIG_DRM_PANEL_SONY_ACX565AKM) += panel-sony-acx565akm.o obj-$(CONFIG_DRM_PANEL_TDO_TL070WSH30) += panel-tdo-tl070wsh30.o obj-$(CONFIG_DRM_PANEL_TPO_TD028TTEC1) += panel-tpo-td028ttec1.o diff --git a/drivers/gpu/drm/panel/panel-sony-acx424akp.c b/drivers/gpu/drm/panel/panel-novatek-nt35560.c similarity index 57% rename from drivers/gpu/drm/panel/panel-sony-acx424akp.c rename to drivers/gpu/drm/panel/panel-novatek-nt35560.c index 9536d56a94a5..620876225384 100644 --- a/drivers/gpu/drm/panel/panel-sony-acx424akp.c +++ b/drivers/gpu/drm/panel/panel-novatek-nt35560.c @@ -1,9 +1,12 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * MIPI-DSI Sony ACX424AKP panel driver. This is a 480x864 - * AMOLED panel with a command-only DSI interface. + * MIPI-DSI Novatek NT35560-based panel controller. * - * Copyright (C) Linaro Ltd. 2019 + * Supported panels include: + * Sony ACX424AKM - a 480x854 AMOLED DSI panel + * Sony ACX424AKP - a 480x864 AMOLED DSI panel + * + * Copyright (C) Linaro Ltd. 2019-2021 * Author: Linus Walleij * Based on code and know-how from Marcus Lorentzon * Copyright (C) ST-Ericsson SA 2010 @@ -21,10 +24,10 @@ #include <drm/drm_modes.h> #include <drm/drm_panel.h> -#define ACX424_DCS_READ_ID1 0xDA -#define ACX424_DCS_READ_ID2 0xDB -#define ACX424_DCS_READ_ID3 0xDC -#define ACX424_DCS_SET_MDDI 0xAE +#define NT35560_DCS_READ_ID1 0xDA +#define NT35560_DCS_READ_ID2 0xDB +#define NT35560_DCS_READ_ID3 0xDC +#define NT35560_DCS_SET_MDDI 0xAE /* * Sony seems to use vendor ID 0x81 @@ -37,7 +40,7 @@ */ #define DISPLAY_SONY_ACX424AKP_ID3 0x8000 -struct acx424akp { +struct nt35560 { struct drm_panel panel; struct device *dev; struct regulator *supply; @@ -82,18 +85,18 @@ static const struct drm_display_mode sony_acx424akp_cmd_mode = { .height_mm = 84, }; -static inline struct acx424akp *panel_to_acx424akp(struct drm_panel *panel) +static inline struct nt35560 *panel_to_nt35560(struct drm_panel *panel) { - return container_of(panel, struct acx424akp, panel); + return container_of(panel, struct nt35560, panel); } #define FOSC 20 /* 20Mhz */ #define SCALE_FACTOR_NS_DIV_MHZ 1000 -static int acx424akp_set_brightness(struct backlight_device *bl) +static int nt35560_set_brightness(struct backlight_device *bl) { - struct acx424akp *acx = bl_get_data(bl); - struct mipi_dsi_device *dsi = to_mipi_dsi_device(acx->dev); + struct nt35560 *nt = bl_get_data(bl); + struct mipi_dsi_device *dsi = to_mipi_dsi_device(nt->dev); int period_ns = 1023; int duty_ns = bl->props.brightness; u8 pwm_ratio; @@ -107,7 +110,7 @@ static int acx424akp_set_brightness(struct backlight_device *bl) ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, &par, 1); if (ret) { - dev_err(acx->dev, "failed to disable display backlight (%d)\n", ret); + dev_err(nt->dev, "failed to disable display backlight (%d)\n", ret); return ret; } return 0; @@ -120,11 +123,11 @@ static int acx424akp_set_brightness(struct backlight_device *bl) SCALE_FACTOR_NS_DIV_MHZ); /* Set up PWM dutycycle ONE byte (differs from the standard) */ - dev_dbg(acx->dev, "calculated duty cycle %02x\n", pwm_ratio); + dev_dbg(nt->dev, "calculated duty cycle %02x\n", pwm_ratio); ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_DISPLAY_BRIGHTNESS, &pwm_ratio, 1); if (ret < 0) { - dev_err(acx->dev, "failed to set display PWM ratio (%d)\n", ret); + dev_err(nt->dev, "failed to set display PWM ratio (%d)\n", ret); return ret; } @@ -140,30 +143,30 @@ static int acx424akp_set_brightness(struct backlight_device *bl) par = 0xaa; ret = mipi_dsi_dcs_write(dsi, 0xf3, &par, 1); if (ret < 0) { - dev_err(acx->dev, "failed to unlock CMD 2 (%d)\n", ret); + dev_err(nt->dev, "failed to unlock CMD 2 (%d)\n", ret); return ret; } par = 0x01; ret = mipi_dsi_dcs_write(dsi, 0x00, &par, 1); if (ret < 0) { - dev_err(acx->dev, "failed to enter page 1 (%d)\n", ret); + dev_err(nt->dev, "failed to enter page 1 (%d)\n", ret); return ret; } par = 0x01; ret = mipi_dsi_dcs_write(dsi, 0x7d, &par, 1); if (ret < 0) { - dev_err(acx->dev, "failed to disable MTP reload (%d)\n", ret); + dev_err(nt->dev, "failed to disable MTP reload (%d)\n", ret); return ret; } ret = mipi_dsi_dcs_write(dsi, 0x22, &pwm_div, 1); if (ret < 0) { - dev_err(acx->dev, "failed to set PWM divisor (%d)\n", ret); + dev_err(nt->dev, "failed to set PWM divisor (%d)\n", ret); return ret; } par = 0xaa; ret = mipi_dsi_dcs_write(dsi, 0x7f, &par, 1); if (ret < 0) { - dev_err(acx->dev, "failed to lock CMD 2 (%d)\n", ret); + dev_err(nt->dev, "failed to lock CMD 2 (%d)\n", ret); return ret; } @@ -172,48 +175,48 @@ static int acx424akp_set_brightness(struct backlight_device *bl) ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, &par, 1); if (ret < 0) { - dev_err(acx->dev, "failed to enable display backlight (%d)\n", ret); + dev_err(nt->dev, "failed to enable display backlight (%d)\n", ret); return ret; } return 0; } -static const struct backlight_ops acx424akp_bl_ops = { - .update_status = acx424akp_set_brightness, +static const struct backlight_ops nt35560_bl_ops = { + .update_status = nt35560_set_brightness, }; -static const struct backlight_properties acx424akp_bl_props = { +static const struct backlight_properties nt35560_bl_props = { .type = BACKLIGHT_RAW, .brightness = 512, .max_brightness = 1023, }; -static int acx424akp_read_id(struct acx424akp *acx) +static int nt35560_read_id(struct nt35560 *nt) { - struct mipi_dsi_device *dsi = to_mipi_dsi_device(acx->dev); + struct mipi_dsi_device *dsi = to_mipi_dsi_device(nt->dev); u8 vendor, version, panel; u16 val; int ret; - ret = mipi_dsi_dcs_read(dsi, ACX424_DCS_READ_ID1, &vendor, 1); + ret = mipi_dsi_dcs_read(dsi, NT35560_DCS_READ_ID1, &vendor, 1); if (ret < 0) { - dev_err(acx->dev, "could not vendor ID byte\n"); + dev_err(nt->dev, "could not vendor ID byte\n"); return ret; } - ret = mipi_dsi_dcs_read(dsi, ACX424_DCS_READ_ID2, &version, 1); + ret = mipi_dsi_dcs_read(dsi, NT35560_DCS_READ_ID2, &version, 1); if (ret < 0) { - dev_err(acx->dev, "could not read device version byte\n"); + dev_err(nt->dev, "could not read device version byte\n"); return ret; } - ret = mipi_dsi_dcs_read(dsi, ACX424_DCS_READ_ID3, &panel, 1); + ret = mipi_dsi_dcs_read(dsi, NT35560_DCS_READ_ID3, &panel, 1); if (ret < 0) { - dev_err(acx->dev, "could not read panel ID byte\n"); + dev_err(nt->dev, "could not read panel ID byte\n"); return ret; } if (vendor == 0x00) { - dev_err(acx->dev, "device vendor ID is zero\n"); + dev_err(nt->dev, "device vendor ID is zero\n"); return -ENODEV; } @@ -222,11 +225,11 @@ static int acx424akp_read_id(struct acx424akp *acx) case DISPLAY_SONY_ACX424AKP_ID1: case DISPLAY_SONY_ACX424AKP_ID2: case DISPLAY_SONY_ACX424AKP_ID3: - dev_info(acx->dev, "MTP vendor: %02x, version: %02x, panel: %02x\n", + dev_info(nt->dev, "MTP vendor: %02x, version: %02x, panel: %02x\n", vendor, version, panel); break; default: - dev_info(acx->dev, "unknown vendor: %02x, version: %02x, panel: %02x\n", + dev_info(nt->dev, "unknown vendor: %02x, version: %02x, panel: %02x\n", vendor, version, panel); break; } @@ -234,49 +237,49 @@ static int acx424akp_read_id(struct acx424akp *acx) return 0; } -static int acx424akp_power_on(struct acx424akp *acx) +static int nt35560_power_on(struct nt35560 *nt) { int ret; - ret = regulator_enable(acx->supply); + ret = regulator_enable(nt->supply); if (ret) { - dev_err(acx->dev, "failed to enable supply (%d)\n", ret); + dev_err(nt->dev, "failed to enable supply (%d)\n", ret); return ret; } /* Assert RESET */ - gpiod_set_value_cansleep(acx->reset_gpio, 1); + gpiod_set_value_cansleep(nt->reset_gpio, 1); udelay(20); /* De-assert RESET */ - gpiod_set_value_cansleep(acx->reset_gpio, 0); + gpiod_set_value_cansleep(nt->reset_gpio, 0); usleep_range(11000, 20000); return 0; } -static void acx424akp_power_off(struct acx424akp *acx) +static void nt35560_power_off(struct nt35560 *nt) { /* Assert RESET */ - gpiod_set_value_cansleep(acx->reset_gpio, 1); + gpiod_set_value_cansleep(nt->reset_gpio, 1); usleep_range(11000, 20000); - regulator_disable(acx->supply); + regulator_disable(nt->supply); } -static int acx424akp_prepare(struct drm_panel *panel) +static int nt35560_prepare(struct drm_panel *panel) { - struct acx424akp *acx = panel_to_acx424akp(panel); - struct mipi_dsi_device *dsi = to_mipi_dsi_device(acx->dev); + struct nt35560 *nt = panel_to_nt35560(panel); + struct mipi_dsi_device *dsi = to_mipi_dsi_device(nt->dev); const u8 mddi = 3; int ret; - ret = acx424akp_power_on(acx); + ret = nt35560_power_on(nt); if (ret) return ret; - ret = acx424akp_read_id(acx); + ret = nt35560_read_id(nt); if (ret) { - dev_err(acx->dev, "failed to read panel ID (%d)\n", ret); + dev_err(nt->dev, "failed to read panel ID (%d)\n", ret); goto err_power_off; } @@ -284,7 +287,7 @@ static int acx424akp_prepare(struct drm_panel *panel) ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK); if (ret) { - dev_err(acx->dev, "failed to enable vblank TE (%d)\n", ret); + dev_err(nt->dev, "failed to enable vblank TE (%d)\n", ret); goto err_power_off; } @@ -298,31 +301,31 @@ static int acx424akp_prepare(struct drm_panel *panel) * this command. Due to the lack of documentation we cannot know for * sure. */ - ret = mipi_dsi_dcs_write(dsi, ACX424_DCS_SET_MDDI, + ret = mipi_dsi_dcs_write(dsi, NT35560_DCS_SET_MDDI, &mddi, sizeof(mddi)); if (ret < 0) { - dev_err(acx->dev, "failed to set MDDI (%d)\n", ret); + dev_err(nt->dev, "failed to set MDDI (%d)\n", ret); goto err_power_off; } /* Exit sleep mode */ ret = mipi_dsi_dcs_exit_sleep_mode(dsi); if (ret) { - dev_err(acx->dev, "failed to exit sleep mode (%d)\n", ret); + dev_err(nt->dev, "failed to exit sleep mode (%d)\n", ret); goto err_power_off; } msleep(140); ret = mipi_dsi_dcs_set_display_on(dsi); if (ret) { - dev_err(acx->dev, "failed to turn display on (%d)\n", ret); + dev_err(nt->dev, "failed to turn display on (%d)\n", ret); goto err_power_off; } - if (acx->video_mode) { + if (nt->video_mode) { /* In video mode turn peripheral on */ ret = mipi_dsi_turn_on_peripheral(dsi); if (ret) { - dev_err(acx->dev, "failed to turn on peripheral\n"); + dev_err(nt->dev, "failed to turn on peripheral\n"); goto err_power_off; } } @@ -330,43 +333,43 @@ static int acx424akp_prepare(struct drm_panel *panel) return 0; err_power_off: - acx424akp_power_off(acx); + nt35560_power_off(nt); return ret; } -static int acx424akp_unprepare(struct drm_panel *panel) +static int nt35560_unprepare(struct drm_panel *panel) { - struct acx424akp *acx = panel_to_acx424akp(panel); - struct mipi_dsi_device *dsi = to_mipi_dsi_device(acx->dev); + struct nt35560 *nt = panel_to_nt35560(panel); + struct mipi_dsi_device *dsi = to_mipi_dsi_device(nt->dev); int ret; ret = mipi_dsi_dcs_set_display_off(dsi); if (ret) { - dev_err(acx->dev, "failed to turn display off (%d)\n", ret); + dev_err(nt->dev, "failed to turn display off (%d)\n", ret); return ret; } /* Enter sleep mode */ ret = mipi_dsi_dcs_enter_sleep_mode(dsi); if (ret) { - dev_err(acx->dev, "failed to enter sleep mode (%d)\n", ret); + dev_err(nt->dev, "failed to enter sleep mode (%d)\n", ret); return ret; } msleep(85); - acx424akp_power_off(acx); + nt35560_power_off(nt); return 0; } -static int acx424akp_get_modes(struct drm_panel *panel, - struct drm_connector *connector) +static int nt35560_get_modes(struct drm_panel *panel, + struct drm_connector *connector) { - struct acx424akp *acx = panel_to_acx424akp(panel); + struct nt35560 *nt = panel_to_nt35560(panel); struct drm_display_mode *mode; - if (acx->video_mode) + if (nt->video_mode) mode = drm_mode_duplicate(connector->dev, &sony_acx424akp_vid_mode); else @@ -387,26 +390,26 @@ static int acx424akp_get_modes(struct drm_panel *panel, return 1; /* Number of modes */ } -static const struct drm_panel_funcs acx424akp_drm_funcs = { - .unprepare = acx424akp_unprepare, - .prepare = acx424akp_prepare, - .get_modes = acx424akp_get_modes, +static const struct drm_panel_funcs nt35560_drm_funcs = { + .unprepare = nt35560_unprepare, + .prepare = nt35560_prepare, + .get_modes = nt35560_get_modes, }; -static int acx424akp_probe(struct mipi_dsi_device *dsi) +static int nt35560_probe(struct mipi_dsi_device *dsi) { struct device *dev = &dsi->dev; - struct acx424akp *acx; + struct nt35560 *nt; int ret; - acx = devm_kzalloc(dev, sizeof(struct acx424akp), GFP_KERNEL); - if (!acx) + nt = devm_kzalloc(dev, sizeof(struct nt35560), GFP_KERNEL); + if (!nt) return -ENOMEM; - acx->video_mode = of_property_read_bool(dev->of_node, + nt->video_mode = of_property_read_bool(dev->of_node, "enforce-video-mode"); - mipi_dsi_set_drvdata(dsi, acx); - acx->dev = dev; + mipi_dsi_set_drvdata(dsi, nt); + nt->dev = dev; dsi->lanes = 2; dsi->format = MIPI_DSI_FMT_RGB888; @@ -419,7 +422,7 @@ static int acx424akp_probe(struct mipi_dsi_device *dsi) dsi->lp_rate = 19200000; dsi->hs_rate = 420160000; - if (acx->video_mode) + if (nt->video_mode) /* Burst mode using event for sync */ dsi->mode_flags = MIPI_DSI_MODE_VIDEO | @@ -428,63 +431,63 @@ static int acx424akp_probe(struct mipi_dsi_device *dsi) dsi->mode_flags = MIPI_DSI_CLOCK_NON_CONTINUOUS; - acx->supply = devm_regulator_get(dev, "vddi"); - if (IS_ERR(acx->supply)) - return PTR_ERR(acx->supply); + nt->supply = devm_regulator_get(dev, "vddi"); + if (IS_ERR(nt->supply)) + return PTR_ERR(nt->supply); /* This asserts RESET by default */ - acx->reset_gpio = devm_gpiod_get_optional(dev, "reset", - GPIOD_OUT_HIGH); - if (IS_ERR(acx->reset_gpio)) - return dev_err_probe(dev, PTR_ERR(acx->reset_gpio), + nt->reset_gpio = devm_gpiod_get_optional(dev, "reset", + GPIOD_OUT_HIGH); + if (IS_ERR(nt->reset_gpio)) + return dev_err_probe(dev, PTR_ERR(nt->reset_gpio), "failed to request GPIO\n"); - drm_panel_init(&acx->panel, dev, &acx424akp_drm_funcs, + drm_panel_init(&nt->panel, dev, &nt35560_drm_funcs, DRM_MODE_CONNECTOR_DSI); - acx->panel.backlight = devm_backlight_device_register(dev, "acx424akp", dev, acx, - &acx424akp_bl_ops, &acx424akp_bl_props); - if (IS_ERR(acx->panel.backlight)) - return dev_err_probe(dev, PTR_ERR(acx->panel.backlight), + nt->panel.backlight = devm_backlight_device_register(dev, "nt35560", dev, nt, + &nt35560_bl_ops, &nt35560_bl_props); + if (IS_ERR(nt->panel.backlight)) + return dev_err_probe(dev, PTR_ERR(nt->panel.backlight), "failed to register backlight device\n"); - drm_panel_add(&acx->panel); + drm_panel_add(&nt->panel); ret = mipi_dsi_attach(dsi); if (ret < 0) { - drm_panel_remove(&acx->panel); + drm_panel_remove(&nt->panel); return ret; } return 0; } -static int acx424akp_remove(struct mipi_dsi_device *dsi) +static int nt35560_remove(struct mipi_dsi_device *dsi) { - struct acx424akp *acx = mipi_dsi_get_drvdata(dsi); + struct nt35560 *nt = mipi_dsi_get_drvdata(dsi); mipi_dsi_detach(dsi); - drm_panel_remove(&acx->panel); + drm_panel_remove(&nt->panel); return 0; } -static const struct of_device_id acx424akp_of_match[] = { +static const struct of_device_id nt35560_of_match[] = { { .compatible = "sony,acx424akp" }, { /* sentinel */ } }; -MODULE_DEVICE_TABLE(of, acx424akp_of_match); +MODULE_DEVICE_TABLE(of, nt35560_of_match); -static struct mipi_dsi_driver acx424akp_driver = { - .probe = acx424akp_probe, - .remove = acx424akp_remove, +static struct mipi_dsi_driver nt35560_driver = { + .probe = nt35560_probe, + .remove = nt35560_remove, .driver = { - .name = "panel-sony-acx424akp", - .of_match_table = acx424akp_of_match, + .name = "panel-novatek-nt35560", + .of_match_table = nt35560_of_match, }, }; -module_mipi_dsi_driver(acx424akp_driver); +module_mipi_dsi_driver(nt35560_driver); MODULE_AUTHOR("Linus Wallei <linus.walleij(a)linaro.org>"); -MODULE_DESCRIPTION("MIPI-DSI Sony acx424akp Panel Driver"); +MODULE_DESCRIPTION("MIPI-DSI Novatek NT35560 Panel Driver"); MODULE_LICENSE("GPL v2"); -- 2.31.1

2 8

[PATCH v2 1/2] drm/msm/dpu: Add a function to retrieve the current CTL status
by AngeloGioacchino Del Regno 18 Feb '22

18 Feb '22

Add a function that returns whether the requested CTL is active or not: this will be used in a later commit to fix command mode panel issues. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno(a)somainline.org> --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 6 ++++++ drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 7 +++++++ 2 files changed, 13 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c index 64740ddb983e..3b6fd73eb3a8 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c @@ -91,6 +91,11 @@ static inline void dpu_hw_ctl_trigger_start(struct dpu_hw_ctl *ctx) DPU_REG_WRITE(&ctx->hw, CTL_START, 0x1); } +static inline bool dpu_hw_ctl_is_started(struct dpu_hw_ctl *ctx) +{ + return !!(DPU_REG_READ(&ctx->hw, CTL_START) & BIT(0)); +} + static inline void dpu_hw_ctl_trigger_pending(struct dpu_hw_ctl *ctx) { trace_dpu_hw_ctl_trigger_prepare(ctx->pending_flush_mask, @@ -579,6 +584,7 @@ static void _setup_ctl_ops(struct dpu_hw_ctl_ops *ops, ops->get_pending_flush = dpu_hw_ctl_get_pending_flush; ops->get_flush_register = dpu_hw_ctl_get_flush_register; ops->trigger_start = dpu_hw_ctl_trigger_start; + ops->is_started = dpu_hw_ctl_is_started; ops->trigger_pending = dpu_hw_ctl_trigger_pending; ops->reset = dpu_hw_ctl_reset_control; ops->wait_reset_status = dpu_hw_ctl_wait_reset_status; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h index 806c171e5df2..ac1544474022 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h @@ -61,6 +61,13 @@ struct dpu_hw_ctl_ops { */ void (*trigger_start)(struct dpu_hw_ctl *ctx); + /** + * check if the ctl is started + * @ctx : ctl path ctx pointer + * @Return: true if started, false if stopped + */ + bool (*is_started)(struct dpu_hw_ctl *ctx); + /** * kickoff prepare is in progress hw operation for sw * controlled interfaces: DSI cmd mode and WB interface -- 2.32.0

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dri-devel January 2022