dri-devel June 2022

dri-devel@lists.freedesktop.org

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697 discussions

[PATCH] drm/prime: drop unexpected word "the" in the comments
by Jiang Jian 22 Jun '22

22 Jun '22

there is an unexpected word "the" in the comments that need to be dropped file: drivers/gpu/drm/drm_prime.c line: 842 * of the the buffer described by the provided sg_table. changed to * of the buffer described by the provided sg_table. Signed-off-by: Jiang Jian <jiangjian(a)cdjrlc.com> --- drivers/gpu/drm/drm_prime.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c index e3f09f18110c..a3f180653b8b 100644 --- a/drivers/gpu/drm/drm_prime.c +++ b/drivers/gpu/drm/drm_prime.c @@ -839,7 +839,7 @@ EXPORT_SYMBOL(drm_prime_pages_to_sg); * @sgt: sg_table describing the buffer to check * * This helper calculates the contiguous size in the DMA address space - * of the the buffer described by the provided sg_table. + * of the buffer described by the provided sg_table. * * This is useful for implementing * &drm_gem_object_funcs.gem_prime_import_sg_table. -- 2.17.1

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[PATCH] drm: panel-orientation-quirks: drop unexpected word "the" in the comments
by Jiang Jian 22 Jun '22

22 Jun '22

there is an unexpected word "the" in the comments that need to be dropped file: drivers/gpu/drm/drm_panel_orientation_quirks.c line: 196 * GPD Pocket, note that the the DMI data is less generic then changed to * GPD Pocket, note that the DMI data is less generic then Signed-off-by: Jiang Jian <jiangjian(a)cdjrlc.com> --- drivers/gpu/drm/drm_panel_orientation_quirks.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_panel_orientation_quirks.c b/drivers/gpu/drm/drm_panel_orientation_quirks.c index df87ba99a87c..7a9eeed239f3 100644 --- a/drivers/gpu/drm/drm_panel_orientation_quirks.c +++ b/drivers/gpu/drm/drm_panel_orientation_quirks.c @@ -193,7 +193,7 @@ static const struct dmi_system_id orientation_data[] = { }, .driver_data = (void *)&lcd800x1280_rightside_up, }, { /* - * GPD Pocket, note that the the DMI data is less generic then + * GPD Pocket, note that the DMI data is less generic then * it seems, devices with a board-vendor of "AMI Corporation" * are quite rare, as are devices which have both board- *and* * product-id set to "Default String" -- 2.17.1

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[PATCH v6 00/10] Host1x context isolation support
by Mikko Perttunen 22 Jun '22

22 Jun '22

From: Mikko Perttunen <mperttunen(a)nvidia.com> ------------- Merging notes ------------- The changes to DT bindings should be applied on top of Thierry's patch 'dt-bindings: display: tegra: Convert to json-schema'. The change to the arm-smmu driver should be omitted if Robin Murphy's IOMMU bus cleanup series is merged. *** New in v6: Rebased on 5.19-rc3 (-next is too broken) Added patch to fix TRANSCFG offset on NVDEC. *** *** New in v5: Rebased Renamed host1x_context to host1x_memory_context Small change in DRM side client driver ops to reduce churn with some upcoming changes Add NVDEC support *** *** New in v4: Addressed review comments. See individual patches. *** *** New in v3: Added device tree bindings for new property. *** *** New in v2: Added support for Tegra194 Use standard iommu-map property instead of custom mechanism *** This series adds support for Host1x 'context isolation'. Since when programming engines through Host1x, userspace can program in any addresses it wants, we need some way to isolate the engines' memory spaces. Traditionally this has either been done imperfectly with a single shared IOMMU domain, or by copying and verifying the programming command stream at submit time (Host1x firewall). Since Tegra186 there is a privileged (only usable by kernel) Host1x opcode that allows setting the stream ID sent by the engine to the SMMU. So, by allocating a number of context banks and stream IDs for this purpose, and using this opcode at the beginning of each job, we can implement isolation. Due to the limited number of context banks only each process gets its own context, and not each channel. This feature also allows sharing engines among multiple VMs when used with Host1x's hardware virtualization support - up to 8 VMs can be configured with a subset of allowed stream IDs, enforced at hardware level. To implement this, this series adds a new host1x context bus, which will contain the 'struct device's corresponding to each context bank / stream ID, changes to device tree and SMMU code to allow registering the devices and using the bus, as well as the Host1x stream ID programming code and support in TegraDRM. Thanks, Mikko Mikko Perttunen (9): iommu/arm-smmu: Attach to host1x context device bus dt-bindings: host1x: Add iommu-map property gpu: host1x: Add context device management code gpu: host1x: Program context stream ID on submission arm64: tegra: Add Host1x context stream IDs on Tegra186+ drm/tegra: falcon: Set DMACTX field on DMA transactions drm/tegra: nvdec: Fix TRANSCFG register offset drm/tegra: Support context isolation drm/tegra: Implement stream ID related callbacks on engines Thierry Reding (1): dt-bindings: display: tegra: Convert to json-schema .../display/tegra/nvidia,tegra114-mipi.txt | 41 -- .../display/tegra/nvidia,tegra114-mipi.yaml | 74 ++ .../display/tegra/nvidia,tegra124-dpaux.yaml | 149 ++++ .../display/tegra/nvidia,tegra124-sor.yaml | 206 ++++++ .../display/tegra/nvidia,tegra124-vic.yaml | 71 ++ .../display/tegra/nvidia,tegra186-dc.yaml | 85 +++ .../tegra/nvidia,tegra186-display.yaml | 310 ++++++++ .../tegra/nvidia,tegra186-dsi-padctl.yaml | 45 ++ .../display/tegra/nvidia,tegra20-dc.yaml | 181 +++++ .../display/tegra/nvidia,tegra20-dsi.yaml | 159 +++++ .../display/tegra/nvidia,tegra20-epp.yaml | 70 ++ .../display/tegra/nvidia,tegra20-gr2d.yaml | 73 ++ .../display/tegra/nvidia,tegra20-gr3d.yaml | 214 ++++++ .../display/tegra/nvidia,tegra20-hdmi.yaml | 126 ++++ .../display/tegra/nvidia,tegra20-host1x.txt | 675 ------------------ .../display/tegra/nvidia,tegra20-host1x.yaml | 352 +++++++++ .../display/tegra/nvidia,tegra20-isp.yaml | 67 ++ .../display/tegra/nvidia,tegra20-mpe.yaml | 73 ++ .../display/tegra/nvidia,tegra20-tvo.yaml | 58 ++ .../display/tegra/nvidia,tegra20-vi.yaml | 163 +++++ .../display/tegra/nvidia,tegra210-csi.yaml | 52 ++ .../pinctrl/nvidia,tegra124-dpaux-padctl.txt | 59 -- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 11 + arch/arm64/boot/dts/nvidia/tegra194.dtsi | 11 + drivers/gpu/drm/tegra/drm.h | 11 + drivers/gpu/drm/tegra/falcon.c | 8 + drivers/gpu/drm/tegra/falcon.h | 1 + drivers/gpu/drm/tegra/nvdec.c | 13 +- drivers/gpu/drm/tegra/submit.c | 48 +- drivers/gpu/drm/tegra/uapi.c | 43 +- drivers/gpu/drm/tegra/vic.c | 67 +- drivers/gpu/host1x/Makefile | 1 + drivers/gpu/host1x/context.c | 160 +++++ drivers/gpu/host1x/context.h | 27 + drivers/gpu/host1x/dev.c | 12 +- drivers/gpu/host1x/dev.h | 2 + drivers/gpu/host1x/hw/channel_hw.c | 52 +- drivers/gpu/host1x/hw/host1x06_hardware.h | 10 + drivers/gpu/host1x/hw/host1x07_hardware.h | 10 + drivers/iommu/arm/arm-smmu/arm-smmu.c | 13 + include/linux/host1x.h | 26 + 41 files changed, 3037 insertions(+), 792 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-mipi.txt create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-mipi.yaml create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-dpaux.yaml create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-sor.yaml create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-vic.yaml create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra186-dc.yaml create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra186-display.yaml create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra186-dsi-padctl.yaml create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dc.yaml create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dsi.yaml create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-epp.yaml create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr2d.yaml create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr3d.yaml create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-hdmi.yaml delete mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.yaml create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-isp.yaml create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-mpe.yaml create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-tvo.yaml create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra210-csi.yaml delete mode 100644 Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-dpaux-padctl.txt create mode 100644 drivers/gpu/host1x/context.c create mode 100644 drivers/gpu/host1x/context.h -- 2.36.1

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[PATCH v4 0/3] KUnit tests for drm_format_helper
by José Expósito 22 Jun '22

22 Jun '22

Hello everyone, Following the style used in the selftest to KUnit series [1] and the AMD series [2], the tests were moved to the "tests" folder. In addition, to be consistent naming functions, I renamed the kunit_suite and the test cases to use underscores as suggested in [3]. It is not clear yet whether we want to have one or multiple Kconfig symbols and select which test should be built. However, refactoring from one approach to the other is quite simple, so I think we should be fine choosing the simpler option now and refactoring if required. Thanks a lot, José Expósito [1] https://lore.kernel.org/dri-devel/20220615135824.15522-1-maira.canal@usp.br… [2] https://lore.kernel.org/dri-devel/20220608010709.272962-1-maira.canal@usp.b… [3] https://www.kernel.org/doc/html/latest/dev-tools/kunit/style.html RFC -> v1: https://lore.kernel.org/dri-devel/20220530102017.471865-1-jose.exposito89@g… - Add .kunitconfig (Maxime Ripard) - Fix memory leak (Daniel Latypov) - Make config option generic (Javier Martinez Canillas): DRM_FORMAR_HELPER_TEST -> DRM_KUNIT_TEST - Remove DISABLE_STRUCTLEAK_PLUGIN (Daniel Latypov) v1 -> v2: https://lore.kernel.org/dri-devel/20220606095516.938934-1-jose.exposito89@g… Thomas Zimmermann: - Add DRM_RECT_INIT() macro - Move tests to drivers/gpu/drm/kunit - Improve test documentation v2 -> v3: https://lore.kernel.org/dri-devel/20220612161248.271590-1-jose.exposito89@g… - Use designated initializer in DRM_RECT_INIT (Jani Nikula) - Simplify the "conversion_buf_size" helper v3 -> v4: https://lore.kernel.org/dri-devel/20220616183852.GA12343@elementary/T/ - Move the source to the "tests" folder - Use "_" in kunit_suite and cases: https://www.kernel.org/doc/html/latest/dev-tools/kunit/style.html - Reviewed-by and Acked-by tags José Expósito (3): drm/rect: Add DRM_RECT_INIT() macro drm/format-helper: Add KUnit tests for drm_fb_xrgb8888_to_rgb332() drm/doc: Add KUnit documentation Documentation/gpu/drm-internals.rst | 32 ++++ drivers/gpu/drm/Kconfig | 16 ++ drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/tests/.kunitconfig | 3 + drivers/gpu/drm/tests/Makefile | 3 + .../gpu/drm/tests/drm_format_helper_test.c | 161 ++++++++++++++++++ include/drm/drm_rect.h | 16 ++ 7 files changed, 232 insertions(+) create mode 100644 drivers/gpu/drm/tests/.kunitconfig create mode 100644 drivers/gpu/drm/tests/Makefile create mode 100644 drivers/gpu/drm/tests/drm_format_helper_test.c -- 2.25.1

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[PATCH] drm/i915: Fix spelling typo in comment
by 1064094935＠qq.com 22 Jun '22

22 Jun '22

From: pengfuyuan <pengfuyuan(a)kylinos.cn> Fix spelling typo in comment. Reported-by: k2ci <kernel-bot(a)kylinos.cn> Signed-off-by: pengfuyuan <pengfuyuan(a)kylinos.cn> --- drivers/gpu/drm/i915/gem/i915_gem_tiling.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c index 80ac0db1ae8c..85518b28cd72 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c @@ -114,7 +114,7 @@ u32 i915_gem_fence_alignment(struct drm_i915_private *i915, u32 size, return i915_gem_fence_size(i915, size, tiling, stride); } -/* Check pitch constriants for all chips & tiling formats */ +/* Check pitch constraints for all chips & tiling formats */ static bool i915_tiling_ok(struct drm_i915_gem_object *obj, unsigned int tiling, unsigned int stride) -- 2.25.1 No virus found Checked by Hillstone Network AntiVirus

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[PATCH] drm/i915/gem: remove unused assignments
by zys.zljxml＠gmail.com 22 Jun '22

22 Jun '22

From: katrinzhou <katrinzhou(a)tencent.com> The variable ret is reassigned and the value EINVAL is never used. Thus, remove the unused assignments. Addresses-Coverity: ("Unused value") Fixes: d4433c7600f7 ("drm/i915/gem: Use the proto-context to handle create parameters (v5)") Signed-off-by: katrinzhou <katrinzhou(a)tencent.com> --- drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c index ab4c5ab28e4d..d5ef5243673a 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c @@ -931,8 +931,6 @@ static int set_proto_ctx_param(struct drm_i915_file_private *fpriv, break; case I915_CONTEXT_PARAM_PERSISTENCE: - if (args->size) - ret = -EINVAL; ret = proto_context_set_persistence(fpriv->dev_priv, pc, args->value); break; -- 2.27.0

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[PATCH v23 00/14] Add MediaTek SoC DRM (vdosys1) support for mt8195
by Nancy.Lin 22 Jun '22

22 Jun '22

The hardware path of vdosys1 with DPTx output need to go through by several modules, such as, OVL_ADAPTOR and MERGE. Add DRM and these modules support by the patches below: Changes in v23: - separate[7] mmsys/mutex and drm patches into two series Changes in v22: - rebase to next-20220525 - rebase to vdosys0 series v22 - separate dts to a new patch Changes in v21: - fix reviewer comment - fix rdma and ethdr binding doc and dts Changes in v20: - fix reviewer comment - update mmsys update bit api name - add mtk_mmsys_update_bits error message if lose gce property - list all mt8195 vdosys1 reset bits Changes in v19: - fix reviewer comment - separate mt8195 mmsys component to a new patch - separate mt8195 vdo0 and vdo1 routing table - separate mmsys_write_reg api to a new patch and simplify write reg code - separate mmsys 64 bit reset to a new patch - separate mtk-mutex dp_intf1 component to a new patch Changes in v18: - fix reviewer comment - fix rdma binding doc - fix ethdr binding doc - refine mmsys config cmdq support - refine merge reset control flow, get reset control in probe function - add ethdr reset control error handling and remove dbg log - rebase to vdosys0 series v20 (ref [5]) Changes in v17: - fix reviewer comment in v16 - separate ovl adaptor comp in mtk-mmsys and mtk-mutex - separate mmsys config API - move mdp_rdma binding yaml - fix ovl adaptor pm runtime get sync timing issue - rebase to vdosys0 series v19 (ref [5]) - rebase to [7] for modify vblank register change Changes in v16: - fix reviewer comment in v 15 - fix mtk_drm_ddp_comp.c alignment - fix vdosys0 mmsys num before adding vdosys1 patch Changes in v15: - fix ethdr uppercase hex number in dts Changes in v14: - remove MTK_MMSYS 64 bit dependency - add ethdr.yaml back and fix dt_schema check fail Resend v13 - add related maintainer in maillist Changes in v13: - fix reviewer comment in v12 - fix rdma dt-binding format - fix dts node naming - fix 32 bit build error - modify 64bit dependency for mtk-mmsys - rebase to vdosys0 series v16. (ref [5]) Changes in v12: - fix reviewer comment in v11 - modify mbox index - refine dma dev for ovl_adaptor sub driver Changes in v11: - remove ethdr vblank spin lock - refine ovl_adaptor print message Changes in v10: - refine ethdr reset control using devm_reset_control_array_get_optional_exclusive - fix ovl_adaptor mtk_ovl_adaptor_clk_enable error handle issue Changes in v9: - rebase on kernel-5.16-rc1 - rebase on vdosys0 series v13. (ref [5]) - fix ovl_adaptor sub driver is brought up unintentionally - fix clang build test fail- duplicate ethdr/mdp_rdma init_module/cleanup_module symbol issue Changes in v8: - separate merge async reset to new patch. - separate drm ovl_adaptor sub driver to new patch. - fix reviewer comment in v7. Changes in v7: - rebase on vdosys0 series v12 (ref[5]) - add dma description in ethdr binding document. - refine vdosys1 bit definition of mmsys routing table. - separate merge modification into 3 pathces. - separate mutex modification into 2 patches. - add plane color coding for mdp_rdma csc. - move mdp_rdma pm control to ovl_adaptor. - fix reviewer comment in v6. Changes in v6: - rebase on kernel-5.15-rc1. - change mbox label to gce0 for dts node of vdosys1. - modify mmsys reset num for mt8195. - rebase on vdosys0 series v10. (ref [5]) - use drm to bring up ovl_adaptor driver. - move drm iommu/mutex check from kms init to drm bind. - modify rdma binding doc location. (Documentation/devicetree/bindings/arm/) - modify for reviewer's comment in v5. Changes in v5: - add mmsys reset controller reference. Changes in v4: - use merge common driver for merge1~4. - refine ovl_adaptor rdma driver. - use ovl_adaptor ddp_comp function instead of ethdr. - modify for reviewer's comment in v3. Changes in v3: - modify for reviewer's comment in v2. - add vdosys1 2 pixels align limit. - add mixer odd offset support. Changes in v2: - Merge PSEUDO_OVL and ETHDR into one DRM component. - Add mmsys config API for vdosys1 hardware setting. - Add mmsys reset control using linux reset framework. Signed-off-by: Nancy.Lin <nancy.lin(a)mediatek.com> This series are based on the following patch: [1] arm64: dts: Add mediatek SoC mt8195 and evaluation board 20220112114724.1953-4-tinghan.shen(a)mediatek.com [2] arm64: dts: mt8195: add IOMMU and smi nodes 20210615173233.26682-15-tinghan.shen(a)mediatek.com [3] arm64: dts: mt8195: add gce node 20220126090109.32143-1-jason-jh.lin(a)mediatek.com [4] [v2] arm64: dts: mt8195: add display node for vdosys0 20220225021535.2655-1-jason-jh.lin(a)mediatek.com [5] Add MediaTek SoC DRM (vdosys0) support for mt8195 - v22 series 20220526102126.19756-1-jason-jh.lin(a)mediatek.com [6] dt-bindings: mediatek: mt8195: Add binding for MM IOMMU 20220407075726.17771-2-yong.wu(a)mediatek.com [7] Add MediaTek SoC DRM (vdosys1) support for mt8195 20220526110233.20080-1-nancy.lin(a)mediatek.com Nancy.Lin (14): dt-bindings: mediatek: add vdosys1 RDMA definition for mt8195 dt-bindings: mediatek: add ethdr definition for mt8195 drm/mediatek: add display MDP RDMA support for MT8195 drm/mediatek: add display merge advance config API for MT8195 drm/mediatek: add display merge start/stop API for cmdq support drm/mediatek: add display merge mute/unmute support for MT8195 drm/mediatek: add display merge async reset control drm/mediatek: add ETHDR support for MT8195 drm/mediatek: add mediatek-drm plane color encoding info drm/mediatek: add ovl_adaptor support for MT8195 drm/mediatek: add dma dev get function drm/mediatek: modify mediatek-drm for mt8195 multi mmsys support drm/mediatek: add drm ovl_adaptor sub driver for MT8195 drm/mediatek: add mediatek-drm of vdosys1 support for MT8195 .../display/mediatek/mediatek,ethdr.yaml | 188 +++++++ .../display/mediatek/mediatek,mdp-rdma.yaml | 88 +++ drivers/gpu/drm/mediatek/Makefile | 5 +- drivers/gpu/drm/mediatek/mtk_disp_drv.h | 38 ++ drivers/gpu/drm/mediatek/mtk_disp_merge.c | 94 +++- .../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 514 ++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 96 ++-- drivers/gpu/drm/mediatek/mtk_drm_crtc.h | 6 +- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 125 +++-- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 58 +- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 360 ++++++++---- drivers/gpu/drm/mediatek/mtk_drm_drv.h | 25 +- drivers/gpu/drm/mediatek/mtk_drm_plane.c | 1 + drivers/gpu/drm/mediatek/mtk_drm_plane.h | 1 + drivers/gpu/drm/mediatek/mtk_ethdr.c | 369 +++++++++++++ drivers/gpu/drm/mediatek/mtk_ethdr.h | 26 + drivers/gpu/drm/mediatek/mtk_mdp_rdma.c | 315 +++++++++++ drivers/gpu/drm/mediatek/mtk_mdp_rdma.h | 20 + 18 files changed, 2123 insertions(+), 206 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c create mode 100644 drivers/gpu/drm/mediatek/mtk_ethdr.c create mode 100644 drivers/gpu/drm/mediatek/mtk_ethdr.h create mode 100644 drivers/gpu/drm/mediatek/mtk_mdp_rdma.c create mode 100644 drivers/gpu/drm/mediatek/mtk_mdp_rdma.h -- 2.18.0

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Exynos vblank timeout issue
by Martin Jücker 22 Jun '22

22 Jun '22

Hello, I'm trying to get Android 12 up and running on my Galaxy Note 10.1 which is based on Exynos 4412 with a Mali GPU. For Android 11, I had no issues with graphics but after upgrading and building Android 12, I'm getting a vblank wait timeout shortly after starting the device setup, which in turn leads to my display turning black and SurfaceFlinger hanging. This can be reliably reproduced after every reboot, so much so that it's basically always on the exact same step of the setup. I'm using the following setup: * 5.10.101 Android Common Kernel with some patches to get the Note 10.1 up and running * Exynos FIMD + Lima GPU driver * android-12.1.0_r5 branch * drm-hwcomposer main branch * mesa main branch * minigbm from the GloDroid project I tried several older versions of hwc, mesa and minigbm with no success, same problem on all of them. What I found is that, if I disable overlay planes and only the primary plane is used, it works without any issues. Adding the second plane is fine as well, but the third one triggers the problem. For some reason, this didn't happen on Android 11 though and nothing changed on the kernel side, I was using the same kernel for it. Unfortunately, there is not a lot going on in the logging. In logcat I can see the following messages: E hwc-drm-atomic-state-manager:sync_wait(fd=33) returned: -1 (errno: 62) E hwc-drm-atomic-state-manager: Failed to commit pset ret=-16 E hwc-drm-atomic-state-manager: Composite failed for pipeline VGA-1 E Fence: waitForever: Throttling EGL Production: fence 431 didn't signal in 3000 ms W OpenGLRenderer: dequeueBuffer failed,error = -110; Here is the dmesg output of it: [ 55.106235] [drm:drm_ioctl] comm="composer(a)2.4-se" pid=266, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC [ 55.106264] [drm:drm_atomic_state_init] Allocated atomic state a07053f4 [ 55.106299] [drm:drm_mode_object_get] OBJ ID: 73 (2) [ 55.106313] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane-0] ff8c5726 state to a07053f4 [ 55.106327] [drm:drm_mode_object_get] OBJ ID: 60 (1) [ 55.106339] [drm:drm_atomic_get_crtc_state] Added [CRTC:54:crtc-0] 33284f8c state to a07053f4 [ 55.106367] [drm:drm_atomic_set_fb_for_plane] Set [FB:73] for [PLANE:31:plane-0] state ff8c5726 [ 55.106385] [drm:drm_mode_object_get] OBJ ID: 73 (5) [ 55.106395] [drm:drm_mode_object_put.part.0] OBJ ID: 73 (6) [ 55.106415] [drm:drm_mode_object_put.part.0] OBJ ID: 73 (5) [ 55.106426] [drm:drm_mode_object_put.part.0] OBJ ID: 73 (4) [ 55.106449] [drm:drm_mode_object_get] OBJ ID: 72 (2) [ 55.106462] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane-1] b6a2ee22 state to a07053f4 [ 55.106479] [drm:drm_atomic_set_fb_for_plane] Set [FB:72] for [PLANE:34:plane-1] state b6a2ee22 [ 55.106490] [drm:drm_mode_object_get] OBJ ID: 72 (5) [ 55.106500] [drm:drm_mode_object_put.part.0] OBJ ID: 72 (6) [ 55.106510] [drm:drm_mode_object_put.part.0] OBJ ID: 72 (5) [ 55.106520] [drm:drm_mode_object_put.part.0] OBJ ID: 72 (4) [ 55.106540] [drm:drm_mode_object_get] OBJ ID: 68 (2) [ 55.106552] [drm:drm_atomic_get_plane_state] Added [PLANE:39:plane-2] aba4b1f1 state to a07053f4 [ 55.106568] [drm:drm_atomic_set_fb_for_plane] Set [FB:61] for [PLANE:39:plane-2] state aba4b1f1 [ 55.106578] [drm:drm_mode_object_get] OBJ ID: 61 (3) [ 55.106588] [drm:drm_mode_object_put.part.0] OBJ ID: 68 (3) [ 55.106599] [drm:drm_mode_object_put.part.0] OBJ ID: 61 (4) [ 55.106608] [drm:drm_mode_object_put.part.0] OBJ ID: 61 (3) [ 55.106628] [drm:drm_mode_object_get] OBJ ID: 66 (2) [ 55.106639] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane-3] 08e79ee6 state to a07053f4 [ 55.106656] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for [PLANE:44:plane-3] state 08e79ee6 [ 55.106666] [drm:drm_mode_object_get] OBJ ID: 66 (5) [ 55.106677] [drm:drm_mode_object_put.part.0] OBJ ID: 66 (6) [ 55.106687] [drm:drm_mode_object_put.part.0] OBJ ID: 66 (5) [ 55.106697] [drm:drm_mode_object_put.part.0] OBJ ID: 66 (4) [ 55.106739] [drm:drm_atomic_check_only] checking a07053f4 [ 55.106769] exynos-drm exynos-drm: [drm:exynos_plane_atomic_check] plane : offset_x/y(0,0), width/height(4,800) [ 55.106785] exynos-drm exynos-drm: [drm:exynos_plane_atomic_check] plane : offset_x/y(4,0), width/height(1276,800) [ 55.106798] exynos-drm exynos-drm: [drm:exynos_plane_atomic_check] plane : offset_x/y(0,0), width/height(1280,800) [ 55.106813] exynos-drm exynos-drm: [drm:exynos_plane_atomic_check] plane : offset_x/y(0,776), width/height(1280,24) [ 55.106827] [drm:drm_atomic_nonblocking_commit] committing a07053f4 nonblocking [ 55.106905] exynos-drm exynos-drm: [drm:drm_calc_timestamping_constants] crtc 54: hwmode: htotal 1350, vtotal 823, vdisplay 800 [ 55.106922] exynos-drm exynos-drm: [drm:drm_calc_timestamping_constants] crtc 54: clock 66663 kHz framedur 16666666 linedur 20251 [ 55.106949] exynos4-fb 11c00000.fimd: [drm:fimd_update_plane] start addr = 0x22f013f0, end addr = 0x232e93f0, size = 0x3e8000 [ 55.106962] exynos4-fb 11c00000.fimd: [drm:fimd_update_plane] ovl_width = 4, ovl_height = 800 [ 55.106977] exynos4-fb 11c00000.fimd: [drm:fimd_update_plane] osd pos: tx = 0, ty = 0, bx = 3, by = 799 [ 55.106989] exynos4-fb 11c00000.fimd: [drm:fimd_update_plane] osd size = 0xc80 [ 55.107005] exynos4-fb 11c00000.fimd: [drm:fimd_update_plane] start addr = 0x21300000, end addr = 0x216e8000, size = 0x3e8000 [ 55.107017] exynos4-fb 11c00000.fimd: [drm:fimd_update_plane] ovl_width = 1276, ovl_height = 800 [ 55.107031] exynos4-fb 11c00000.fimd: [drm:fimd_update_plane] osd pos: tx = 4, ty = 0, bx = 1279, by = 799 [ 55.107043] exynos4-fb 11c00000.fimd: [drm:fimd_update_plane] osd size = 0xf9380 [ 55.107061] exynos4-fb 11c00000.fimd: [drm:fimd_update_plane] start addr = 0x20500000, end addr = 0x208e8000, size = 0x3e8000 [ 55.107073] exynos4-fb 11c00000.fimd: [drm:fimd_update_plane] ovl_width = 1280, ovl_height = 800 [ 55.107086] exynos4-fb 11c00000.fimd: [drm:fimd_update_plane] osd pos: tx = 0, ty = 0, bx = 1279, by = 799 [ 55.107097] exynos4-fb 11c00000.fimd: [drm:fimd_update_plane] osd size = 0xfa000 [ 55.107115] exynos4-fb 11c00000.fimd: [drm:fimd_update_plane] start addr = 0x22800000, end addr = 0x2281e000, size = 0x1e000 [ 55.107127] exynos4-fb 11c00000.fimd: [drm:fimd_update_plane] ovl_width = 1280, ovl_height = 24 [ 55.107140] exynos4-fb 11c00000.fimd: [drm:fimd_update_plane] osd pos: tx = 0, ty = 776, bx = 1279, by = 799 [ 55.107168] exynos-drm exynos-drm: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=3108, diff=0, hw=0 hw_last=0 [ 55.172238] [drm:drm_ioctl] comm="RenderThread" pid=1145, dev=0xe281, auth=1, DRM_IOCTL_SYNCOBJ_HANDLE_TO_FD [ 55.215253] ------------[ cut here ]------------ [ 55.215285] WARNING: CPU: 1 PID: 115 at ../drivers/gpu/drm/drm_atomic_helper.c:1513 drm_atomic_helper_wait_for_vblanks.part.1+0x2b8/0x2bc [ 55.215294] [CRTC:54:crtc-0] vblank wait timed out [ 55.215299] Modules linked in: s5p_mfc s5p_jpeg v4l2_mem2mem videobuf2_dma_contig videobuf2_memops videobuf2_v4l2 videobuf2_common rfcomm kheaders hidp hci_uart cpufreq_userspace cpufreq_powersave cpufreq_conservative btbcm brcmfmac brcmutil bnep bluetooth atmel_mxt_ts [ 55.215402] CPU: 1 PID: 115 Comm: kworker/u8:2 Tainted: G W 5.10.101+ #15 [ 55.215408] Hardware name: Samsung Exynos (Flattened Device Tree) [ 55.215421] Workqueue: events_unbound commit_work [ 55.215430] Backtrace: [ 55.215449] [<c010d9c4>] (dump_backtrace) from [<c010dd18>] (show_stack+0x20/0x24) [ 55.215460] r7:60000013 r6:c13c6d8c r5:00000000 r4:c13c6d8c [ 55.215473] [<c010dcf8>] (show_stack) from [<c0cd3e7c>] (dump_stack_lvl+0x90/0xa4) [ 55.215485] [<c0cd3dec>] (dump_stack_lvl) from [<c0cd3ea8>] (dump_stack+0x18/0x1c) [ 55.215496] r9:c070cab4 r8:000005e9 r7:00000009 r6:00000000 r5:c102b268 r4:c2165dec [ 55.215511] [<c0cd3e90>] (dump_stack) from [<c0138098>] (__warn+0x110/0x114) [ 55.215523] [<c0137f88>] (__warn) from [<c0138124>] (warn_slowpath_fmt+0x88/0xc4) [ 55.215534] r9:00000009 r8:c070cab4 r7:000005e9 r6:c102b268 r5:c102b7dc r4:c2164000 [ 55.215550] [<c01380a0>] (warn_slowpath_fmt) from [<c070cab4>] (drm_atomic_helper_wait_for_vblanks.part.1+0x2b8/0x2bc) [ 55.215561] r9:00000000 r8:00000001 r7:00000000 r6:00000000 r5:00000000 r4:c213d000 [ 55.215575] [<c070c7fc>] (drm_atomic_helper_wait_for_vblanks.part.1) from [<c070e31c>] (drm_atomic_helper_commit_tail_rpm+0x6c/0x7c) [ 55.215586] r10:c13cdc78 r9:00000000 r8:00000000 r7:d4511ee8 r6:0000000c r5:c213c800 [ 55.215592] r4:d0e42b00 [ 55.215603] [<c070e2b0>] (drm_atomic_helper_commit_tail_rpm) from [<c070e724>] (commit_tail+0xb8/0x1d4) [ 55.215611] r5:00000000 r4:d0e42b00 [ 55.215621] [<c070e66c>] (commit_tail) from [<c070e85c>] (commit_work+0x1c/0x20) [ 55.215632] r10:c141cfe0 r9:00000000 r8:00000000 r7:c1c0f000 r6:c1c0a400 r5:c1f16080 [ 55.215638] r4:d0e42b30 [ 55.215650] [<c070e840>] (commit_work) from [<c01583b8>] (process_one_work+0x1b0/0x594) [ 55.215661] [<c0158208>] (process_one_work) from [<c01587f8>] (worker_thread+0x5c/0x550) [ 55.215672] r10:c1303d00 r9:00000088 r8:ffffe000 r7:c1c0a418 r6:c1f16094 r5:c1c0a400 [ 55.215678] r4:c1f16080 [ 55.215692] [<c015879c>] (worker_thread) from [<c0160bc0>] (kthread+0x198/0x1b0) [ 55.215703] r10:c215be74 r9:00000000 r8:c1f16080 r7:c015879c r6:c2164000 r5:c1f0d140 [ 55.215710] r4:c211e200 [ 55.215722] [<c0160a28>] (kthread) from [<c0100148>] (ret_from_fork+0x14/0x2c) [ 55.215729] Exception stack(0xc2165fb0 to 0xc2165ff8) [ 55.215738] 5fa0: 00000000 00000000 00000000 00000000 [ 55.215749] 5fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 55.215758] 5fe0: 00000000 00000000 00000000 00000000 00000013 00000000 [ 55.215769] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c0160a28 [ 55.215775] r4:c1f0d140 [ 55.215782] ---[ end trace 3478b4dd7c26b793 ]--- [ 55.215804] [drm:drm_atomic_state_default_clear] Clearing atomic state a07053f4 [ 55.215820] [drm:drm_mode_object_put.part.0] OBJ ID: 60 (2) [ 55.215833] [drm:drm_mode_object_put.part.0] OBJ ID: 73 (3) [ 55.215844] [drm:drm_mode_object_put.part.0] OBJ ID: 72 (3) [ 55.215855] [drm:drm_mode_object_put.part.0] OBJ ID: 68 (2) [ 55.215865] [drm:drm_mode_object_put.part.0] OBJ ID: 66 (3) [ 55.215876] [drm:__drm_atomic_state_free] Freeing atomic state a07053f4 If I can provide anything else that would be helpful to analyze this problem, I'm happy to assist. Kind Regards Martin

3 6

[PATCH] drm/nouveau/mmu: Fix a typo
by Zhang Jiaming 22 Jun '22

22 Jun '22

There is a typo in comments. Change 'neeed' to 'need'. Signed-off-by: Zhang Jiaming <jiaming(a)nfschina.com> --- drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c index 8bf00b396ec1..7d26608491b1 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c @@ -280,7 +280,7 @@ nvkm_vmm_unref_ptes(struct nvkm_vmm_iter *it, bool pfn, u32 ptei, u32 ptes) if (desc->type == SPT && (pgt->refs[0] || pgt->refs[1])) nvkm_vmm_unref_sptes(it, pgt, desc, ptei, ptes); - /* PT no longer neeed? Destroy it. */ + /* PT no longer need? Destroy it. */ if (!pgt->refs[type]) { it->lvl++; TRA(it, "%s empty", nvkm_vmm_desc_type(desc)); -- 2.25.1

2 2

[PATCH v4, 0/3] add h264 decoder driver for mt8186
by Yunfei Dong 22 Jun '22

22 Jun '22

Firstly, add mt8186 compatible and private data, then add document for compatible "mediatek,mt8186-vcodec-dec". For mt8186 is single core architecture, need to add new interface for h264 hardware decoder. Patche 1 add mt8186 compatible and private data. Patche 2 add mt8186 compatible document. Patche 3 add h264 single core driver. --- This patch depends on "support for MT8192 decoder"[1] [1] https://patchwork.kernel.org/project/linux-mediatek/cover/20220512021950.29… --- changed with v3: - fix __iomem not reasonable, align share memory to dram. changed with v2: - fix sparse and smatch check fail for patch 3 changed with v1: - rebase driver to the latest media_stage. --- Yunfei Dong (3): dt-bindings: media: mediatek: vcodec: Adds decoder dt-bindings for mt8186 media: mediatek: vcodec: Support MT8186 media: mediatek: vcodec: add h264 decoder driver for mt8186 .../media/mediatek,vcodec-subdev-decoder.yaml | 4 +- .../platform/mediatek/vcodec/mtk_vcodec_dec.h | 1 + .../mediatek/vcodec/mtk_vcodec_dec_drv.c | 4 + .../vcodec/mtk_vcodec_dec_stateless.c | 19 ++ .../vcodec/vdec/vdec_h264_req_multi_if.c | 177 +++++++++++++++++- 5 files changed, 203 insertions(+), 2 deletions(-) -- 2.18.0

3 13

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dri-devel June 2022