dri-devel June 2022

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697 discussions

[PATCH v3 1/3] drm/msm/dpu: index dpu_kms->hw_vbif using vbif_idx
by Dmitry Baryshkov 15 Jun '22

15 Jun '22

Remove loops over hw_vbif. Instead always VBIF's idx as an index in the array. This fixes an error in dpu_kms_hw_init(), where we fill dpu_kms->hw_vbif[i], but check for an error pointer at dpu_kms->hw_vbif[vbif_idx]. Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov(a)linaro.org> --- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 12 ++++------ drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c | 29 +++++++++++------------- 2 files changed, 18 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index 2b9d931474e0..1255d00c92cf 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -830,12 +830,10 @@ static void _dpu_kms_hw_destroy(struct dpu_kms *dpu_kms) _dpu_kms_mmu_destroy(dpu_kms); if (dpu_kms->catalog) { - for (i = 0; i < dpu_kms->catalog->vbif_count; i++) { - u32 vbif_idx = dpu_kms->catalog->vbif[i].id; - - if ((vbif_idx < VBIF_MAX) && dpu_kms->hw_vbif[vbif_idx]) { - dpu_hw_vbif_destroy(dpu_kms->hw_vbif[vbif_idx]); - dpu_kms->hw_vbif[vbif_idx] = NULL; + for (i = 0; i < ARRAY_SIZE(dpu_kms->hw_vbif); i++) { + if (dpu_kms->hw_vbif[i]) { + dpu_hw_vbif_destroy(dpu_kms->hw_vbif[i]); + dpu_kms->hw_vbif[i] = NULL; } } } @@ -1135,7 +1133,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms) for (i = 0; i < dpu_kms->catalog->vbif_count; i++) { u32 vbif_idx = dpu_kms->catalog->vbif[i].id; - dpu_kms->hw_vbif[i] = dpu_hw_vbif_init(vbif_idx, + dpu_kms->hw_vbif[vbif_idx] = dpu_hw_vbif_init(vbif_idx, dpu_kms->vbif[vbif_idx], dpu_kms->catalog); if (IS_ERR_OR_NULL(dpu_kms->hw_vbif[vbif_idx])) { rc = PTR_ERR(dpu_kms->hw_vbif[vbif_idx]); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c index 21d20373eb8b..a18fb649301c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c @@ -11,6 +11,14 @@ #include "dpu_hw_vbif.h" #include "dpu_trace.h" +static struct dpu_hw_vbif *dpu_get_vbif(struct dpu_kms *dpu_kms, enum dpu_vbif vbif_idx) +{ + if (vbif_idx < ARRAY_SIZE(dpu_kms->hw_vbif)) + return dpu_kms->hw_vbif[vbif_idx]; + + return NULL; +} + /** * _dpu_vbif_wait_for_xin_halt - wait for the xin to halt * @vbif: Pointer to hardware vbif driver @@ -148,20 +156,15 @@ static u32 _dpu_vbif_get_ot_limit(struct dpu_hw_vbif *vbif, void dpu_vbif_set_ot_limit(struct dpu_kms *dpu_kms, struct dpu_vbif_set_ot_params *params) { - struct dpu_hw_vbif *vbif = NULL; + struct dpu_hw_vbif *vbif; struct dpu_hw_mdp *mdp; bool forced_on = false; u32 ot_lim; - int ret, i; + int ret; mdp = dpu_kms->hw_mdp; - for (i = 0; i < ARRAY_SIZE(dpu_kms->hw_vbif); i++) { - if (dpu_kms->hw_vbif[i] && - dpu_kms->hw_vbif[i]->idx == params->vbif_idx) - vbif = dpu_kms->hw_vbif[i]; - } - + vbif = dpu_get_vbif(dpu_kms, params->vbif_idx); if (!vbif || !mdp) { DRM_DEBUG_ATOMIC("invalid arguments vbif %d mdp %d\n", vbif != NULL, mdp != NULL); @@ -204,7 +207,7 @@ void dpu_vbif_set_ot_limit(struct dpu_kms *dpu_kms, void dpu_vbif_set_qos_remap(struct dpu_kms *dpu_kms, struct dpu_vbif_set_qos_params *params) { - struct dpu_hw_vbif *vbif = NULL; + struct dpu_hw_vbif *vbif; struct dpu_hw_mdp *mdp; bool forced_on = false; const struct dpu_vbif_qos_tbl *qos_tbl; @@ -216,13 +219,7 @@ void dpu_vbif_set_qos_remap(struct dpu_kms *dpu_kms, } mdp = dpu_kms->hw_mdp; - for (i = 0; i < ARRAY_SIZE(dpu_kms->hw_vbif); i++) { - if (dpu_kms->hw_vbif[i] && - dpu_kms->hw_vbif[i]->idx == params->vbif_idx) { - vbif = dpu_kms->hw_vbif[i]; - break; - } - } + vbif = dpu_get_vbif(dpu_kms, params->vbif_idx); if (!vbif || !vbif->cap) { DPU_ERROR("invalid vbif %d\n", params->vbif_idx); -- 2.35.1

1 2

[PATCH v5 00/10] drm/hdcp: Pull HDCP auth/exchange/check into helpers
by Sean Paul 15 Jun '22

15 Jun '22

From: Sean Paul <seanpaul(a)chromium.org> Rebased set from November. Fixed a nit from Stephen in the msm patch and moved hdcp registers into the trogdor dtsi file to avoid differences with sc7180-based windows devices. The set is 4 patches lighter since some of the changes were accepted into msm. I'm still waiting for Intel review of the first 7 patches. Rodrigo/Jani, would you please provide your input so we can move forward with this set? Thanks, Sean Link: https://patchwork.freedesktop.org/series/94623/ #v1 Link: https://patchwork.freedesktop.org/series/94713/ #v2 Link: https://patchwork.freedesktop.org/series/94712/ #v3 Link: https://patchwork.freedesktop.org/series/94712/ #v4 Sean Paul (10): drm/hdcp: Add drm_hdcp_atomic_check() drm/hdcp: Avoid changing crtc state in hdcp atomic check drm/hdcp: Update property value on content type and user changes drm/hdcp: Expand HDCP helper library for enable/disable/check drm/i915/hdcp: Consolidate HDCP setup/state cache drm/i915/hdcp: Retain hdcp_capable return codes drm/i915/hdcp: Use HDCP helpers for i915 dt-bindings: msm/dp: Add bindings for HDCP registers arm64: dts: qcom: sc7180: Add support for HDCP in dp-controller drm/msm: Implement HDCP 1.x using the new drm HDCP helpers .../bindings/display/msm/dp-controller.yaml | 7 +- arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 8 + arch/arm64/boot/dts/qcom/sc7180.dtsi | 6 +- drivers/gpu/drm/drm_hdcp.c | 1197 ++++++++++++++++- drivers/gpu/drm/i915/display/intel_atomic.c | 7 +- drivers/gpu/drm/i915/display/intel_ddi.c | 29 +- .../drm/i915/display/intel_display_debugfs.c | 11 +- .../drm/i915/display/intel_display_types.h | 58 +- drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 345 ++--- drivers/gpu/drm/i915/display/intel_dp_mst.c | 17 +- drivers/gpu/drm/i915/display/intel_hdcp.c | 1011 +++----------- drivers/gpu/drm/i915/display/intel_hdcp.h | 36 +- drivers/gpu/drm/i915/display/intel_hdmi.c | 256 ++-- drivers/gpu/drm/msm/Makefile | 1 + drivers/gpu/drm/msm/dp/dp_debug.c | 46 +- drivers/gpu/drm/msm/dp/dp_debug.h | 6 +- drivers/gpu/drm/msm/dp/dp_display.c | 46 +- drivers/gpu/drm/msm/dp/dp_display.h | 5 + drivers/gpu/drm/msm/dp/dp_drm.c | 68 +- drivers/gpu/drm/msm/dp/dp_drm.h | 5 + drivers/gpu/drm/msm/dp/dp_hdcp.c | 453 +++++++ drivers/gpu/drm/msm/dp/dp_hdcp.h | 27 + drivers/gpu/drm/msm/dp/dp_parser.c | 20 +- drivers/gpu/drm/msm/dp/dp_parser.h | 4 + drivers/gpu/drm/msm/dp/dp_reg.h | 32 +- drivers/gpu/drm/msm/msm_atomic.c | 15 + include/drm/drm_hdcp.h | 194 +++ 27 files changed, 2582 insertions(+), 1328 deletions(-) create mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp.c create mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp.h -- Sean Paul, Software Engineer, Google / Chromium OS

5 24

[PATCH] drm/msm/dsi: Use single function for reset
by Luca Weiss 15 Jun '22

15 Jun '22

From: Vladimir Lypak <vladimir.lypak(a)gmail.com> There is currently two function for performing reset: dsi_sw_reset and dsi_sw_reset_restore. Only difference betwean those is that latter one assumes that DSI controller is enabled. In contrary former one assumes that controller is disabled and executed during power-on. However this assumtion is not true mobile devices which have boot splash set up by boot-loader. This patch removes dsi_sw_reset_restore and makes dsi_sw_reset disable DSI controller during reset sequence if it's enabled. Signed-off-by: Vladimir Lypak <vladimir.lypak(a)gmail.com> Signed-off-by: Luca Weiss <luca(a)z3ntu.xyz> --- drivers/gpu/drm/msm/dsi/dsi_host.c | 48 +++++++++++++----------------- 1 file changed, 21 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index a95d5df52653..bab2634ebd11 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -1080,12 +1080,32 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi) static void dsi_sw_reset(struct msm_dsi_host *msm_host) { + u32 ctrl; + + ctrl = dsi_read(msm_host, REG_DSI_CTRL); + + if (ctrl & DSI_CTRL_ENABLE) { + dsi_write(msm_host, REG_DSI_CTRL, ctrl & ~DSI_CTRL_ENABLE); + /* + * dsi controller need to be disabled before + * clocks turned on + */ + wmb(); + } + dsi_write(msm_host, REG_DSI_CLK_CTRL, DSI_CLK_CTRL_ENABLE_CLKS); wmb(); /* clocks need to be enabled before reset */ + /* dsi controller can only be reset while clocks are running */ dsi_write(msm_host, REG_DSI_RESET, 1); msleep(DSI_RESET_TOGGLE_DELAY_MS); /* make sure reset happen */ dsi_write(msm_host, REG_DSI_RESET, 0); + wmb(); /* controller out of reset */ + + if (ctrl & DSI_CTRL_ENABLE) { + dsi_write(msm_host, REG_DSI_CTRL, ctrl); + wmb(); /* make sure dsi controller enabled again */ + } } static void dsi_op_mode_config(struct msm_dsi_host *msm_host, @@ -1478,32 +1498,6 @@ static int dsi_cmds2buf_tx(struct msm_dsi_host *msm_host, return len; } -static void dsi_sw_reset_restore(struct msm_dsi_host *msm_host) -{ - u32 data0, data1; - - data0 = dsi_read(msm_host, REG_DSI_CTRL); - data1 = data0; - data1 &= ~DSI_CTRL_ENABLE; - dsi_write(msm_host, REG_DSI_CTRL, data1); - /* - * dsi controller need to be disabled before - * clocks turned on - */ - wmb(); - - dsi_write(msm_host, REG_DSI_CLK_CTRL, DSI_CLK_CTRL_ENABLE_CLKS); - wmb(); /* make sure clocks enabled */ - - /* dsi controller can only be reset while clocks are running */ - dsi_write(msm_host, REG_DSI_RESET, 1); - msleep(DSI_RESET_TOGGLE_DELAY_MS); /* make sure reset happen */ - dsi_write(msm_host, REG_DSI_RESET, 0); - wmb(); /* controller out of reset */ - dsi_write(msm_host, REG_DSI_CTRL, data0); - wmb(); /* make sure dsi controller enabled again */ -} - static void dsi_hpd_worker(struct work_struct *work) { struct msm_dsi_host *msm_host = @@ -1520,7 +1514,7 @@ static void dsi_err_worker(struct work_struct *work) pr_err_ratelimited("%s: status=%x\n", __func__, status); if (status & DSI_ERR_STATE_MDP_FIFO_UNDERFLOW) - dsi_sw_reset_restore(msm_host); + dsi_sw_reset(msm_host); /* It is safe to clear here because error irq is disabled. */ msm_host->err_work_state = 0; -- 2.36.1

3 2

[PATCH] dt-bindings: msm: update maintainers list with proper id
by Kuogee Hsieh 15 Jun '22

15 Jun '22

Use quic id instead of codeaurora id in maintainers list for display devicetree bindings. Signed-off-by: Kuogee Hsieh <quic_khsieh(a)quicinc.com> --- Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index cd05cfd..c950710 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: MSM Display Port Controller maintainers: - - Kuogee Hsieh <khsieh(a)codeaurora.org> + - Kuogee Hsieh <quic_khsieh(a)quicinc.com> description: | Device tree bindings for DisplayPort host controller for MSM targets -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project

2 1

[v2] drm/msm: add null checks for drm device to avoid crash during probe defer
by Vinod Polimera 15 Jun '22

15 Jun '22

During probe defer, drm device is not initialized and an external trigger to shutdown is trying to clean up drm device leading to crash. Add checks to avoid drm device cleanup in such cases. BUG: unable to handle kernel NULL pointer dereference at virtual address 00000000000000b8 Call trace: drm_atomic_helper_shutdown+0x44/0x144 msm_pdev_shutdown+0x2c/0x38 platform_shutdown+0x2c/0x38 device_shutdown+0x158/0x210 kernel_restart_prepare+0x40/0x4c kernel_restart+0x20/0x6c __arm64_sys_reboot+0x194/0x23c invoke_syscall+0x50/0x13c el0_svc_common+0xa0/0x17c do_el0_svc_compat+0x28/0x34 el0_svc_compat+0x20/0x70 el0t_32_sync_handler+0xa8/0xcc el0t_32_sync+0x1a8/0x1ac Changes in v2: - Add fixes tag. Fixes: 623f279c778 ("drm/msm: fix shutdown hook in case GPU components failed to bind") Signed-off-by: Vinod Polimera <quic_vpolimer(a)quicinc.com> --- drivers/gpu/drm/msm/msm_drv.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c index 4448536..d62ac66 100644 --- a/drivers/gpu/drm/msm/msm_drv.c +++ b/drivers/gpu/drm/msm/msm_drv.c @@ -142,6 +142,9 @@ static void msm_irq_uninstall(struct drm_device *dev) struct msm_drm_private *priv = dev->dev_private; struct msm_kms *kms = priv->kms; + if (!irq_has_action(kms->irq)) + return; + kms->funcs->irq_uninstall(kms); if (kms->irq_requested) free_irq(kms->irq, dev); @@ -259,6 +262,7 @@ static int msm_drm_uninit(struct device *dev) ddev->dev_private = NULL; drm_dev_put(ddev); + priv->dev = NULL; destroy_workqueue(priv->wq); @@ -1167,7 +1171,7 @@ void msm_drv_shutdown(struct platform_device *pdev) struct msm_drm_private *priv = platform_get_drvdata(pdev); struct drm_device *drm = priv ? priv->dev : NULL; - if (!priv || !priv->kms) + if (!priv || !priv->kms || !drm) return; drm_atomic_helper_shutdown(drm); -- 2.7.4

2 4

[PATCH 0/3] drm: move dsc data pointer from drm_panel to mipi_dsi_device
by Dmitry Baryshkov 15 Jun '22

15 Jun '22

To properly support DSC the sink driver (panel) has to pass DSC pps data to the source (DSI host). The commit 0f40ba48de3b ("drm/msm/dsi: Pass DSC params to drm_panel") added a pointer to the DSC data to the struct drm_panel. However this is not the ideal solution. First, this leaves DSC-supporting DSI sink bridges (like ANX7625 which support DSC decoding on the MIPI DSI inputs). Second, this does not play well with the panel_bridge. Drivers depending solely on the bridge chains will still have to lookup panel and fetch data from it. Last, but not least, the DSC data is not relevant for the wide variety of panels including DPI and LVDS panels. To solve all these problems, move struct drm_dsc_config pointer from struct drm_panel to struct mipi_host_device. This way MIPI DSI host driver receives DSC data during attach callback without additional lookups. Dependencies: this depends on the MSM DRM DSC patchset [1] being pulled in through the MSM DRM tree. [1] https://patchwork.freedesktop.org/series/102262/ Dmitry Baryshkov (3): drm/mipi-dsi: pass DSC data through the struct mipi_dsi_device drm/msm/dsi: fetch DSC pps payload from struct mipi_dsi_device drm/panel: drop DSC pps pointer drivers/gpu/drm/msm/dsi/dsi_host.c | 25 +++++++++++-------------- include/drm/drm_mipi_dsi.h | 2 ++ include/drm/drm_panel.h | 7 ------- 3 files changed, 13 insertions(+), 21 deletions(-) -- 2.35.1

2 5

[PATCH] drm/msm/dp: make dp_bridge_mode_valid() more precise
by Dmitry Baryshkov 15 Jun '22

15 Jun '22

Make dp_connector_mode_valid() return precise MODE_CLOCK_HIGH rather than generic MODE_BAD in case the mode clock is higher than DP_MAX_PIXEL_CLK_KHZ (675 MHz). Reviewed-by: Kuogee Hsieh<quic_khsieh(a)quicinc.com> Reviewed-by: Stephen Boyd <swboyd(a)chromium.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov(a)linaro.org> --- drivers/gpu/drm/msm/dp/dp_display.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index bce77935394f..6ecdd81d0555 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -989,7 +989,7 @@ enum drm_mode_status dp_bridge_mode_valid(struct drm_bridge *bridge, return MODE_OK; if (mode->clock > DP_MAX_PIXEL_CLK_KHZ) - return MODE_BAD; + return MODE_CLOCK_HIGH; dp_display = container_of(dp, struct dp_display_private, dp_display); link_info = &dp_display->panel->link_info; -- 2.35.1

1 0

[PATCH] drm/bridge: cdns-dsi: Add support for J721E wrapper
by Rahul T R 15 Jun '22

15 Jun '22

Add support for wrapper settings for DSI bridge on j721e. Also set the DPI input to DPI0 Signed-off-by: Rahul T R <r-ravikumar(a)ti.com> --- drivers/gpu/drm/bridge/Kconfig | 10 ++++++++++ drivers/gpu/drm/bridge/cdns-dsi.c | 24 ++++++++++++++++++++++++ 2 files changed, 34 insertions(+) diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index 8ffd601e68f9..72c4c962d752 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -26,6 +26,16 @@ config DRM_CDNS_DSI Support Cadence DPI to DSI bridge. This is an internal bridge and is meant to be directly embedded in a SoC. +if DRM_CDNS_DSI + +config DRM_CDNS_DSI_J721E + bool "J721E Cadence DPI/DSI wrapper support" + default y + help + Support J721E Cadence DPI/DSI wrapper. This wrapper adds + support to select which DPI input to use for the bridge. +endif + config DRM_CHIPONE_ICN6211 tristate "Chipone ICN6211 MIPI-DSI/RGB Converter bridge" depends on OF diff --git a/drivers/gpu/drm/bridge/cdns-dsi.c b/drivers/gpu/drm/bridge/cdns-dsi.c index 20bece84ff8c..d6f99963b7e2 100644 --- a/drivers/gpu/drm/bridge/cdns-dsi.c +++ b/drivers/gpu/drm/bridge/cdns-dsi.c @@ -424,6 +424,16 @@ #define DSI_NULL_FRAME_OVERHEAD 6 #define DSI_EOT_PKT_SIZE 4 +#define DSI_WRAP_REVISION 0x0 +#define DSI_WRAP_DPI_CONTROL 0x4 +#define DSI_WRAP_DSC_CONTROL 0x8 +#define DSI_WRAP_DPI_SECURE 0xc +#define DSI_WRAP_DSI_0_ASF_STATUS 0x10 + +#define DSI_WRAP_DPI_0_EN BIT(0) +#define DSI_WRAP_DSI2_MUX_SEL BIT(4) + + struct cdns_dsi_output { struct mipi_dsi_device *dev; struct drm_panel *panel; @@ -453,6 +463,9 @@ struct cdns_dsi_input { struct cdns_dsi { struct mipi_dsi_host base; void __iomem *regs; +#ifdef CONFIG_DRM_CDNS_DSI_J721E + void __iomem *wrap_regs; +#endif struct cdns_dsi_input input; struct cdns_dsi_output output; unsigned int direct_cmd_fifo_depth; @@ -1212,6 +1225,12 @@ static int cdns_dsi_drm_probe(struct platform_device *pdev) if (IS_ERR(dsi->regs)) return PTR_ERR(dsi->regs); +#ifdef CONFIG_DRM_CDNS_DSI_J721E + dsi->wrap_regs = devm_platform_ioremap_resource(pdev, 1); + if (IS_ERR(dsi->wrap_regs)) + return PTR_ERR(dsi->wrap_regs); +#endif + dsi->dsi_p_clk = devm_clk_get(&pdev->dev, "dsi_p_clk"); if (IS_ERR(dsi->dsi_p_clk)) return PTR_ERR(dsi->dsi_p_clk); @@ -1244,6 +1263,11 @@ static int cdns_dsi_drm_probe(struct platform_device *pdev) goto err_disable_pclk; } +#ifdef CONFIG_DRM_CDNS_DSI_J721E + /* Select DPI0 as input */ + writel(DSI_WRAP_DPI_0_EN, dsi->wrap_regs + DSI_WRAP_DPI_CONTROL); +#endif + val = readl(dsi->regs + IP_CONF); dsi->direct_cmd_fifo_depth = 1 << (DIRCMD_FIFO_DEPTH(val) + 2); dsi->rx_fifo_depth = RX_FIFO_DEPTH(val); -- 2.36.1

1 0

[PATCH] drivers: tty: serial: Add missing of_node_put() in serial-tegra.c
by Liang He 15 Jun '22

15 Jun '22

In tegra_uart_init(), of_find_matching_node() will return a node pointer with refcount incremented. We should use of_node_put() when it is not used anymore. Signed-off-by: Liang He <windhl(a)126.com> --- drivers/tty/serial/serial-tegra.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/tty/serial/serial-tegra.c b/drivers/tty/serial/serial-tegra.c index d942ab152f5a..5c4850a3762c 100644 --- a/drivers/tty/serial/serial-tegra.c +++ b/drivers/tty/serial/serial-tegra.c @@ -1667,6 +1667,7 @@ static int __init tegra_uart_init(void) node = of_find_matching_node(NULL, tegra_uart_of_match); if (node) match = of_match_node(tegra_uart_of_match, node); + of_node_put(node); if (match) cdata = match->data; if (cdata) -- 2.25.1

1 0

[PATCH] drm/arm/hdlcd: Take over EFI framebuffer properly
by Robin Murphy 15 Jun '22

15 Jun '22

The Arm Juno board EDK2 port has provided an EFI GOP display via HDLCD0 for some time now, which works nicely as an early framebuffer. However, once the HDLCD driver probes and takes over the hardware, it should take over the logical framebuffer as well, otherwise the now-defunct GOP device hangs about and virtual console output inevitably disappears into the wrong place most of the time. Signed-off-by: Robin Murphy <robin.murphy(a)arm.com> --- drivers/gpu/drm/arm/hdlcd_drv.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/arm/hdlcd_drv.c b/drivers/gpu/drm/arm/hdlcd_drv.c index af59077a5481..a5d04884658b 100644 --- a/drivers/gpu/drm/arm/hdlcd_drv.c +++ b/drivers/gpu/drm/arm/hdlcd_drv.c @@ -331,6 +331,8 @@ static int hdlcd_drm_bind(struct device *dev) goto err_vblank; } + drm_fb_helper_remove_conflicting_framebuffers(NULL, "hdlcd", false); + drm_mode_config_reset(drm); drm_kms_helper_poll_init(drm); -- 2.36.1.dirty

4 9

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dri-devel June 2022