On 5/5/2022 6:50 AM, Dmitry Baryshkov wrote:
Struct mdp4_platform_config is a relict from the DT-conversion time. Move the max_clk field to the mdp4_kms_init(), the place where it is used and drop the struct mdp4_platform_config and the mdp4_get_config() function.
Signed-off-by: Dmitry Baryshkov dmitry.baryshkov@linaro.org
Reviewed-by: Abhinav Kumar quic_abhinavk@quicinc.com
drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 21 ++++++--------------- drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h | 5 ----- 2 files changed, 6 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c index 1fba6ab06eb1..ccde710c63fa 100644 --- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c +++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c @@ -13,8 +13,6 @@ #include "msm_mmu.h" #include "mdp4_kms.h"
-static struct mdp4_platform_config *mdp4_get_config(struct platform_device *dev);
- static int mdp4_hw_init(struct msm_kms *kms) { struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
@@ -384,7 +382,6 @@ static void read_mdp_hw_revision(struct mdp4_kms *mdp4_kms, static int mdp4_kms_init(struct drm_device *dev) { struct platform_device *pdev = to_platform_device(dev->dev);
- struct mdp4_platform_config *config = mdp4_get_config(pdev); struct msm_drm_private *priv = dev->dev_private; struct mdp4_kms *mdp4_kms; struct msm_kms *kms = NULL;
@@ -392,6 +389,10 @@ static int mdp4_kms_init(struct drm_device *dev) struct msm_gem_address_space *aspace; int irq, ret; u32 major, minor;
unsigned long max_clk;
/* TODO: Chips that aren't apq8064 have a 200 Mhz max_clk */
max_clk = 266667000;
mdp4_kms = kzalloc(sizeof(*mdp4_kms), GFP_KERNEL); if (!mdp4_kms) {
@@ -459,7 +460,7 @@ static int mdp4_kms_init(struct drm_device *dev) goto fail; }
- clk_set_rate(mdp4_kms->clk, config->max_clk);
clk_set_rate(mdp4_kms->clk, max_clk);
read_mdp_hw_revision(mdp4_kms, &major, &minor);
@@ -479,7 +480,7 @@ static int mdp4_kms_init(struct drm_device *dev) ret = PTR_ERR(mdp4_kms->lut_clk); goto fail; }
clk_set_rate(mdp4_kms->lut_clk, config->max_clk);
clk_set_rate(mdp4_kms->lut_clk, max_clk);}
pm_runtime_enable(dev->dev);
@@ -552,16 +553,6 @@ static int mdp4_kms_init(struct drm_device *dev) return ret; }
-static struct mdp4_platform_config *mdp4_get_config(struct platform_device *dev) -{
- static struct mdp4_platform_config config = {};
- /* TODO: Chips that aren't apq8064 have a 200 Mhz max_clk */
- config.max_clk = 266667000;
- return &config;
-}
- static const struct dev_pm_ops mdp4_pm_ops = { .prepare = msm_pm_prepare, .complete = msm_pm_complete,
diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h index 7cc549b6a82b..01179e764a29 100644 --- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h +++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h @@ -42,11 +42,6 @@ struct mdp4_kms { }; #define to_mdp4_kms(x) container_of(x, struct mdp4_kms, base)
-/* platform config data (ie. from DT, or pdata) */ -struct mdp4_platform_config {
- uint32_t max_clk;
-};
- static inline void mdp4_write(struct mdp4_kms *mdp4_kms, u32 reg, u32 data) { msm_writel(data, mdp4_kms->mmio + reg);