From: Arnd Bergmann arnd@arndb.de
gcc points out an invalid bit shift operation on 32-bit architectures with 64-bit dma_addr_t:
drivers/gpu/drm/tegra/hub.c: In function 'tegra_shared_plane_atomic_update': include/vdso/bits.h:7:40: error: left shift count >= width of type [-Werror=shift-count-overflow] 7 | #define BIT(nr) (UL(1) << (nr)) | ^~ drivers/gpu/drm/tegra/hub.c:513:25: note: in expansion of macro 'BIT' 513 | base |= BIT(39); | ^~~
Use the correct BIT_ULL() macro to always generate a 64-bit mask. Fixes: 7b6f846785f4 ("drm/tegra: Support sector layout on Tegra194") Signed-off-by: Arnd Bergmann arnd@arndb.de --- drivers/gpu/drm/tegra/hub.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/tegra/hub.c b/drivers/gpu/drm/tegra/hub.c index 79bff8b48271..bfae8a02f55b 100644 --- a/drivers/gpu/drm/tegra/hub.c +++ b/drivers/gpu/drm/tegra/hub.c @@ -510,7 +510,7 @@ static void tegra_shared_plane_atomic_update(struct drm_plane *plane, * dGPU sector layout. */ if (tegra_plane_state->tiling.sector_layout == TEGRA_BO_SECTOR_LAYOUT_GPU) - base |= BIT(39); + base |= BIT_ULL(39); #endif
tegra_plane_writel(p, tegra_plane_state->format, DC_WIN_COLOR_DEPTH);