On Mon, 2021-12-06 at 12:26 -0500, Zack Rusin wrote:
From: Zack Rusin zackr@vmware.com
If the host supports SVGA3D_DEVCAP_GL43, we can handle 64 instead of just 8 UAVs. Based on a patch from Roland Scheidegger sroland@vmware.com.
Signed-off-by: Roland Scheidegger sroland@vmware.com Signed-off-by: Zack Rusin zackr@vmware.com
drivers/gpu/drm/vmwgfx/vmwgfx_binding.c | 4 ++-- drivers/gpu/drm/vmwgfx/vmwgfx_binding.h | 2 +- drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 6 +++++- drivers/gpu/drm/vmwgfx/vmwgfx_drv.h | 20 ++++++++++++++++++++ drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c | 4 ++-- 5 files changed, 30 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_binding.c b/drivers/gpu/drm/vmwgfx/vmwgfx_binding.c index fc8cc222ec51..9aa69ba85670 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_binding.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_binding.c @@ -1070,7 +1070,7 @@ static int vmw_emit_set_uav(struct vmw_ctx_binding_state *cbs) size_t cmd_size, view_id_size; const struct vmw_resource *ctx = vmw_cbs_context(cbs);
- vmw_collect_view_ids(cbs, loc, SVGA3D_MAX_UAVIEWS);
- vmw_collect_view_ids(cbs, loc, vmw_max_num_uavs(cbs->dev_priv)); view_id_size = cbs->bind_cmd_count*sizeof(uint32); cmd_size = sizeof(*cmd) + view_id_size; cmd = VMW_CMD_CTX_RESERVE(ctx->dev_priv, cmd_size, ctx->id);
@@ -1100,7 +1100,7 @@ static int vmw_emit_set_cs_uav(struct vmw_ctx_binding_state *cbs) size_t cmd_size, view_id_size; const struct vmw_resource *ctx = vmw_cbs_context(cbs);
- vmw_collect_view_ids(cbs, loc, SVGA3D_MAX_UAVIEWS);
- vmw_collect_view_ids(cbs, loc, vmw_max_num_uavs(cbs->dev_priv)); view_id_size = cbs->bind_cmd_count*sizeof(uint32); cmd_size = sizeof(*cmd) + view_id_size; cmd = VMW_CMD_CTX_RESERVE(ctx->dev_priv, cmd_size, ctx->id);
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_binding.h b/drivers/gpu/drm/vmwgfx/vmwgfx_binding.h index dcb71fd0bb3b..6b1b234d12a1 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_binding.h +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_binding.h @@ -200,7 +200,7 @@ struct vmw_dx_shader_bindings {
- @splice_index: The device splice index set by user-space.
*/ struct vmw_ctx_bindinfo_uav {
- struct vmw_ctx_bindinfo_view views[SVGA3D_MAX_UAVIEWS];
- struct vmw_ctx_bindinfo_view views[SVGA3D_DX11_1_MAX_UAVIEWS]; uint32 index;
};
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c index 71b6b1219ce1..2d59bdad0373 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c @@ -364,6 +364,7 @@ static void vmw_print_sm_type(struct vmw_private *dev_priv) [VMW_SM_4] = "SM4", [VMW_SM_4_1] = "SM4_1", [VMW_SM_5] = "SM_5",
[VMW_SM_5_1X] = "SM_5_1X",@@ -1083,8 +1084,11 @@ static int vmw_driver_load(struct vmw_private *dev_priv, u32 pci_id) dev_priv->sm_type = VMW_SM_4_1; if (has_sm4_1_context(dev_priv) && (dev_priv->capabilities2 & SVGA_CAP2_DX3)) {
if (vmw_devcap_get(dev_priv, SVGA3D_DEVCAP_SM5))
if (vmw_devcap_get(dev_priv, SVGA3D_DEVCAP_SM5)) { dev_priv->sm_type = VMW_SM_5;if (vmw_devcap_get(dev_priv, SVGA3D_DEVCAP_GL43))dev_priv->sm_type = VMW_SM_5_1X;}diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h index daa4501d17ec..21dd69e5cdfb 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h @@ -488,6 +488,7 @@ enum {
- @VMW_SM_4: Context support upto SM4.
- @VMW_SM_4_1: Context support upto SM4_1.
- @VMW_SM_5: Context support up to SM5.
*/
- @VMW_SM_5_1X: Adds support for sm5_1 and gl43 extensions.
- @VMW_SM_MAX: Should be the last.
enum vmw_sm_type { @@ -495,6 +496,7 @@ enum vmw_sm_type { VMW_SM_4, VMW_SM_4_1, VMW_SM_5,
- VMW_SM_5_1X, VMW_SM_MAX
};
@@ -755,6 +757,24 @@ static inline bool has_sm5_context(const struct vmw_private *dev_priv) return (dev_priv->sm_type >= VMW_SM_5); }
+/**
- has_gl43_context - Does the device support GL43 context.
- @dev_priv: Device private.
- Return: Bool value if device support SM5 context or not.
- */
+static inline bool has_gl43_context(const struct vmw_private *dev_priv) +{
- return (dev_priv->sm_type >= VMW_SM_5_1X);
+}
+static inline u32 vmw_max_num_uavs(struct vmw_private *dev_priv) +{
- return (has_gl43_context(dev_priv) ?
SVGA3D_DX11_1_MAX_UAVIEWS : SVGA3D_MAX_UAVIEWS);+}
extern void vmw_svga_enable(struct vmw_private *dev_priv); extern void vmw_svga_disable(struct vmw_private *dev_priv);
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c index f3a11428ba90..fd204fe2c68f 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c @@ -2916,7 +2916,7 @@ static int vmw_cmd_set_uav(struct vmw_private *dev_priv, if (!has_sm5_context(dev_priv)) return -EINVAL;
- if (num_uav > SVGA3D_MAX_UAVIEWS) {
- if (num_uav > vmw_max_num_uavs(dev_priv)) { VMW_DEBUG_USER("Invalid UAV binding.\n"); return -EINVAL; }
@@ -2948,7 +2948,7 @@ static int vmw_cmd_set_cs_uav(struct vmw_private *dev_priv, if (!has_sm5_context(dev_priv)) return -EINVAL;
- if (num_uav > SVGA3D_MAX_UAVIEWS) {
- if (num_uav > vmw_max_num_uavs(dev_priv)) { VMW_DEBUG_USER("Invalid UAV binding.\n"); return -EINVAL; }
Reviewed-by: Martin Krastev krastevm@vmware.com