On Mon, Jan 11, 2021 at 3:44 PM Yongqiang Niu yongqiang.niu@mediatek.com wrote:

This patch add component POSTMASK,

Signed-off-by: Yongqiang Niu yongqiang.niu@mediatek.com

drivers/gpu/drm/mediatek/Makefile | 1 + drivers/gpu/drm/mediatek/mtk_disp_postmask.c | 160 +++++++++++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 + drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 + drivers/gpu/drm/mediatek/mtk_drm_drv.c | 4 +- drivers/gpu/drm/mediatek/mtk_drm_drv.h | 1 + 6 files changed, 168 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_postmask.c

diff --git a/drivers/gpu/drm/mediatek/Makefile b/drivers/gpu/drm/mediatek/Makefile index 17a08e2..ce5ad59 100644 --- a/drivers/gpu/drm/mediatek/Makefile +++ b/drivers/gpu/drm/mediatek/Makefile @@ -3,6 +3,7 @@ mediatek-drm-y := mtk_disp_color.o \ mtk_disp_gamma.o \ mtk_disp_ovl.o \

•             mtk_disp_postmask.o \
              mtk_disp_rdma.o \
              mtk_drm_crtc.o \
              mtk_drm_ddp.o \
  

diff --git a/drivers/gpu/drm/mediatek/mtk_disp_postmask.c b/drivers/gpu/drm/mediatek/mtk_disp_postmask.c new file mode 100644 index 0000000..736224c --- /dev/null +++ b/drivers/gpu/drm/mediatek/mtk_disp_postmask.c @@ -0,0 +1,160 @@ +/*

• • SPDX-License-Identifier:
• • Copyright (c) 2020 MediaTek Inc.
• */

+#include <linux/clk.h> +#include <linux/component.h> +#include <linux/module.h> +#include <linux/of_device.h> +#include <linux/pm_runtime.h> +#include <linux/of_irq.h> +#include <linux/platform_device.h> +#include <linux/soc/mediatek/mtk-cmdq.h>

+#include "mtk_drm_crtc.h" +#include "mtk_drm_ddp_comp.h"

+#define DISP_POSTMASK_EN 0x0000 +#define POSTMASK_EN BIT(0) +#define DISP_POSTMASK_CFG 0x0020 +#define POSTMASK_RELAY_MODE BIT(0) +#define DISP_POSTMASK_SIZE 0x0030

+struct mtk_disp_postmask_data {

•   u32 reserved;
  

+};

Will there be more data and config for different soc in the future? If not, it can be put in mtk_drm_ddp_comp.c and use struct mtk_ddp_comp_dev, like ddp_dither or ddp_aal.

+/**

• • struct mtk_disp_postmask - DISP_postmask driver structure
• • @ddp_comp - structure containing type enum and hardware resources
• • @crtc - associated crtc to report irq events to
• */

+struct mtk_disp_postmask {

•   struct mtk_ddp_comp                     ddp_comp;
  

•   const struct mtk_disp_postmask_data     *data;
  

+};

+static inline struct mtk_disp_postmask *comp_to_postmask(struct mtk_ddp_comp *comp) +{

•   return container_of(comp, struct mtk_disp_postmask, ddp_comp);
  

+}

+static void mtk_postmask_config(struct mtk_ddp_comp *comp, unsigned int w,

•                         unsigned int h, unsigned int vrefresh,
  

•                         unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
  

+{

•   mtk_ddp_write(cmdq_pkt, w << 16 | h, comp, DISP_POSTMASK_SIZE);
  

•   mtk_ddp_write(cmdq_pkt, POSTMASK_RELAY_MODE, comp, DISP_POSTMASK_CFG);
  

+}

+static void mtk_postmask_start(struct mtk_ddp_comp *comp) +{

•   writel(POSTMASK_EN, comp->regs + DISP_POSTMASK_EN);
  

+}

+static void mtk_postmask_stop(struct mtk_ddp_comp *comp) +{

•   writel_relaxed(0x0, comp->regs + DISP_POSTMASK_EN);
  

+}

+static const struct mtk_ddp_comp_funcs mtk_disp_postmask_funcs = {

•   .config = mtk_postmask_config,
  

•   .start = mtk_postmask_start,
  

•   .stop = mtk_postmask_stop,
  

+};

+static int mtk_disp_postmask_bind(struct device *dev, struct device *master, void *data) +{

•   struct mtk_disp_postmask *priv = dev_get_drvdata(dev);
  

•   struct drm_device *drm_dev = data;
  

•   int ret;
  

•   ret = mtk_ddp_comp_register(drm_dev, &priv->ddp_comp);
  

•   if (ret < 0) {
  

•           dev_err(dev, "Failed to register component %pOF: %d\n",
  

•                   dev->of_node, ret);
  

•           return ret;
  

•   }
  

•   return 0;
  

+}

+static void mtk_disp_postmask_unbind(struct device *dev, struct device *master,

•                             void *data)
  

+{

•   struct mtk_disp_postmask *priv = dev_get_drvdata(dev);
  

•   struct drm_device *drm_dev = data;
  

•   mtk_ddp_comp_unregister(drm_dev, &priv->ddp_comp);
  

+}

+static const struct component_ops mtk_disp_postmask_component_ops = {

•   .bind   = mtk_disp_postmask_bind,
  

•   .unbind = mtk_disp_postmask_unbind,
  

+};

+static int mtk_disp_postmask_probe(struct platform_device *pdev) +{

•   struct device *dev = &pdev->dev;
  

•   struct mtk_disp_postmask *priv;
  

•   int comp_id;
  

•   int ret;
  

•   priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  

•   if (!priv)
  

•           return -ENOMEM;
  

•   comp_id = mtk_ddp_comp_get_id(dev->of_node, MTK_DISP_POSTMASK);
  

•   if (comp_id < 0) {
  

•           dev_err(dev, "Failed to identify by alias: %d\n", comp_id);
  

•           return comp_id;
  

•   }
  

•   ret = mtk_ddp_comp_init(dev, dev->of_node, &priv->ddp_comp, comp_id,
  

•                           &mtk_disp_postmask_funcs);
  

•   if (ret) {
  

•           if (ret != -EPROBE_DEFER)
  

•                   dev_err(dev, "Failed to initialize component: %d\n",
  

•                           ret);
  

•           return ret;
  

•   }
  

•   priv->data = of_device_get_match_data(dev);
  

•   platform_set_drvdata(pdev, priv);
  

•   pm_runtime_enable(dev);
  

•   ret = component_add(dev, &mtk_disp_postmask_component_ops);
  

•   if (ret)
  

•           dev_err(dev, "Failed to add component: %d\n", ret);
  

•   return ret;
  

+}

+static int mtk_disp_postmask_remove(struct platform_device *pdev) +{

•   pm_runtime_disable(&pdev->dev);
  

•   component_del(&pdev->dev, &mtk_disp_postmask_component_ops);
  

•   return 0;
  

+}

+static const struct of_device_id mtk_disp_postmask_driver_dt_match[] = {

•   {},
  

+}; +MODULE_DEVICE_TABLE(of, mtk_disp_postmask_driver_dt_match);

+struct platform_driver mtk_disp_postmask_driver = {

•   .probe          = mtk_disp_postmask_probe,
  

•   .remove         = mtk_disp_postmask_remove,
  

•   .driver         = {
  

•           .name   = "mediatek-disp-postmask",
  

•           .owner  = THIS_MODULE,
  

•           .of_match_table = mtk_disp_postmask_driver_dt_match,
  

•   },
  

+}; diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c index a715127..bc6b10a 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c @@ -354,6 +354,7 @@ static void mtk_dither_stop(struct mtk_ddp_comp *comp) [MTK_DISP_MUTEX] = "mutex", [MTK_DISP_OD] = "od", [MTK_DISP_BLS] = "bls",

•   [MTK_DISP_POSTMASK] = "postmask",
  

};

struct mtk_ddp_comp_match { @@ -384,6 +385,7 @@ struct mtk_ddp_comp_match { [DDP_COMPONENT_OVL_2L0] = { MTK_DISP_OVL_2L, 0, NULL }, [DDP_COMPONENT_OVL_2L1] = { MTK_DISP_OVL_2L, 1, NULL }, [DDP_COMPONENT_OVL_2L2] = { MTK_DISP_OVL_2L, 2, NULL },

•   [DDP_COMPONENT_POSTMASK0]       = { MTK_DISP_POSTMASK,  0, NULL },
    [DDP_COMPONENT_PWM0]    = { MTK_DISP_PWM,       0, NULL },
    [DDP_COMPONENT_PWM1]    = { MTK_DISP_PWM,       1, NULL },
    [DDP_COMPONENT_PWM2]    = { MTK_DISP_PWM,       2, NULL },
  

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h index 178fae9..0b23b5c 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h @@ -29,6 +29,7 @@ enum mtk_ddp_comp_type { MTK_DISP_UFOE, MTK_DSI, MTK_DPI,

•   MTK_DISP_POSTMASK,
    MTK_DISP_PWM,
    MTK_DISP_MUTEX,
    MTK_DISP_OD,
  

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c index b6e963e..bc205e9 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c @@ -533,7 +533,7 @@ static int mtk_drm_probe(struct platform_device *pdev) private->comp_node[comp_id] = of_node_get(node);

            /*

•            * Currently only the COLOR, GAMMA, OVL, RDMA, DSI, and DPI blocks have
  

•            * Currently only the COLOR, GAMMA, OVL, POSTMASK, RDMA, DSI, and DPI blocks have
             * separate component platform drivers and initialize their own
             * DDP component structure. The others are initialized here.
             */
  

@@ -541,6 +541,7 @@ static int mtk_drm_probe(struct platform_device *pdev) comp_type == MTK_DISP_GAMMA || comp_type == MTK_DISP_OVL || comp_type == MTK_DISP_OVL_2L ||

•               comp_type == MTK_DISP_POSTMASK ||
                comp_type == MTK_DISP_RDMA ||
                comp_type == MTK_DSI ||
                comp_type == MTK_DPI) {
  

@@ -654,6 +655,7 @@ static SIMPLE_DEV_PM_OPS(mtk_drm_pm_ops, mtk_drm_sys_suspend, &mtk_disp_color_driver, &mtk_disp_gamma_driver, &mtk_disp_ovl_driver,

•   &mtk_disp_postmask_driver,
    &mtk_disp_rdma_driver,
    &mtk_dpi_driver,
    &mtk_drm_platform_driver,
  

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h b/drivers/gpu/drm/mediatek/mtk_drm_drv.h index bbd362b..8a9544b 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.h +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.h @@ -50,6 +50,7 @@ struct mtk_drm_private { extern struct platform_driver mtk_disp_color_driver; extern struct platform_driver mtk_disp_gamma_driver; extern struct platform_driver mtk_disp_ovl_driver; +extern struct platform_driver mtk_disp_postmask_driver; extern struct platform_driver mtk_disp_rdma_driver; extern struct platform_driver mtk_dpi_driver; extern struct platform_driver mtk_dsi_driver; -- 1.8.1.1.dirty

Hi, Yongqiang:

Yongqiang Niu yongqiang.niu@mediatek.com 於 2021年1月11日 週一 下午3:44寫道：

This patch add component RDMA4

Reviewed-by: Chun-Kuang Hu chunkuang.hu@kernel.org

Signed-off-by: Yongqiang Niu yongqiang.niu@mediatek.com

drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 + 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c index bc6b10a..fc01fea 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c @@ -392,6 +392,7 @@ struct mtk_ddp_comp_match { [DDP_COMPONENT_RDMA0] = { MTK_DISP_RDMA, 0, NULL }, [DDP_COMPONENT_RDMA1] = { MTK_DISP_RDMA, 1, NULL }, [DDP_COMPONENT_RDMA2] = { MTK_DISP_RDMA, 2, NULL },

•   [DDP_COMPONENT_RDMA4]   = { MTK_DISP_RDMA,      4, NULL },
    [DDP_COMPONENT_UFOE]    = { MTK_DISP_UFOE,      0, &ddp_ufoe },
    [DDP_COMPONENT_WDMA0]   = { MTK_DISP_WDMA,      0, NULL },
    [DDP_COMPONENT_WDMA1]   = { MTK_DISP_WDMA,      1, NULL },
  

-- 1.8.1.1.dirty _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek

Hi, Yongqiang:

Yongqiang Niu yongqiang.niu@mediatek.com 於 2021年1月11日 週一 下午3:44寫道：

enable OVL_LAYER_SMI_ID_EN for multi-layer usecase

Could you describe more information? Without this patch, what would happen?

Signed-off-by: Yongqiang Niu yongqiang.niu@mediatek.com

drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c index b47c238..4934bee 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c @@ -23,6 +23,7 @@ #define DISP_REG_OVL_RST 0x0014 #define DISP_REG_OVL_ROI_SIZE 0x0020 #define DISP_REG_OVL_DATAPATH_CON 0x0024 +#define OVL_LAYER_SMI_ID_EN BIT(0) #define OVL_BGCLR_SEL_IN BIT(2) #define DISP_REG_OVL_ROI_BGCLR 0x0028 #define DISP_REG_OVL_SRC_CON 0x002c @@ -61,6 +62,7 @@ struct mtk_disp_ovl_data { unsigned int gmc_bits; unsigned int layer_nr; bool fmt_rgb565_is_0;

•   bool smi_id_en;
  

};

/** @@ -116,7 +118,17 @@ static void mtk_ovl_disable_vblank(struct mtk_ddp_comp *comp)

static void mtk_ovl_start(struct mtk_ddp_comp *comp) {

•   struct mtk_disp_ovl *ovl = comp_to_ovl(comp);
  

•   writel_relaxed(0x1, comp->regs + DISP_REG_OVL_EN);
  

•   if(ovl->data->smi_id_en) {
  

•           unsigned int reg;
  

•           reg = readl(comp->regs + DISP_REG_OVL_DATAPATH_CON);
  

•           reg = reg | OVL_LAYER_SMI_ID_EN;
  

•           writel_relaxed(reg, comp->regs + DISP_REG_OVL_DATAPATH_CON);
  

I think this setting should before write 1 to DISP_REG_OVL_EN.

•   }
  

}

static void mtk_ovl_stop(struct mtk_ddp_comp *comp)

Should clear DISP_REG_OVL_DATAPATH_CON when stop?

Regards, Chun-Kuang.

-- 1.8.1.1.dirty _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek

Hi, Yongqiang:

Yongqiang Niu yongqiang.niu@mediatek.com 於 2021年1月11日 週一 下午3:48寫道：

the orginal setting is not correct, fix it follow hardware data sheet. if keep this error setting, mt8173/mt8183 display ok but mt8192 display abnormal.

Applied to mediatek-drm-next [1], thanks.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?...

Regards, Chun-Kuang.

Fixes: 0664d1392c26 (drm/mediatek: Add AAL engine basic function)

Signed-off-by: Yongqiang Niu yongqiang.niu@mediatek.com

drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c index fc01fea..6081800 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c @@ -174,7 +174,7 @@ static void mtk_aal_config(struct mtk_ddp_comp *comp, unsigned int w, unsigned int h, unsigned int vrefresh, unsigned int bpc, struct cmdq_pkt *cmdq_pkt) {

•   mtk_ddp_write(cmdq_pkt, h << 16 | w, comp, DISP_AAL_SIZE);
  

•   mtk_ddp_write(cmdq_pkt, w << 16 | h, comp, DISP_AAL_SIZE);
  

}

static void mtk_aal_start(struct mtk_ddp_comp *comp)

1.8.1.1.dirty _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek

Hi, Yongqiang:

Yongqiang Niu yongqiang.niu@mediatek.com 於 2021年1月11日 週一 下午3:54寫道：

ccorr ctm matrix bits will be different in mt8192

This patch has conflicts with the series "Decouple Mediatek DRM sub driver" [1] which has been applied to mediatek-drm-next, so please rebase this patch onto mediatek-drm-next.

[1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=399915

Regards, Chun-Kuang.

Signed-off-by: Yongqiang Niu yongqiang.niu@mediatek.com

drivers/gpu/drm/mediatek/Makefile | 3 +- drivers/gpu/drm/mediatek/mtk_disp_ccorr.c | 222 ++++++++++++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 92 +----------- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 8 +- drivers/gpu/drm/mediatek/mtk_drm_drv.h | 1 + 5 files changed, 231 insertions(+), 95 deletions(-) create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_ccorr.c

diff --git a/drivers/gpu/drm/mediatek/Makefile b/drivers/gpu/drm/mediatek/Makefile index ce5ad59..a02f534 100644 --- a/drivers/gpu/drm/mediatek/Makefile +++ b/drivers/gpu/drm/mediatek/Makefile @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0

-mediatek-drm-y := mtk_disp_color.o \ +mediatek-drm-y := mtk_disp_ccorr.o \

•             mtk_disp_color.o \
              mtk_disp_gamma.o \
              mtk_disp_ovl.o \
              mtk_disp_postmask.o \
  

diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c new file mode 100644 index 0000000..63b3ef6 --- /dev/null +++ b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c @@ -0,0 +1,222 @@ +/*

• • SPDX-License-Identifier:
• • Copyright (c) 2020 MediaTek Inc.
• */

+#include <linux/clk.h> +#include <linux/component.h> +#include <linux/module.h> +#include <linux/of_device.h> +#include <linux/of_irq.h> +#include <linux/platform_device.h> +#include <linux/pm_runtime.h> +#include <linux/soc/mediatek/mtk-cmdq.h>

+#include "mtk_drm_crtc.h" +#include "mtk_drm_ddp_comp.h"

+#define DISP_CCORR_EN 0x0000 +#define CCORR_EN BIT(0) +#define DISP_CCORR_CFG 0x0020 +#define CCORR_RELAY_MODE BIT(0) +#define CCORR_ENGINE_EN BIT(1) +#define CCORR_GAMMA_OFF BIT(2) +#define CCORR_WGAMUT_SRC_CLIP BIT(3) +#define DISP_CCORR_SIZE 0x0030 +#define DISP_CCORR_COEF_0 0x0080 +#define DISP_CCORR_COEF_1 0x0084 +#define DISP_CCORR_COEF_2 0x0088 +#define DISP_CCORR_COEF_3 0x008C +#define DISP_CCORR_COEF_4 0x0090

+struct mtk_disp_ccorr_data {

•   u32 reserved;
  

+};

+/**

• • struct mtk_disp_ccorr - DISP_CCORR driver structure
• • @ddp_comp - structure containing type enum and hardware resources
• • @crtc - associated crtc to report irq events to
• */

+struct mtk_disp_ccorr {

•   struct mtk_ddp_comp                     ddp_comp;
  

•   const struct mtk_disp_ccorr_data        *data;
  

+};

+static inline struct mtk_disp_ccorr *comp_to_ccorr(struct mtk_ddp_comp *comp) +{

•   return container_of(comp, struct mtk_disp_ccorr, ddp_comp);
  

+}

+static void mtk_ccorr_config(struct mtk_ddp_comp *comp, unsigned int w,

•                        unsigned int h, unsigned int vrefresh,
  

•                        unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
  

+{

•   mtk_ddp_write(cmdq_pkt, w << 16 | h, comp, DISP_CCORR_SIZE);
  

•   mtk_ddp_write(cmdq_pkt, CCORR_ENGINE_EN, comp, DISP_CCORR_CFG);
  

+}

+static void mtk_ccorr_start(struct mtk_ddp_comp *comp) +{

•   writel(CCORR_EN, comp->regs + DISP_CCORR_EN);
  

+}

+static void mtk_ccorr_stop(struct mtk_ddp_comp *comp) +{

•   writel_relaxed(0x0, comp->regs + DISP_CCORR_EN);
  

+}

+/* Converts a DRM S31.32 value to the HW S1.10 format. */ +static u16 mtk_ctm_s31_32_to_s1_10(u64 in) +{

•   u16 r;
  

•   /* Sign bit. */
  

•   r = in & BIT_ULL(63) ? BIT(11) : 0;
  

•   if ((in & GENMASK_ULL(62, 33)) > 0) {
  

•           /* identity value 0x100000000 -> 0x400, */
  

•           /* if bigger this, set it to max 0x7ff. */
  

•           r |= GENMASK(10, 0);
  

•   } else {
  

•           /* take the 11 most important bits. */
  

•           r |= (in >> 22) & GENMASK(10, 0);
  

•   }
  

•   return r;
  

+}

+static void mtk_ccorr_ctm_set(struct mtk_ddp_comp *comp,

•                         struct drm_crtc_state *state)
  

+{

•   struct drm_property_blob *blob = state->ctm;
  

•   struct drm_color_ctm *ctm;
  

•   const u64 *input;
  

•   uint16_t coeffs[9] = { 0 };
  

•   int i;
  

•   struct cmdq_pkt *cmdq_pkt = NULL;
  

•   if (!blob)
  

•           return;
  

•   ctm = (struct drm_color_ctm *)blob->data;
  

•   input = ctm->matrix;
  

•   for (i = 0; i < ARRAY_SIZE(coeffs); i++)
  

•           coeffs[i] = mtk_ctm_s31_32_to_s1_10(input[i]);
  

•   mtk_ddp_write(cmdq_pkt, coeffs[0] << 16 | coeffs[1],
  

•                 comp, DISP_CCORR_COEF_0);
  

•   mtk_ddp_write(cmdq_pkt, coeffs[2] << 16 | coeffs[3],
  

•                 comp, DISP_CCORR_COEF_1);
  

•   mtk_ddp_write(cmdq_pkt, coeffs[4] << 16 | coeffs[5],
  

•                 comp, DISP_CCORR_COEF_2);
  

•   mtk_ddp_write(cmdq_pkt, coeffs[6] << 16 | coeffs[7],
  

•                 comp, DISP_CCORR_COEF_3);
  

•   mtk_ddp_write(cmdq_pkt, coeffs[8] << 16,
  

•                 comp, DISP_CCORR_COEF_4);
  

+}

+static const struct mtk_ddp_comp_funcs mtk_disp_ccorr_funcs = {

•   .config = mtk_ccorr_config,
  

•   .start = mtk_ccorr_start,
  

•   .stop = mtk_ccorr_stop,
  

•   .ctm_set = mtk_ccorr_ctm_set,
  

+};

+static int mtk_disp_ccorr_bind(struct device *dev, struct device *master,

•                          void *data)
  

+{

•   struct mtk_disp_ccorr *priv = dev_get_drvdata(dev);
  

•   struct drm_device *drm_dev = data;
  

•   int ret;
  

•   ret = mtk_ddp_comp_register(drm_dev, &priv->ddp_comp);
  

•   if (ret < 0) {
  

•           dev_err(dev, "Failed to register component %pOF: %d\n",
  

•                   dev->of_node, ret);
  

•           return ret;
  

•   }
  

•   return 0;
  

+}

+static void mtk_disp_ccorr_unbind(struct device *dev, struct device *master,

•                             void *data)
  

+{

•   struct mtk_disp_ccorr *priv = dev_get_drvdata(dev);
  

•   struct drm_device *drm_dev = data;
  

•   mtk_ddp_comp_unregister(drm_dev, &priv->ddp_comp);
  

+}

+static const struct component_ops mtk_disp_ccorr_component_ops = {

•   .bind   = mtk_disp_ccorr_bind,
  

•   .unbind = mtk_disp_ccorr_unbind,
  

+};

+static int mtk_disp_ccorr_probe(struct platform_device *pdev) +{

•   struct device *dev = &pdev->dev;
  

•   struct mtk_disp_ccorr *priv;
  

•   int comp_id;
  

•   int ret;
  

•   priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  

•   if (!priv)
  

•           return -ENOMEM;
  

•   comp_id = mtk_ddp_comp_get_id(dev->of_node, MTK_DISP_CCORR);
  

•   if (comp_id < 0) {
  

•           dev_err(dev, "Failed to identify by alias: %d\n", comp_id);
  

•           return comp_id;
  

•   }
  

•   ret = mtk_ddp_comp_init(dev, dev->of_node, &priv->ddp_comp, comp_id,
  

•                           &mtk_disp_ccorr_funcs);
  

•   if (ret) {
  

•           if (ret != -EPROBE_DEFER)
  

•                   dev_err(dev, "Failed to initialize component: %d\n",
  

•                           ret);
  

•           return ret;
  

•   }
  

•   priv->data = of_device_get_match_data(dev);
  

•   platform_set_drvdata(pdev, priv);
  

•   pm_runtime_enable(dev);
  

•   ret = component_add(dev, &mtk_disp_ccorr_component_ops);
  

•   if (ret)
  

•           dev_err(dev, "Failed to add component: %d\n", ret);
  

•   return ret;
  

+}

+static int mtk_disp_ccorr_remove(struct platform_device *pdev) +{

•   pm_runtime_disable(&pdev->dev);
  

•   component_del(&pdev->dev, &mtk_disp_ccorr_component_ops);
  

•   return 0;
  

+}

+static const struct of_device_id mtk_disp_ccorr_driver_dt_match[] = {

•   { .compatible = "mediatek,mt8183-disp-ccorr"},
  

•   {},
  

+}; +MODULE_DEVICE_TABLE(of, mtk_disp_ccorr_driver_dt_match);

+struct platform_driver mtk_disp_ccorr_driver = {

•   .probe          = mtk_disp_ccorr_probe,
  

•   .remove         = mtk_disp_ccorr_remove,
  

•   .driver         = {
  

•           .name   = "mediatek-disp-ccorr",
  

•           .owner  = THIS_MODULE,
  

•           .of_match_table = mtk_disp_ccorr_driver_dt_match,
  

•   },
  

+}; diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c index 6081800..bb7893d 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c @@ -35,20 +35,6 @@ #define DISP_AAL_EN 0x0000 #define DISP_AAL_SIZE 0x0030

-#define DISP_CCORR_EN 0x0000 -#define CCORR_EN BIT(0) -#define DISP_CCORR_CFG 0x0020 -#define CCORR_RELAY_MODE BIT(0) -#define CCORR_ENGINE_EN BIT(1) -#define CCORR_GAMMA_OFF BIT(2) -#define CCORR_WGAMUT_SRC_CLIP BIT(3) -#define DISP_CCORR_SIZE 0x0030 -#define DISP_CCORR_COEF_0 0x0080 -#define DISP_CCORR_COEF_1 0x0084 -#define DISP_CCORR_COEF_2 0x0088 -#define DISP_CCORR_COEF_3 0x008C -#define DISP_CCORR_COEF_4 0x0090

#define DISP_DITHER_EN 0x0000 #define DITHER_EN BIT(0) #define DISP_DITHER_CFG 0x0020 @@ -187,75 +173,6 @@ static void mtk_aal_stop(struct mtk_ddp_comp *comp) writel_relaxed(0x0, comp->regs + DISP_AAL_EN); }

-static void mtk_ccorr_config(struct mtk_ddp_comp *comp, unsigned int w,

•                        unsigned int h, unsigned int vrefresh,
  

•                        unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
  

-{

•   mtk_ddp_write(cmdq_pkt, h << 16 | w, comp, DISP_CCORR_SIZE);
  

•   mtk_ddp_write(cmdq_pkt, CCORR_ENGINE_EN, comp, DISP_CCORR_CFG);
  

-}

-static void mtk_ccorr_start(struct mtk_ddp_comp *comp) -{

•   writel(CCORR_EN, comp->regs + DISP_CCORR_EN);
  

-}

-static void mtk_ccorr_stop(struct mtk_ddp_comp *comp) -{

•   writel_relaxed(0x0, comp->regs + DISP_CCORR_EN);
  

-}

-/* Converts a DRM S31.32 value to the HW S1.10 format. */ -static u16 mtk_ctm_s31_32_to_s1_10(u64 in) -{

•   u16 r;
  

•   /* Sign bit. */
  

•   r = in & BIT_ULL(63) ? BIT(11) : 0;
  

•   if ((in & GENMASK_ULL(62, 33)) > 0) {
  

•           /* identity value 0x100000000 -> 0x400, */
  

•           /* if bigger this, set it to max 0x7ff. */
  

•           r |= GENMASK(10, 0);
  

•   } else {
  

•           /* take the 11 most important bits. */
  

•           r |= (in >> 22) & GENMASK(10, 0);
  

•   }
  

•   return r;
  

-}

-static void mtk_ccorr_ctm_set(struct mtk_ddp_comp *comp,

•                         struct drm_crtc_state *state)
  

-{

•   struct drm_property_blob *blob = state->ctm;
  

•   struct drm_color_ctm *ctm;
  

•   const u64 *input;
  

•   uint16_t coeffs[9] = { 0 };
  

•   int i;
  

•   struct cmdq_pkt *cmdq_pkt = NULL;
  

•   if (!blob)
  

•           return;
  

•   ctm = (struct drm_color_ctm *)blob->data;
  

•   input = ctm->matrix;
  

•   for (i = 0; i < ARRAY_SIZE(coeffs); i++)
  

•           coeffs[i] = mtk_ctm_s31_32_to_s1_10(input[i]);
  

•   mtk_ddp_write(cmdq_pkt, coeffs[0] << 16 | coeffs[1],
  

•                 comp, DISP_CCORR_COEF_0);
  

•   mtk_ddp_write(cmdq_pkt, coeffs[2] << 16 | coeffs[3],
  

•                 comp, DISP_CCORR_COEF_1);
  

•   mtk_ddp_write(cmdq_pkt, coeffs[4] << 16 | coeffs[5],
  

•                 comp, DISP_CCORR_COEF_2);
  

•   mtk_ddp_write(cmdq_pkt, coeffs[6] << 16 | coeffs[7],
  

•                 comp, DISP_CCORR_COEF_3);
  

•   mtk_ddp_write(cmdq_pkt, coeffs[8] << 16,
  

•                 comp, DISP_CCORR_COEF_4);
  

-}

static void mtk_dither_config(struct mtk_ddp_comp *comp, unsigned int w, unsigned int h, unsigned int vrefresh, unsigned int bpc, struct cmdq_pkt *cmdq_pkt) @@ -315,13 +232,6 @@ static void mtk_dither_stop(struct mtk_ddp_comp *comp) .stop = mtk_aal_stop, };

-static const struct mtk_ddp_comp_funcs ddp_ccorr = {

•   .config = mtk_ccorr_config,
  

•   .start = mtk_ccorr_start,
  

•   .stop = mtk_ccorr_stop,
  

•   .ctm_set = mtk_ccorr_ctm_set,
  

-};

static const struct mtk_ddp_comp_funcs ddp_dither = { .config = mtk_dither_config, .start = mtk_dither_start, @@ -367,7 +277,7 @@ struct mtk_ddp_comp_match { [DDP_COMPONENT_AAL0] = { MTK_DISP_AAL, 0, &ddp_aal }, [DDP_COMPONENT_AAL1] = { MTK_DISP_AAL, 1, &ddp_aal }, [DDP_COMPONENT_BLS] = { MTK_DISP_BLS, 0, NULL },

•   [DDP_COMPONENT_CCORR]   = { MTK_DISP_CCORR,     0, &ddp_ccorr },
  

•   [DDP_COMPONENT_CCORR]   = { MTK_DISP_CCORR,     0, NULL },
    [DDP_COMPONENT_COLOR0]  = { MTK_DISP_COLOR,     0, NULL },
    [DDP_COMPONENT_COLOR1]  = { MTK_DISP_COLOR,     1, NULL },
    [DDP_COMPONENT_DITHER]  = { MTK_DISP_DITHER,    0, &ddp_dither },
  

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c index bc205e9..79e86f7 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c @@ -533,11 +533,12 @@ static int mtk_drm_probe(struct platform_device *pdev) private->comp_node[comp_id] = of_node_get(node);

            /*

•            * Currently only the COLOR, GAMMA, OVL, POSTMASK, RDMA, DSI, and DPI blocks have
  

•            * separate component platform drivers and initialize their own
  

•            * Currently only the CCORR, COLOR, GAMMA, OVL, POSTMASK, RDMA, DSI, and DPI
  

•            * blocks have separate component platform drivers and initialize their own
             * DDP component structure. The others are initialized here.
             */
  

•           if (comp_type == MTK_DISP_COLOR ||
  

•           if (comp_type == MTK_DISP_CCORR ||
  

•               comp_type == MTK_DISP_COLOR ||
                comp_type == MTK_DISP_GAMMA ||
                comp_type == MTK_DISP_OVL ||
                comp_type == MTK_DISP_OVL_2L ||
  

@@ -652,6 +653,7 @@ static SIMPLE_DEV_PM_OPS(mtk_drm_pm_ops, mtk_drm_sys_suspend,

static struct platform_driver * const mtk_drm_drivers[] = { &mtk_ddp_driver,

•   &mtk_disp_ccorr_driver,
    &mtk_disp_color_driver,
    &mtk_disp_gamma_driver,
    &mtk_disp_ovl_driver,
  

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h b/drivers/gpu/drm/mediatek/mtk_drm_drv.h index 8a9544b..e20a0e8 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.h +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.h @@ -47,6 +47,7 @@ struct mtk_drm_private { };

extern struct platform_driver mtk_ddp_driver; +extern struct platform_driver mtk_disp_ccorr_driver; extern struct platform_driver mtk_disp_color_driver; extern struct platform_driver mtk_disp_gamma_driver; extern struct platform_driver mtk_disp_ovl_driver; -- 1.8.1.1.dirty _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek