Hi all,
This series seems to be abandoned so I would like to pick it up in order to bring the GPU support for the RK356x mainline.
The series (in conjunction with the VOP2/HDMI TX patches v4 [0]) has been tested successfully on a RK3568 EVB1 with weston and glmark2-es2-wayland.
It should be noted that on the RK3568 EVB1 the supply of the GPU power domain needs to be set to "always-on" in the device tree. There is an ongoing discussion to provide a clean solution [1], in the meantime one has to apply a hack.
Looking forward to your comments!
Best regards, Michael
v5: - address Rob's comments, describe clocks in SoC specific region - move gpu_opp_table so that nodes without a reg are sorted alphabetically - add GPU support to the RK3568 EVB1
v4: see https://lore.kernel.org/linux-rockchip/20211126151729.1026566-1-knaerzche@gm... v3: see https://lore.kernel.org/linux-rockchip/20210805025948.10900-1-ezequiel@colla... v2: see https://lore.kernel.org/linux-rockchip/20210730164515.83044-1-ezequiel@colla...
[0] https://lore.kernel.org/linux-rockchip/20220126145549.617165-1-s.hauer@pengu... [1] https://lore.kernel.org/linux-rockchip/20211217130919.3035788-1-s.hauer@peng...
Alex Bee (2): dt-bindings: gpu: mali-bifrost: describe clocks for the rk356x gpu arm64: dts: rockchip: add cooling map and trip points for gpu to rk356x
Ezequiel Garcia (2): arm64: dts: rockchip: add gpu node to rk356x arm64: dts: rockchip: enable the gpu on quartz64-a
Michael Riesch (1): arm64: dts: rockchip: enable the gpu on rk3568-evb1-v10
.../bindings/gpu/arm,mali-bifrost.yaml | 15 ++++ .../boot/dts/rockchip/rk3566-quartz64-a.dts | 5 ++ .../boot/dts/rockchip/rk3568-evb1-v10.dts | 11 +++ arch/arm64/boot/dts/rockchip/rk356x.dtsi | 76 +++++++++++++++++++ 4 files changed, 107 insertions(+)
From: Alex Bee knaerzche@gmail.com
The Bifrost GPU in Rockchip RK356x SoCs has a core and a bus clock. Reflect this in the SoC specific part of the binding.
Signed-off-by: Alex Bee knaerzche@gmail.com [move the changes to the SoC section] Signed-off-by: Michael Riesch michael.riesch@wolfvision.net --- .../devicetree/bindings/gpu/arm,mali-bifrost.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml index 63a08f3f321d..21409c8d3813 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml @@ -159,6 +159,21 @@ allOf: power-domains: maxItems: 1 sram-supply: false + - if: + properties: + compatible: + contains: + const: rockchip,rk3568-mali + then: + properties: + clocks: + minItems: 2 + clock-names: + items: + - const: core + - const: bus + required: + - clock-names
examples: - |
On Wed, 09 Feb 2022 09:51:06 +0100, Michael Riesch wrote:
From: Alex Bee knaerzche@gmail.com
The Bifrost GPU in Rockchip RK356x SoCs has a core and a bus clock. Reflect this in the SoC specific part of the binding.
Signed-off-by: Alex Bee knaerzche@gmail.com [move the changes to the SoC section] Signed-off-by: Michael Riesch michael.riesch@wolfvision.net
.../devicetree/bindings/gpu/arm,mali-bifrost.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors: ./Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml:173:12: [warning] wrong indentation: expected 12 but found 11 (indentation)
dtschema/dtc warnings/errors:
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/patch/1590238
This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date:
pip3 install dtschema --upgrade
Please check and re-submit.
Hi Rob,
On 2/9/22 16:35, Rob Herring wrote:
On Wed, 09 Feb 2022 09:51:06 +0100, Michael Riesch wrote:
From: Alex Bee knaerzche@gmail.com
The Bifrost GPU in Rockchip RK356x SoCs has a core and a bus clock. Reflect this in the SoC specific part of the binding.
Signed-off-by: Alex Bee knaerzche@gmail.com [move the changes to the SoC section] Signed-off-by: Michael Riesch michael.riesch@wolfvision.net
.../devicetree/bindings/gpu/arm,mali-bifrost.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors: ./Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml:173:12: [warning] wrong indentation: expected 12 but found 11 (indentation)
D'oh! Sorry for the stupid mistake, I found that yamllint was indeed missing.
Lines 173 and 174 need an extra space. In the case that a v6 is required I'll fix this. But of course I wouldn't say no if this could be fixed when the patch is applied :-)
Best regards, Michael
dtschema/dtc warnings/errors:
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/patch/1590238
This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date:
pip3 install dtschema --upgrade
Please check and re-submit.
Hi Michael,
Am Mittwoch, 9. Februar 2022, 16:46:28 CET schrieb Michael Riesch:
Hi Rob,
On 2/9/22 16:35, Rob Herring wrote:
On Wed, 09 Feb 2022 09:51:06 +0100, Michael Riesch wrote:
From: Alex Bee knaerzche@gmail.com
The Bifrost GPU in Rockchip RK356x SoCs has a core and a bus clock. Reflect this in the SoC specific part of the binding.
Signed-off-by: Alex Bee knaerzche@gmail.com [move the changes to the SoC section] Signed-off-by: Michael Riesch michael.riesch@wolfvision.net
.../devicetree/bindings/gpu/arm,mali-bifrost.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors: ./Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml:173:12: [warning] wrong indentation: expected 12 but found 11 (indentation)
D'oh! Sorry for the stupid mistake, I found that yamllint was indeed missing.
Lines 173 and 174 need an extra space. In the case that a v6 is required I'll fix this. But of course I wouldn't say no if this could be fixed when the patch is applied :-)
My guess is, Rob's bot filters out the easy wrongs, so I'm not sure if he actually looks at these in person.
So doing a v6 might actually be better for a Review :-)
Heiko
dtschema/dtc warnings/errors:
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/patch/1590238
This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date:
pip3 install dtschema --upgrade
Please check and re-submit.
On Wed, Feb 09, 2022 at 05:28:05PM +0100, Heiko Stübner wrote:
Hi Michael,
Am Mittwoch, 9. Februar 2022, 16:46:28 CET schrieb Michael Riesch:
Hi Rob,
On 2/9/22 16:35, Rob Herring wrote:
On Wed, 09 Feb 2022 09:51:06 +0100, Michael Riesch wrote:
From: Alex Bee knaerzche@gmail.com
The Bifrost GPU in Rockchip RK356x SoCs has a core and a bus clock. Reflect this in the SoC specific part of the binding.
Signed-off-by: Alex Bee knaerzche@gmail.com [move the changes to the SoC section] Signed-off-by: Michael Riesch michael.riesch@wolfvision.net
.../devicetree/bindings/gpu/arm,mali-bifrost.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors: ./Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml:173:12: [warning] wrong indentation: expected 12 but found 11 (indentation)
D'oh! Sorry for the stupid mistake, I found that yamllint was indeed missing.
Lines 173 and 174 need an extra space. In the case that a v6 is required I'll fix this. But of course I wouldn't say no if this could be fixed when the patch is applied :-)
My guess is, Rob's bot filters out the easy wrongs, so I'm not sure if he actually looks at these in person.
I do because there are sometimes false positives. It's not a free testing service. (Well, it might be free beer for you, but that's because I'm buying. :) ) For just indentation I will still review them (eventually).
So doing a v6 might actually be better for a Review :-)
Resending just moves you to the back of the line (usually).
Rob
On Wed, Feb 09, 2022 at 09:51:06AM +0100, Michael Riesch wrote:
From: Alex Bee knaerzche@gmail.com
The Bifrost GPU in Rockchip RK356x SoCs has a core and a bus clock. Reflect this in the SoC specific part of the binding.
Signed-off-by: Alex Bee knaerzche@gmail.com [move the changes to the SoC section] Signed-off-by: Michael Riesch michael.riesch@wolfvision.net
.../devicetree/bindings/gpu/arm,mali-bifrost.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml index 63a08f3f321d..21409c8d3813 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml @@ -159,6 +159,21 @@ allOf: power-domains: maxItems: 1 sram-supply: false
- if:
properties:compatible:contains:const: rockchip,rk3568-mali- then:
properties:clocks:minItems: 2clock-names:items:- const: core- const: bus
Please don't invent new names. We already have 'gpu' and 'bus' defined. 'core' and 'gpu' sound like the same thing to me, and the h/w doesn't have different clocks from vendor to vendor.
Rob
From: Ezequiel Garcia ezequiel@collabora.com
Rockchip SoCs RK3566 and RK3568 have a Mali Gondul core which is based on the Bifrost architecture. It has one shader core and two execution engines.
Quoting the datasheet:
Mali-G52 1-Core-2EE * Support 1600Mpix/s fill rate when 800MHz clock frequency * Support 38.4GLOPs when 800MHz clock frequency
Signed-off-by: Ezequiel Garcia ezequiel@collabora.com Signed-off-by: Alex Bee knaerzche@gmail.com Signed-off-by: Michael Riesch michael.riesch@wolfvision.net --- arch/arm64/boot/dts/rockchip/rk356x.dtsi | 49 ++++++++++++++++++++++++ 1 file changed, 49 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index ff1689283996..47484305b7a4 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -144,6 +144,40 @@ scmi_clk: protocol@14 { }; };
+ gpu_opp_table: opp-table-1 { + compatible = "operating-points-v2"; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <825000>; + }; + + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <825000>; + }; + + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <825000>; + }; + + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <825000>; + }; + + opp-700000000 { + opp-hz = /bits/ 64 <700000000>; + opp-microvolt = <900000>; + }; + + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <1000000>; + }; + }; + pmu { compatible = "arm,cortex-a55-pmu"; interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>, @@ -444,6 +478,21 @@ power-domain@RK3568_PD_RKVENC { }; };
+ gpu: gpu@fde60000 { + compatible = "rockchip,rk3568-mali", "arm,mali-bifrost"; + reg = <0x0 0xfde60000 0x0 0x4000>; + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "job", "mmu", "gpu"; + clocks = <&scmi_clk 1>, <&cru CLK_GPU>; + clock-names = "core", "bus"; + #cooling-cells = <2>; + operating-points-v2 = <&gpu_opp_table>; + power-domains = <&power RK3568_PD_GPU>; + status = "disabled"; + }; + sdmmc2: mmc@fe000000 { compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xfe000000 0x0 0x4000>;
From: Alex Bee knaerzche@gmail.com
RK356x SoCs have a second thermal sensor for the GPU. This adds the cooling map and trip points for it to make use of its contribution as a cooling device.
Signed-off-by: Alex Bee knaerzche@gmail.com Signed-off-by: Michael Riesch michael.riesch@wolfvision.net --- arch/arm64/boot/dts/rockchip/rk356x.dtsi | 27 ++++++++++++++++++++++++ 1 file changed, 27 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index 47484305b7a4..2334fed4620f 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -1093,6 +1093,33 @@ gpu_thermal: gpu-thermal { polling-delay = <1000>; /* milliseconds */
thermal-sensors = <&tsadc 1>; + + trips { + gpu_threshold: gpu-threshold { + temperature = <70000>; + hysteresis = <2000>; + type = "passive"; + }; + gpu_target: gpu-target { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + gpu_crit: gpu-crit { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&gpu_target>; + cooling-device = + <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; };
From: Ezequiel Garcia ezequiel@collabora.com
Enable the GPU core on the Pine64 Quartz64 Model A.
Signed-off-by: Ezequiel Garcia ezequiel@collabora.com Signed-off-by: Alex Bee knaerzche@gmail.com Signed-off-by: Michael Riesch michael.riesch@wolfvision.net --- arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts index 3e65465ac7d5..b048db6cff3a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts @@ -221,6 +221,11 @@ &gmac1m0_clkinout status = "okay"; };
+&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + &i2c0 { status = "okay";
Enable the GPU core on the Rockchip RK3568 EVB1.
Signed-off-by: Michael Riesch michael.riesch@wolfvision.net --- arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts | 11 +++++++++++ 1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts index d8a4f7a9f562..39c495ff0157 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts @@ -140,6 +140,11 @@ &gmac1m1_rgmii_clk status = "okay"; };
+&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + &i2c0 { status = "okay";
@@ -462,6 +467,12 @@ &sdmmc0 { status = "okay"; };
+&tsadc { + rockchip,hw-tshut-mode = <1>; + rockchip,hw-tshut-polarity = <0>; + status = "okay"; +}; + &uart2 { status = "okay"; };
dri-devel@lists.freedesktop.org
-
Heiko Stübner -
Michael Riesch -
Rob Herring