[Mesa-dev] R600 Patchset: Emit true ISA

[Vincent Lejeune]

Hi,

Thank for doing this.
Patches 1 2 and 3 have my rb.
For patch 4:

>@@ -125,9 +106,7 @@ MCCodeEmitter *llvm::createR600MCCodeEmitter(const MCInstrInfo &MCII,
> 
> void R600MCCodeEmitter::EncodeInstruction(const MCInst &MI, raw_ostream &OS,
>                                        SmallVectorImpl<MCFixup> &Fixups) const {
>-  if (isFCOp(MI.getOpcode())){
>-    EmitFCInstr(MI, OS);
>-  } else if (MI.getOpcode() == AMDGPU::RETURN ||
>+  if (MI.getOpcode() == AMDGPU::RETURN ||
>     MI.getOpcode() == AMDGPU::FETCH_CLAUSE ||
>     MI.getOpcode() == AMDGPU::ALU_CLAUSE ||
>     MI.getOpcode() == AMDGPU::BUNDLE ||
>@@ -135,12 +114,6 @@ void R600MCCodeEmitter::EncodeInstruction(const MCInst &MI, raw_ostream &OS,
>     return;
>   } else {
>     switch(MI.getOpcode()) {
>-    case AMDGPU::RAT_WRITE_CACHELESS_32_eg:
>-    case AMDGPU::RAT_WRITE_CACHELESS_128_eg: {
>-      uint64_t inst = getBinaryCodeForInstr(MI, Fixups);
>-      Emit(inst, OS);
>-      break;
>-    }
>     case AMDGPU::CONSTANT_LOAD_eg:
>     case AMDGPU::VTX_READ_PARAM_8_eg:
>     case AMDGPU::VTX_READ_PARAM_16_eg:
Is it possible to use R600_InstFlag::VTX_INST and R600_InstFlag::TEX_INST instead and to remove the switch() statement ?
>@@ -234,44 +207,6 @@ void R600MCCodeEmitter::EncodeInstruction(const MCInst &MI, raw_ostream &OS,
>       Emit((u_int32_t) 0, OS);
>       break;
>     } 
----- Mail original -----
> De : Tom Stellard <tom at stellard.net>
> À : llvm-commits at cs.uiuc.edu
> Cc : mesa-dev at lists.freedesktop.org
> Envoyé le : Samedi 4 mai 2013 0h53
> Objet : R600 Patchset: Emit true ISA
> 
> Hi,
> 
> The attached patches modify the CodeEmitter to emit true ISA.
> Previously, we were prefixing all instructions with an instruction type
> byte.
> 
> Vincent did most of the work to convert the CodeEmitter to true ISA,
> these patches are just the last few cleanups that are needed to finish
> the project.
> 
> Please test/review.
> 
> Thanks,
> Tom
> 
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