[Mesa-dev] [PATCH 5/5] radeonsi: Fix user clip planes

Michel Dänzer michel at daenzer.net
Fri May 17 02:27:48 PDT 2013


From: Michel Dänzer <michel.daenzer at amd.com>

4 more little piglits.

NOTE: This is a candidate for the 9.1 branch.
Signed-off-by: Michel Dänzer <michel.daenzer at amd.com>
---
 src/gallium/drivers/radeonsi/si_state_draw.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 4380d2c..ae571a4 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -316,10 +316,9 @@ static bool si_update_draw_info_state(struct r600_context *rctx,
 		       (rctx->queued.named.rasterizer->clip_plane_enable &
 			vs->clip_dist_write));
 	si_pm4_set_reg(pm4, R_028810_PA_CL_CLIP_CNTL,
-		       rctx->queued.named.rasterizer->pa_cl_clip_cntl
-			/*| (rctx->vs_shader->shader.clip_dist_write ||
-			rctx->vs_shader->shader.vs_prohibit_ucps ?
-			0 : rctx->rasterizer->clip_plane_enable & 0x3F)*/);
+		       rctx->queued.named.rasterizer->pa_cl_clip_cntl |
+		       (vs->clip_dist_write ? 0 :
+			rctx->queued.named.rasterizer->clip_plane_enable & 0x3F));
 
 	si_pm4_set_state(rctx, draw_info, pm4);
 	return true;
-- 
1.8.3.rc1



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