[Mesa-dev] [PATCH 09/12] i965/gen7+: Ensure that front/back buffers are fast-clear resolved.

[Paul Berry]

We already had code in intel_downsample_for_dri2_flush() for
downsampling front and back buffers when multisampling was in use.
This patch extends that function to perform fast color clear resolves
when necessary.

To account for the additional functionality, the function is renamed
to simply intel_resolve_for_dri2_flush().
---
 src/mesa/drivers/dri/intel/intel_context.c | 21 ++++++++++++---------
 src/mesa/drivers/dri/intel/intel_context.h |  4 ++--
 src/mesa/drivers/dri/intel/intel_screen.c  |  2 +-
 3 files changed, 15 insertions(+), 12 deletions(-)

diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index fab99c1..eaaf4ec 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -249,12 +249,12 @@ intelGetString(struct gl_context * ctx, GLenum name)
 }
 
 void
-intel_downsample_for_dri2_flush(struct intel_context *intel,
-                                __DRIdrawable *drawable)
+intel_resolve_for_dri2_flush(struct intel_context *intel,
+                             __DRIdrawable *drawable)
 {
    if (intel->gen < 6) {
-      /* MSAA is not supported, so don't waste time checking for
-       * a multisample buffer.
+      /* MSAA and fast color clear are not supported, so don't waste time
+       * checking whether a resolve is needed.
        */
       return;
    }
@@ -274,7 +274,10 @@ intel_downsample_for_dri2_flush(struct intel_context *intel,
       rb = intel_get_renderbuffer(fb, buffers[i]);
       if (rb == NULL || rb->mt == NULL)
          continue;
-      intel_miptree_downsample(intel, rb->mt);
+      if (rb->mt->num_samples <= 1)
+         intel_miptree_resolve_color(intel, rb->mt);
+      else
+         intel_miptree_downsample(intel, rb->mt);
    }
 }
 
@@ -291,14 +294,14 @@ intel_flush_front(struct gl_context *ctx)
           driDrawable &&
           driDrawable->loaderPrivate) {
 
-         /* Downsample before flushing FAKE_FRONT_LEFT to FRONT_LEFT.
+         /* Resolve before flushing FAKE_FRONT_LEFT to FRONT_LEFT.
           *
-          * This potentially downsamples both front and back buffer. It
-          * is unnecessary to downsample the back, but harms nothing except
+          * This potentially resolves both front and back buffer. It
+          * is unnecessary to resolve the back, but harms nothing except
           * performance. And no one cares about front-buffer render
           * performance.
           */
-         intel_downsample_for_dri2_flush(intel, driDrawable);
+         intel_resolve_for_dri2_flush(intel, driDrawable);
 
          screen->dri2.loader->flushFrontBuffer(driDrawable,
                                                driDrawable->loaderPrivate);
diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h
index c0f07ff..6b8951c 100644
--- a/src/mesa/drivers/dri/intel/intel_context.h
+++ b/src/mesa/drivers/dri/intel/intel_context.h
@@ -614,8 +614,8 @@ void intel_update_renderbuffers(__DRIcontext *context,
 void intel_prepare_render(struct intel_context *intel);
 
 void
-intel_downsample_for_dri2_flush(struct intel_context *intel,
-                                __DRIdrawable *drawable);
+intel_resolve_for_dri2_flush(struct intel_context *intel,
+                             __DRIdrawable *drawable);
 
 void i915_set_buf_info_for_region(uint32_t *state, struct intel_region *region,
 				  uint32_t buffer_id);
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index cf1044c..54ef7d0 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -173,7 +173,7 @@ intelDRI2Flush(__DRIdrawable *drawable)
    if (intel->gen < 4)
       INTEL_FIREVERTICES(intel);
 
-   intel_downsample_for_dri2_flush(intel, drawable);
+   intel_resolve_for_dri2_flush(intel, drawable);
    intel->need_throttle = true;
 
    if (intel->batch.used)
-- 
1.8.2.3