[Mesa-dev] [PATCH 5/7] radeonsi: Handle TGSI TXQ opcode

[Michel Dänzer]

From: Michel Dänzer <michel.daenzer at amd.com>

Signed-off-by: Michel Dänzer <michel.daenzer at amd.com>
---
 src/gallium/drivers/radeonsi/radeonsi_shader.c | 34 ++++++++++++++++++++++++--
 1 file changed, 32 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/radeonsi_shader.c b/src/gallium/drivers/radeonsi/radeonsi_shader.c
index b82f885..572c665 100644
--- a/src/gallium/drivers/radeonsi/radeonsi_shader.c
+++ b/src/gallium/drivers/radeonsi/radeonsi_shader.c
@@ -889,8 +889,7 @@ static void tex_fetch_args(
 	if (opcode == TGSI_OPCODE_TXB)
 		address[count++] = coords[3];
 
-	if ((target == TGSI_TEXTURE_CUBE || target == TGSI_TEXTURE_SHADOWCUBE) &&
-	    opcode != TGSI_OPCODE_TXQ)
+	if (target == TGSI_TEXTURE_CUBE || target == TGSI_TEXTURE_SHADOWCUBE)
 		radeon_llvm_emit_prepare_cube_coords(bld_base, emit_data, coords);
 
 	/* Pack depth comparison value */
@@ -1017,6 +1016,30 @@ static void build_tex_intrinsic(const struct lp_build_tgsi_action * action,
 		LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
 }
 
+static void txq_fetch_args(
+	struct lp_build_tgsi_context * bld_base,
+	struct lp_build_emit_data * emit_data)
+{
+	struct si_shader_context *si_shader_ctx = si_shader_context(bld_base);
+	const struct tgsi_full_instruction *inst = emit_data->inst;
+
+	/* Mip level */
+	emit_data->args[0] = lp_build_emit_fetch(bld_base, inst, 0, TGSI_CHAN_X);
+
+	/* Resource */
+	emit_data->args[1] = si_shader_ctx->resources[inst->Src[1].Register.Index];
+
+	/* Dimensions */
+	emit_data->args[2] = lp_build_const_int32(bld_base->base.gallivm,
+						  inst->Texture.Texture);
+
+	emit_data->arg_count = 3;
+
+	emit_data->dst_type = LLVMVectorType(
+		LLVMInt32TypeInContext(bld_base->base.gallivm->context),
+		4);
+}
+
 static const struct lp_build_tgsi_action tex_action = {
 	.fetch_args = tex_fetch_args,
 	.emit = build_tex_intrinsic,
@@ -1041,6 +1064,12 @@ static const struct lp_build_tgsi_action txl_action = {
 	.intr_name = "llvm.SI.samplel."
 };
 
+static const struct lp_build_tgsi_action txq_action = {
+	.fetch_args = txq_fetch_args,
+	.emit = build_tgsi_intrinsic_nomem,
+	.intr_name = "llvm.SI.resinfo"
+};
+
 static void create_meta_data(struct si_shader_context *si_shader_ctx)
 {
 	struct gallivm_state *gallivm = si_shader_ctx->radeon_bld.soa.bld_base.base.gallivm;
@@ -1282,6 +1311,7 @@ int si_pipe_shader_create(
 	bld_base->op_actions[TGSI_OPCODE_TXF] = txf_action;
 	bld_base->op_actions[TGSI_OPCODE_TXL] = txl_action;
 	bld_base->op_actions[TGSI_OPCODE_TXP] = tex_action;
+	bld_base->op_actions[TGSI_OPCODE_TXQ] = txq_action;
 
 	si_shader_ctx.radeon_bld.load_input = declare_input;
 	si_shader_ctx.radeon_bld.load_system_value = declare_system_value;
-- 
1.8.3.rc3