[Mesa-dev] [PATCH 1/2] gallium/tgsi: add support for DEMOTE and READ_HELPER opcodes
Ilia Mirkin
imirkin at alum.mit.edu
Wed Oct 2 23:49:17 UTC 2019
This mirrors the intrinsics in the GLSL IR. One could imagine an
alternate definition where reading the semantic would account for the
READ_HELPER functionality, but that feels potentially dodgy and could be
subject to CSE unpleasantness.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
.../auxiliary/tgsi/tgsi_info_opcodes.h | 4 ++--
src/gallium/docs/source/tgsi.rst | 21 +++++++++++++++++++
src/gallium/include/pipe/p_shader_tokens.h | 4 ++--
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 7 +++++--
4 files changed, 30 insertions(+), 6 deletions(-)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_info_opcodes.h b/src/gallium/auxiliary/tgsi/tgsi_info_opcodes.h
index 0b9b264bc53..7aecda44b82 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_info_opcodes.h
+++ b/src/gallium/auxiliary/tgsi/tgsi_info_opcodes.h
@@ -29,11 +29,11 @@ OPCODE(1, 1, COMP, ROUND)
OPCODE(1, 1, REPL, EX2)
OPCODE(1, 1, REPL, LG2)
OPCODE(1, 2, REPL, POW)
-OPCODE_GAP(31) /* removed */
+OPCODE(0, 0, NONE, DEMOTE)
OPCODE(1, 1, COMP, U2I64)
OPCODE(1, 0, OTHR, CLOCK)
OPCODE(1, 1, COMP, I2I64)
-OPCODE_GAP(35) /* removed */
+OPCODE(1, 0, COMP, READ_HELPER)
OPCODE(1, 1, REPL, COS)
OPCODE(1, 1, COMP, DDX)
OPCODE(1, 1, COMP, DDY)
diff --git a/src/gallium/docs/source/tgsi.rst b/src/gallium/docs/source/tgsi.rst
index 287f4b72729..d58b23f024b 100644
--- a/src/gallium/docs/source/tgsi.rst
+++ b/src/gallium/docs/source/tgsi.rst
@@ -681,6 +681,27 @@ This instruction replicates its result.
Unconditional discard. Allowed in fragment shaders only.
+.. opcode:: DEMOTE - Demote Invocation to a Helper
+
+ This demotes the current invocation to a helper, but continues
+ execution (while KILL may or may not terminate the
+ invocation). After this runs, all the usual helper invocation rules
+ apply about discarding buffer and render target writes. This is
+ useful for having accurate derivatives in the other invocations
+ which have not been demoted.
+
+ Allowed in fragment shaders only.
+
+
+.. opcode:: READ_HELPER - Reads Invocation Helper Status
+
+ This is identical to ``TGSI_SEMANTIC_HELPER_INVOCATION``, except
+ this will read the current value, which might change as a result of
+ a ``DEMOTE`` instruction.
+
+ Allowed in fragment shaders only.
+
+
.. opcode:: TXB - Texture Lookup With Bias
for cube map array textures and shadow cube maps, the bias value
diff --git a/src/gallium/include/pipe/p_shader_tokens.h b/src/gallium/include/pipe/p_shader_tokens.h
index b30a257df2f..5770eba0837 100644
--- a/src/gallium/include/pipe/p_shader_tokens.h
+++ b/src/gallium/include/pipe/p_shader_tokens.h
@@ -376,11 +376,11 @@ enum tgsi_opcode {
TGSI_OPCODE_EX2 = 28,
TGSI_OPCODE_LG2 = 29,
TGSI_OPCODE_POW = 30,
- /* gap */
+ TGSI_OPCODE_DEMOTE = 31,
TGSI_OPCODE_U2I64 = 32,
TGSI_OPCODE_CLOCK = 33,
TGSI_OPCODE_I2I64 = 34,
- /* gap */
+ TGSI_OPCODE_READ_HELPER = 35,
TGSI_OPCODE_COS = 36,
TGSI_OPCODE_DDX = 37,
TGSI_OPCODE_DDY = 38,
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 799c161cfaf..be582f5f01c 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -4107,6 +4107,10 @@ glsl_to_tgsi_visitor::visit(ir_call *ir)
visit_generic_intrinsic(ir, TGSI_OPCODE_READ_INVOC);
return;
+ case ir_intrinsic_helper_invocation:
+ visit_generic_intrinsic(ir, TGSI_OPCODE_READ_HELPER);
+ return;
+
case ir_intrinsic_invalid:
case ir_intrinsic_generic_load:
case ir_intrinsic_generic_store:
@@ -4120,7 +4124,6 @@ glsl_to_tgsi_visitor::visit(ir_call *ir)
case ir_intrinsic_generic_atomic_comp_swap:
case ir_intrinsic_begin_invocation_interlock:
case ir_intrinsic_end_invocation_interlock:
- case ir_intrinsic_helper_invocation:
unreachable("Invalid intrinsic");
}
}
@@ -4631,7 +4634,7 @@ glsl_to_tgsi_visitor::visit(ir_discard *ir)
void
glsl_to_tgsi_visitor::visit(ir_demote *ir)
{
- assert(!"demote statement unsupported");
+ emit_asm(ir, TGSI_OPCODE_DEMOTE);
}
void
--
2.21.0
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