[PATCH] Radeon 7/11 : Fix second head PLL setup for TFTs
Benjamin Herrenschmidt
benh at kernel.crashing.org
Sun Dec 5 01:59:53 PST 2004
The second digital output of the radeon chip doesn't like when the P2PLL
is set with an odd post-divider value. This makes sure we never chose
a "wrong" value when calculating the P2PLL setting on a non-CRT screen.
Index: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c
===================================================================
--- xc.orig/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c 2004-12-05 20:22:00.795198808 +1100
+++ xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c 2004-12-05 20:22:04.655611936 +1100
@@ -7058,7 +7058,7 @@
/* Define PLL2 registers for requested video mode */
static void RADEONInitPLL2Registers(RADEONSavePtr save, RADEONPLLPtr pll,
- double dot_clock)
+ double dot_clock, int no_odd_postdiv)
{
unsigned long freq = dot_clock * 100;
@@ -7085,6 +7085,11 @@
if (freq * 12 < pll->min_pll_freq) freq = pll->min_pll_freq / 12;
for (post_div = &post_divs[0]; post_div->divider; ++post_div) {
+ /* Odd post divider value don't work properly on the second digital
+ * output
+ */
+ if (no_odd_postdiv && (post_div->divider & 1))
+ continue;
save->pll_output_freq_2 = post_div->divider * freq;
if (save->pll_output_freq_2 >= pll->min_pll_freq
&& save->pll_output_freq_2 <= pll->max_pll_freq) break;
@@ -7185,7 +7190,7 @@
if (info->IsSecondary) {
if (!RADEONInitCrtc2Registers(pScrn, save, mode, info))
return FALSE;
- RADEONInitPLL2Registers(save, &info->pll, dot_clock);
+ RADEONInitPLL2Registers(save, &info->pll, dot_clock, info->DisplayType != MT_CRT);
} else if (info->MergedFB) {
RADEONInitCommonRegisters(save, info);
if (!RADEONInitCrtcRegisters(pScrn, save,
@@ -7202,7 +7207,8 @@
RADEONInitCrtc2Registers(pScrn, save,
((RADEONMergedDisplayModePtr)mode->Private)->CRT2, info);
dot_clock = (((RADEONMergedDisplayModePtr)mode->Private)->CRT2)->Clock / 1000.0;
- RADEONInitPLL2Registers(save, &info->pll, dot_clock);
+ RADEONInitPLL2Registers(save, &info->pll, dot_clock,
+ info->MergeType != MT_CRT);
} else {
if (!RADEONInitCrtcRegisters(pScrn, save, mode, info))
return FALSE;
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