interlaced video question for you XV experts

[Benjamin Herrenschmidt]

On Thu, 2005-03-17 at 21:00 -0500, Jon Smirl wrote:
> On Fri, 18 Mar 2005 11:40:53 +1100, Benjamin Herrenschmidt
> <benh at kernel.crashing.org> wrote:
> > Doing that properly usually requires to have at least the 2 next fields
> > in advance in memory and the driver trigger the switch on the vblank irq
> > to get perfectly sync'd, with the ability for the driver to "drop" a
> > frame if it notices that it missed a field in order to never cause a
> > field inversion. So the driver must know which field is contained in
> > which buffer and which field will be displayed at next interrupt.
> 
> So now I'm trying to figure out how you would tell a radeon chip to do
> this. I see how to do this with a 640x525 buffer and set the output to
> 60Hz interlaced. It's not obvious to me how to set the chip up to do
> 640x262, is there where the DOUBLE_SCAN bit comes into play?

Nah, on most video chips, the 2 fields are in the same picture, my bad,
I was referring to some other HW I had that had them separate.

When doing playback though, especially variable speed, you be careful
with fields handling. I used to have a variable speed playback engine of
interlaced video taht worked reasonably well but it's difficult to avoid
having a vertical jumping effect on low speeds.

> Would I use a 640x262 buffer, set output to 60Hz interlaced with
> DOUBLE_SCAN, and then swap the buffers on each vsync interrupt?
> DOUBLE_SCAN causes each line to be read twice but since I swapped the
> buffers it outputs two different halves of the frame.
> 
> Is there really any point in making interlaced output like this work?
> Even a 200Mhz processor should be able to deinterlace on the fly. All
> you do is copy the buffer to ever other line, that can't add more than
> a few cycles. Maybe the problem is tuner cards that do DMA to memory
> can't deinterlace and they need two buffers.