[Intel-gfx] [PATCH 15/33] drm/i915: DSPARB register needs an offset on VLV

[Daniel Vetter]

On Thu, Jan 24, 2013 at 03:29:40PM +0200, ville.syrjala at linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

With Paulo's patch to no longer safe/resume DSPARB on gen4+ gone, there's
no user of this left for vlv. And I wouldn't be surprised at all if the
register has a completely different function now, so maybe if we ever need
it we need a VLV_DSPARB or something like that.
-Daniel

> ---
>  drivers/gpu/drm/i915/i915_reg.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index c3eaa69..3ac695d 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -2744,7 +2744,7 @@
>  #define   PLANEA_INVALID_GTT_STATUS		(1<<0)
>  #define   DPINVGTT_STATUS_MASK			0xff
>  
> -#define DSPARB			0x70030
> +#define DSPARB			(dev_priv->info->display_mmio_offset + 0x70030)
>  #define   DSPARB_CSTART_MASK	(0x7f << 7)
>  #define   DSPARB_CSTART_SHIFT	7
>  #define   DSPARB_BSTART_MASK	(0x7f)
> -- 
> 1.7.12.4
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch