[Intel-gfx] [PATCH] drm/i915: add intel_display_power_enabled_sw for use in atomic ctx

Daniel Vetter daniel at ffwll.ch
Wed Nov 27 19:38:01 CET 2013


On Wed, Nov 27, 2013 at 7:30 PM, Ville Syrjälä
<ville.syrjala at linux.intel.com> wrote:
> I'm not sure the barriers really provide extra value. Some other
> thread could still come along just after this and disable the power
> wells.

Yeah, the barrriers don't really add anything - the access from the
capture code is racy, but we don't really care about that. I'd still
like to see us dump this information into the error state though since
now the sw tracking could get out of sync with the hw and leave us
puzzled when trying to analyze such a dump.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch



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