[Intel-gfx] [PATCH v3 03/13] drm/i915/gen9: move assert_csr_loaded into intel_rpm.c

[Imre Deak]

On ke, 2015-10-28 at 23:58 +0200, Imre Deak wrote:
> From: Daniel Vetter <daniel.vetter at intel.com>
> 
> Avoids non-static functions since all the callers are in intel_rpm.c.
> 
> Cc: Damien Lespiau <damien.lespiau at intel.com>
> Cc: Imre Deak <imre.deak at intel.com>
> Cc: Sunil Kamath <sunil.kamath at intel.com>
> Signed-off-by: Daniel Vetter <daniel.vetter at intel.com>
> Signed-off-by: Animesh Manna <animesh.manna at intel.com>
> [imre: removed note about reg definitions from commit message, since
>  it's not relevant any more]
> Reviewed-by: Imre Deak <imre.deak at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_csr.c        | 10 ----------
>  drivers/gpu/drm/i915/intel_drv.h        |  1 -
>  drivers/gpu/drm/i915/intel_runtime_pm.c |  8 ++++++++
>  3 files changed, 8 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_csr.c
> b/drivers/gpu/drm/i915/intel_csr.c
> index 2c9bf3f..cd6fb58d 100644
> --- a/drivers/gpu/drm/i915/intel_csr.c
> +++ b/drivers/gpu/drm/i915/intel_csr.c
> @@ -485,13 +485,3 @@ void intel_csr_ucode_fini(struct drm_device
> *dev)
>  	intel_csr_load_status_set(dev_priv, FW_FAILED);
>  	kfree(dev_priv->csr.dmc_payload);
>  }
> -
> -void assert_csr_loaded(struct drm_i915_private *dev_priv)
> -{
> -	WARN_ONCE(intel_csr_load_status_get(dev_priv) != FW_LOADED,
> -		  "CSR is not loaded.\n");
> -	WARN_ONCE(!I915_READ(CSR_PROGRAM(0)),
> -		  "CSR program storage start is NULL\n");
> -	WARN_ONCE(!I915_READ(CSR_SSP_BASE), "CSR SSP Base Not
> fine\n");
> -	WARN_ONCE(!I915_READ(CSR_HTP_SKL), "CSR HTP Not fine\n");
> -}
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index 1a3bbdc..3d1c744 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1211,7 +1211,6 @@ void intel_csr_load_status_set(struct
> drm_i915_private *dev_priv,
>  					enum csr_state state);
>  void intel_csr_load_program(struct drm_device *dev);
>  void intel_csr_ucode_fini(struct drm_device *dev);
> -void assert_csr_loaded(struct drm_i915_private *dev_priv);
>  
>  /* intel_dp.c */
>  void intel_dp_init(struct drm_device *dev, int output_reg, enum port
> port);
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
> b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index e50cc88..92746e1 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -458,6 +458,14 @@ static void
> gen9_set_dc_state_debugmask_memory_up(
>  	}
>  }
>  
> +void assert_csr_loaded(struct drm_i915_private *dev_priv)

I missed it during review, but this is static. With that added my R-b
still holds.

> +{
> +	WARN_ONCE(!I915_READ(CSR_PROGRAM(0)),
> +		  "CSR program storage start is NULL\n");
> +	WARN_ONCE(!I915_READ(CSR_SSP_BASE), "CSR SSP Base Not
> fine\n");
> +	WARN_ONCE(!I915_READ(CSR_HTP_SKL), "CSR HTP Not fine\n");
> +}
> +
>  static void assert_can_enable_dc5(struct drm_i915_private *dev_priv)
>  {
>  	struct drm_device *dev = dev_priv->dev;