Mesa (master): i965: indentation and formatting fixes
Brian Paul
brianp at kemper.freedesktop.org
Thu Jan 1 21:06:59 UTC 2009
Module: Mesa
Branch: master
Commit: 914fcbafdb166603da408d58a0a0f381d9c08e9f
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=914fcbafdb166603da408d58a0a0f381d9c08e9f
Author: Brian Paul <brianp at vmware.com>
Date: Wed Dec 31 17:01:44 2008 -0700
i965: indentation and formatting fixes
---
src/mesa/drivers/dri/i965/brw_wm_emit.c | 81 ++++++++++++++-----------------
1 files changed, 36 insertions(+), 45 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c
index 58c78c4..b5050a3 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c
@@ -194,7 +194,7 @@ static void emit_linterp( struct brw_compile *p,
interp[2] = brw_vec1_grf(nr+1, 0);
interp[3] = brw_vec1_grf(nr+1, 4);
- for(i = 0; i < 4; i++ ) {
+ for (i = 0; i < 4; i++) {
if (mask & (1<<i)) {
brw_LINE(p, brw_null_reg(), interp[i], deltas[0]);
brw_MAC(p, dst[i], suboffset(interp[i],1), deltas[1]);
@@ -219,42 +219,40 @@ static void emit_pinterp( struct brw_compile *p,
interp[2] = brw_vec1_grf(nr+1, 0);
interp[3] = brw_vec1_grf(nr+1, 4);
- for(i = 0; i < 4; i++ ) {
+ for (i = 0; i < 4; i++) {
if (mask & (1<<i)) {
brw_LINE(p, brw_null_reg(), interp[i], deltas[0]);
brw_MAC(p, dst[i], suboffset(interp[i],1), deltas[1]);
}
}
- for(i = 0; i < 4; i++ ) {
+ for (i = 0; i < 4; i++) {
if (mask & (1<<i)) {
brw_MUL(p, dst[i], dst[i], w[3]);
}
}
}
+
static void emit_cinterp( struct brw_compile *p,
const struct brw_reg *dst,
GLuint mask,
const struct brw_reg *arg0 )
{
- struct brw_reg interp[4];
- GLuint nr = arg0[0].nr;
- GLuint i;
-
- interp[0] = brw_vec1_grf(nr, 0);
- interp[1] = brw_vec1_grf(nr, 4);
- interp[2] = brw_vec1_grf(nr+1, 0);
- interp[3] = brw_vec1_grf(nr+1, 4);
-
- for(i = 0; i < 4; i++ ) {
- if (mask & (1<<i)) {
- brw_MOV(p, dst[i], suboffset(interp[i],3)); /* TODO: optimize away like other moves */
- }
- }
-}
-
+ struct brw_reg interp[4];
+ GLuint nr = arg0[0].nr;
+ GLuint i;
+ interp[0] = brw_vec1_grf(nr, 0);
+ interp[1] = brw_vec1_grf(nr, 4);
+ interp[2] = brw_vec1_grf(nr+1, 0);
+ interp[3] = brw_vec1_grf(nr+1, 4);
+ for (i = 0; i < 4; i++) {
+ if (mask & (1<<i)) {
+ brw_MOV(p, dst[i], suboffset(interp[i],3)); /* TODO: optimize away like other moves */
+ }
+ }
+}
static void emit_alu1( struct brw_compile *p,
@@ -280,6 +278,7 @@ static void emit_alu1( struct brw_compile *p,
brw_set_saturate(p, 0);
}
+
static void emit_alu2( struct brw_compile *p,
struct brw_instruction *(*func)(struct brw_compile *,
struct brw_reg,
@@ -351,6 +350,7 @@ static void emit_lrp( struct brw_compile *p,
}
}
}
+
static void emit_sop( struct brw_compile *p,
const struct brw_reg *dst,
GLuint mask,
@@ -376,7 +376,7 @@ static void emit_slt( struct brw_compile *p,
const struct brw_reg *arg0,
const struct brw_reg *arg1 )
{
- emit_sop(p, dst, mask, BRW_CONDITIONAL_L, arg0, arg1);
+ emit_sop(p, dst, mask, BRW_CONDITIONAL_L, arg0, arg1);
}
static void emit_sle( struct brw_compile *p,
@@ -385,7 +385,7 @@ static void emit_sle( struct brw_compile *p,
const struct brw_reg *arg0,
const struct brw_reg *arg1 )
{
- emit_sop(p, dst, mask, BRW_CONDITIONAL_LE, arg0, arg1);
+ emit_sop(p, dst, mask, BRW_CONDITIONAL_LE, arg0, arg1);
}
static void emit_sgt( struct brw_compile *p,
@@ -394,7 +394,7 @@ static void emit_sgt( struct brw_compile *p,
const struct brw_reg *arg0,
const struct brw_reg *arg1 )
{
- emit_sop(p, dst, mask, BRW_CONDITIONAL_G, arg0, arg1);
+ emit_sop(p, dst, mask, BRW_CONDITIONAL_G, arg0, arg1);
}
static void emit_sge( struct brw_compile *p,
@@ -403,7 +403,7 @@ static void emit_sge( struct brw_compile *p,
const struct brw_reg *arg0,
const struct brw_reg *arg1 )
{
- emit_sop(p, dst, mask, BRW_CONDITIONAL_GE, arg0, arg1);
+ emit_sop(p, dst, mask, BRW_CONDITIONAL_GE, arg0, arg1);
}
static void emit_seq( struct brw_compile *p,
@@ -412,7 +412,7 @@ static void emit_seq( struct brw_compile *p,
const struct brw_reg *arg0,
const struct brw_reg *arg1 )
{
- emit_sop(p, dst, mask, BRW_CONDITIONAL_EQ, arg0, arg1);
+ emit_sop(p, dst, mask, BRW_CONDITIONAL_EQ, arg0, arg1);
}
static void emit_sne( struct brw_compile *p,
@@ -421,7 +421,7 @@ static void emit_sne( struct brw_compile *p,
const struct brw_reg *arg0,
const struct brw_reg *arg1 )
{
- emit_sop(p, dst, mask, BRW_CONDITIONAL_NEQ, arg0, arg1);
+ emit_sop(p, dst, mask, BRW_CONDITIONAL_NEQ, arg0, arg1);
}
static void emit_cmp( struct brw_compile *p,
@@ -505,7 +505,7 @@ static void emit_dp3( struct brw_compile *p,
const struct brw_reg *arg1 )
{
if (!(mask & WRITEMASK_XYZW))
- return; /* Do not emit dead code*/
+ return; /* Do not emit dead code */
assert((mask & WRITEMASK_XYZW) == WRITEMASK_X);
@@ -525,7 +525,7 @@ static void emit_dp4( struct brw_compile *p,
const struct brw_reg *arg1 )
{
if (!(mask & WRITEMASK_XYZW))
- return; /* Do not emit dead code*/
+ return; /* Do not emit dead code */
assert((mask & WRITEMASK_XYZW) == WRITEMASK_X);
@@ -546,7 +546,7 @@ static void emit_dph( struct brw_compile *p,
const struct brw_reg *arg1 )
{
if (!(mask & WRITEMASK_XYZW))
- return; /* Do not emit dead code*/
+ return; /* Do not emit dead code */
assert((mask & WRITEMASK_XYZW) == WRITEMASK_X);
@@ -592,7 +592,7 @@ static void emit_math1( struct brw_compile *p,
const struct brw_reg *arg0 )
{
if (!(mask & WRITEMASK_XYZW))
- return; /* Do not emit dead code*/
+ return; /* Do not emit dead code */
//assert((mask & WRITEMASK_XYZW) == WRITEMASK_X ||
// function == BRW_MATH_FUNCTION_SINCOS);
@@ -619,7 +619,7 @@ static void emit_math2( struct brw_compile *p,
const struct brw_reg *arg1)
{
if (!(mask & WRITEMASK_XYZW))
- return; /* Do not emit dead code*/
+ return; /* Do not emit dead code */
assert((mask & WRITEMASK_XYZW) == WRITEMASK_X);
@@ -760,7 +760,6 @@ static void emit_txb( struct brw_wm_compile *c,
brw_MOV(p, brw_message_reg(8), arg[3]);
msgLength = 9;
-
brw_SAMPLE(p,
retype(vec16(dst[0]), BRW_REGISTER_TYPE_UW),
1,
@@ -772,7 +771,6 @@ static void emit_txb( struct brw_wm_compile *c,
8, /* responseLength */
msgLength,
0);
-
}
@@ -823,7 +821,6 @@ static void emit_kil( struct brw_wm_compile *c,
struct brw_reg r0uw = retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UW);
GLuint i;
-
/* XXX - usually won't need 4 compares!
*/
for (i = 0; i < 4; i++) {
@@ -836,6 +833,7 @@ static void emit_kil( struct brw_wm_compile *c,
}
}
+
static void fire_fb_write( struct brw_wm_compile *c,
GLuint base_reg,
GLuint nr,
@@ -869,6 +867,7 @@ static void fire_fb_write( struct brw_wm_compile *c,
eot);
}
+
static void emit_aa( struct brw_wm_compile *c,
struct brw_reg *arg1,
GLuint reg )
@@ -962,7 +961,6 @@ static void emit_fb_write( struct brw_wm_compile *c,
nr += 2;
}
-
if (!c->key.runtime_check_aads_emit) {
if (c->key.aa_dest_stencil_reg)
emit_aa(c, arg1, 2);
@@ -996,8 +994,6 @@ static void emit_fb_write( struct brw_wm_compile *c,
}
-
-
/* Post-fragment-program processing. Send the results to the
* framebuffer.
*/
@@ -1022,6 +1018,7 @@ static void emit_spill( struct brw_wm_compile *c,
slot);
}
+
static void emit_unspill( struct brw_wm_compile *c,
struct brw_reg reg,
GLuint slot )
@@ -1047,7 +1044,6 @@ static void emit_unspill( struct brw_wm_compile *c,
}
-
/**
* Retrieve upto 4 GEN4 register pairs for the given wm reg:
*/
@@ -1073,6 +1069,7 @@ static void get_argument_regs( struct brw_wm_compile *c,
}
}
+
static void spill_values( struct brw_wm_compile *c,
struct brw_wm_value *values,
GLuint nr )
@@ -1085,7 +1082,6 @@ static void spill_values( struct brw_wm_compile *c,
}
-
/* Emit the fragment program instructions here.
*/
void brw_wm_emit( struct brw_wm_compile *c )
@@ -1176,7 +1172,7 @@ void brw_wm_emit( struct brw_wm_compile *c )
emit_alu1(p, brw_RNDD, dst, dst_flags, args[0]);
break;
- case OPCODE_DP3: /* */
+ case OPCODE_DP3:
emit_dp3(p, dst, dst_flags, args[0], args[1]);
break;
@@ -1188,7 +1184,7 @@ void brw_wm_emit( struct brw_wm_compile *c )
emit_dph(p, dst, dst_flags, args[0], args[1]);
break;
- case OPCODE_LRP: /* */
+ case OPCODE_LRP:
emit_lrp(p, dst, dst_flags, args[0], args[1], args[2]);
break;
@@ -1315,8 +1311,3 @@ void brw_wm_emit( struct brw_wm_compile *c )
inst->dst[i]->spill_slot);
}
}
-
-
-
-
-
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