Mesa (master): i965: Tell the shader compiler when we expect depth writes for gen6.
Eric Anholt
anholt at kemper.freedesktop.org
Tue Oct 19 17:53:23 UTC 2010
Module: Mesa
Branch: master
Commit: 32573792de559c4dbad766a7cfcf02ea71f5047f
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=32573792de559c4dbad766a7cfcf02ea71f5047f
Author: Eric Anholt <eric at anholt.net>
Date: Tue Oct 19 09:44:20 2010 -0700
i965: Tell the shader compiler when we expect depth writes for gen6.
This fixes hangs in some Z-writes-in-shaders tests, though other
pieces don't come out correctly.
Bug #30392: hang in fbo-fblit-d24s8. (still fails with bad color drawn
to some targets)
---
src/mesa/drivers/dri/i965/brw_wm.c | 6 ++++++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index 7aad6ca..f2ce756 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -318,6 +318,12 @@ static void brw_wm_populate_key( struct brw_context *brw,
/* R31: MSAA position offsets. */
/* R32-: bary for 32-pixel. */
/* R58-59: interp W for 32-pixel. */
+
+ if (fp->program.Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
+ key->source_depth_to_render_target = GL_TRUE;
+ key->computes_depth = GL_TRUE;
+ }
+
} else {
brw_wm_lookup_iz(intel,
line_aa,
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