Mesa (master): i965: Remove the gen6 emit_mi_flushes I sprinkled around the driver.
Eric Anholt
anholt at kemper.freedesktop.org
Tue Oct 19 17:53:23 UTC 2010
Module: Mesa
Branch: master
Commit: 2595589f1df351895bc5b1a92f19e995a19da15b
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2595589f1df351895bc5b1a92f19e995a19da15b
Author: Eric Anholt <eric at anholt.net>
Date: Tue Oct 19 09:50:44 2010 -0700
i965: Remove the gen6 emit_mi_flushes I sprinkled around the driver.
These were for debugging in bringup. Now that relatively complicated
apps are working, they haven't helped debug anything in quite a while.
---
src/mesa/drivers/dri/i965/brw_misc_state.c | 2 --
src/mesa/drivers/dri/i965/gen6_cc.c | 2 --
src/mesa/drivers/dri/i965/gen6_clip_state.c | 2 --
src/mesa/drivers/dri/i965/gen6_gs_state.c | 2 --
src/mesa/drivers/dri/i965/gen6_sampler_state.c | 2 --
src/mesa/drivers/dri/i965/gen6_sf_state.c | 2 --
src/mesa/drivers/dri/i965/gen6_urb.c | 4 ----
src/mesa/drivers/dri/i965/gen6_viewport_state.c | 2 --
src/mesa/drivers/dri/i965/gen6_vs_state.c | 4 ----
src/mesa/drivers/dri/i965/gen6_wm_state.c | 4 ----
10 files changed, 0 insertions(+), 26 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index 27d161d..24041e5 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -515,8 +515,6 @@ static void upload_invarient_state( struct brw_context *brw )
if (intel->gen >= 6) {
int i;
- intel_batchbuffer_emit_mi_flush(intel->batch);
-
BEGIN_BATCH(3);
OUT_BATCH(CMD_3D_MULTISAMPLE << 16 | (3 - 2));
OUT_BATCH(MS_PIXEL_LOCATION_CENTER |
diff --git a/src/mesa/drivers/dri/i965/gen6_cc.c b/src/mesa/drivers/dri/i965/gen6_cc.c
index 4a98e26..0d6e923 100644
--- a/src/mesa/drivers/dri/i965/gen6_cc.c
+++ b/src/mesa/drivers/dri/i965/gen6_cc.c
@@ -271,8 +271,6 @@ static void upload_cc_state_pointers(struct brw_context *brw)
OUT_RELOC(brw->cc.depth_stencil_state_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 1);
OUT_RELOC(brw->cc.state_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 1);
ADVANCE_BATCH();
-
- intel_batchbuffer_emit_mi_flush(intel->batch);
}
diff --git a/src/mesa/drivers/dri/i965/gen6_clip_state.c b/src/mesa/drivers/dri/i965/gen6_clip_state.c
index bf53146..cd2ac9d 100644
--- a/src/mesa/drivers/dri/i965/gen6_clip_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_clip_state.c
@@ -61,8 +61,6 @@ upload_clip_state(struct brw_context *brw)
provoking);
OUT_BATCH(GEN6_CLIP_FORCE_ZERO_RTAINDEX);
ADVANCE_BATCH();
-
- intel_batchbuffer_emit_mi_flush(intel->batch);
}
const struct brw_tracked_state gen6_clip_state = {
diff --git a/src/mesa/drivers/dri/i965/gen6_gs_state.c b/src/mesa/drivers/dri/i965/gen6_gs_state.c
index cefc93b..6127b91 100644
--- a/src/mesa/drivers/dri/i965/gen6_gs_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_gs_state.c
@@ -44,8 +44,6 @@ upload_gs_state(struct brw_context *brw)
OUT_BATCH(0);
ADVANCE_BATCH();
- intel_batchbuffer_emit_mi_flush(intel->batch);
-
if (brw->gs.prog_bo) {
BEGIN_BATCH(7);
OUT_BATCH(CMD_3D_GS_STATE << 16 | (7 - 2));
diff --git a/src/mesa/drivers/dri/i965/gen6_sampler_state.c b/src/mesa/drivers/dri/i965/gen6_sampler_state.c
index ab8e751..fc5d391 100644
--- a/src/mesa/drivers/dri/i965/gen6_sampler_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_sampler_state.c
@@ -49,8 +49,6 @@ upload_sampler_state_pointers(struct brw_context *brw)
OUT_BATCH(0);
ADVANCE_BATCH();
-
- intel_batchbuffer_emit_mi_flush(intel->batch);
}
diff --git a/src/mesa/drivers/dri/i965/gen6_sf_state.c b/src/mesa/drivers/dri/i965/gen6_sf_state.c
index 377b3a4..55a70be 100644
--- a/src/mesa/drivers/dri/i965/gen6_sf_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_sf_state.c
@@ -187,8 +187,6 @@ upload_sf_state(struct brw_context *brw)
OUT_BATCH(0); /* wrapshortest enables 0-7 */
OUT_BATCH(0); /* wrapshortest enables 8-15 */
ADVANCE_BATCH();
-
- intel_batchbuffer_emit_mi_flush(intel->batch);
}
const struct brw_tracked_state gen6_sf_state = {
diff --git a/src/mesa/drivers/dri/i965/gen6_urb.c b/src/mesa/drivers/dri/i965/gen6_urb.c
index 5445e40..0a264fc 100644
--- a/src/mesa/drivers/dri/i965/gen6_urb.c
+++ b/src/mesa/drivers/dri/i965/gen6_urb.c
@@ -59,8 +59,6 @@ upload_urb(struct brw_context *brw)
/* GS requirement */
assert(!brw->gs.prog_bo || brw->urb.vs_size < 5);
- intel_batchbuffer_emit_mi_flush(intel->batch);
-
BEGIN_BATCH(3);
OUT_BATCH(CMD_URB << 16 | (3 - 2));
OUT_BATCH(((brw->urb.vs_size - 1) << GEN6_URB_VS_SIZE_SHIFT) |
@@ -68,8 +66,6 @@ upload_urb(struct brw_context *brw)
OUT_BATCH(((brw->urb.vs_size - 1) << GEN6_URB_GS_SIZE_SHIFT) |
((brw->urb.nr_gs_entries) << GEN6_URB_GS_ENTRIES_SHIFT));
ADVANCE_BATCH();
-
- intel_batchbuffer_emit_mi_flush(intel->batch);
}
const struct brw_tracked_state gen6_urb = {
diff --git a/src/mesa/drivers/dri/i965/gen6_viewport_state.c b/src/mesa/drivers/dri/i965/gen6_viewport_state.c
index b515e77..d691bbe 100644
--- a/src/mesa/drivers/dri/i965/gen6_viewport_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_viewport_state.c
@@ -125,8 +125,6 @@ static void upload_viewport_state_pointers(struct brw_context *brw)
OUT_RELOC(brw->sf.vp_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
OUT_RELOC(brw->cc.vp_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
ADVANCE_BATCH();
-
- intel_batchbuffer_emit_mi_flush(intel->batch);
}
const struct brw_tracked_state gen6_viewport_state = {
diff --git a/src/mesa/drivers/dri/i965/gen6_vs_state.c b/src/mesa/drivers/dri/i965/gen6_vs_state.c
index 3eca4e9..304eadd 100644
--- a/src/mesa/drivers/dri/i965/gen6_vs_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_vs_state.c
@@ -88,8 +88,6 @@ upload_vs_state(struct brw_context *brw)
drm_intel_bo_unreference(constant_bo);
}
- intel_batchbuffer_emit_mi_flush(intel->batch);
-
BEGIN_BATCH(6);
OUT_BATCH(CMD_3D_VS_STATE << 16 | (6 - 2));
OUT_RELOC(brw->vs.prog_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
@@ -103,8 +101,6 @@ upload_vs_state(struct brw_context *brw)
GEN6_VS_STATISTICS_ENABLE |
GEN6_VS_ENABLE);
ADVANCE_BATCH();
-
- intel_batchbuffer_emit_mi_flush(intel->batch);
}
const struct brw_tracked_state gen6_vs_state = {
diff --git a/src/mesa/drivers/dri/i965/gen6_wm_state.c b/src/mesa/drivers/dri/i965/gen6_wm_state.c
index 5810266..7ef99ee 100644
--- a/src/mesa/drivers/dri/i965/gen6_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_wm_state.c
@@ -109,8 +109,6 @@ upload_wm_state(struct brw_context *brw)
ADVANCE_BATCH();
}
- intel_batchbuffer_emit_mi_flush(intel->batch);
-
dw2 = dw4 = dw5 = dw6 = 0;
dw4 |= GEN6_WM_STATISTICS_ENABLE;
dw5 |= GEN6_WM_LINE_AA_WIDTH_1_0;
@@ -167,8 +165,6 @@ upload_wm_state(struct brw_context *brw)
OUT_BATCH(0); /* kernel 1 pointer */
OUT_BATCH(0); /* kernel 2 pointer */
ADVANCE_BATCH();
-
- intel_batchbuffer_emit_mi_flush(intel->batch);
}
const struct brw_tracked_state gen6_wm_state = {
More information about the mesa-commit
mailing list