Mesa (master): ir_to_mesa: Only compare vector_elements present for any_nequal/all_equal

[Eric Anholt]

Module: Mesa
Branch: master
Commit: eaa6bf59db68f97fa32c3395eb4aa6e589f34b26
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=eaa6bf59db68f97fa32c3395eb4aa6e589f34b26

Author: Eric Anholt <eric at anholt.net>
Date:   Wed Sep 22 13:07:57 2010 -0700

ir_to_mesa: Only compare vector_elements present for any_nequal/all_equal

Fixes: glsl-mat-from-int-ctor-03

---

 src/mesa/program/ir_to_mesa.cpp |   20 ++++++++++++++++++--
 1 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp
index de0cb1a..93b6c30 100644
--- a/src/mesa/program/ir_to_mesa.cpp
+++ b/src/mesa/program/ir_to_mesa.cpp
@@ -1096,6 +1096,12 @@ ir_to_mesa_visitor::visit(ir_expression *ir)
       assert(!ir->operands[operand]->type->is_matrix());
    }
 
+   int vector_elements = ir->operands[0]->type->vector_elements;
+   if (ir->operands[1]) {
+      vector_elements = MAX2(vector_elements,
+			     ir->operands[1]->type->vector_elements);
+   }
+
    this->result.file = PROGRAM_UNDEFINED;
 
    /* Storage for our result.  Ideally for an assignment we'd be using
@@ -1204,7 +1210,12 @@ ir_to_mesa_visitor::visit(ir_expression *ir)
 	 ir_to_mesa_src_reg temp = get_temp(glsl_type::vec4_type);
 	 ir_to_mesa_emit_op2(ir, OPCODE_SNE,
 			     ir_to_mesa_dst_reg_from_src(temp), op[0], op[1]);
-	 ir_to_mesa_emit_op2(ir, OPCODE_DP4, result_dst, temp, temp);
+	 if (vector_elements == 4)
+	    ir_to_mesa_emit_op2(ir, OPCODE_DP4, result_dst, temp, temp);
+	 else if (vector_elements == 3)
+	    ir_to_mesa_emit_op2(ir, OPCODE_DP3, result_dst, temp, temp);
+	 else
+	    ir_to_mesa_emit_op2(ir, OPCODE_DP2, result_dst, temp, temp);
 	 ir_to_mesa_emit_op2(ir, OPCODE_SEQ,
 			     result_dst, result_src, src_reg_for_float(0.0));
       } else {
@@ -1218,7 +1229,12 @@ ir_to_mesa_visitor::visit(ir_expression *ir)
 	 ir_to_mesa_src_reg temp = get_temp(glsl_type::vec4_type);
 	 ir_to_mesa_emit_op2(ir, OPCODE_SNE,
 			     ir_to_mesa_dst_reg_from_src(temp), op[0], op[1]);
-	 ir_to_mesa_emit_op2(ir, OPCODE_DP4, result_dst, temp, temp);
+	 if (vector_elements == 4)
+	    ir_to_mesa_emit_op2(ir, OPCODE_DP4, result_dst, temp, temp);
+	 else if (vector_elements == 3)
+	    ir_to_mesa_emit_op2(ir, OPCODE_DP3, result_dst, temp, temp);
+	 else
+	    ir_to_mesa_emit_op2(ir, OPCODE_DP2, result_dst, temp, temp);
 	 ir_to_mesa_emit_op2(ir, OPCODE_SNE,
 			     result_dst, result_src, src_reg_for_float(0.0));
       } else {