Mesa (master): radeon/llvm: Use correct instruction for moving immediates
Tom Stellard
tstellar at kemper.freedesktop.org
Thu Aug 23 21:49:09 UTC 2012
Module: Mesa
Branch: master
Commit: 1bd7b29a661a336dbc96c160197c739657991ef3
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1bd7b29a661a336dbc96c160197c739657991ef3
Author: Tom Stellard <thomas.stellard at amd.com>
Date: Thu Aug 23 21:22:48 2012 +0000
radeon/llvm: Use correct instruction for moving immediates
This should fix an assertion failure that was happening in some compute
shaders.
---
src/gallium/drivers/radeon/R600ISelLowering.cpp | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/src/gallium/drivers/radeon/R600ISelLowering.cpp b/src/gallium/drivers/radeon/R600ISelLowering.cpp
index afa80c5..376ac70 100644
--- a/src/gallium/drivers/radeon/R600ISelLowering.cpp
+++ b/src/gallium/drivers/radeon/R600ISelLowering.cpp
@@ -125,7 +125,8 @@ MachineBasicBlock * R600TargetLowering::EmitInstrWithCustomInserter(
// XXX In theory, we should be able to pass ShiftValue directly to
// the LSHR_eg instruction as an inline literal, but I tried doing it
// this way and it didn't produce the correct results.
- BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::MOV), ShiftValue)
+ BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::MOV_IMM_I32),
+ ShiftValue)
.addReg(AMDGPU::ALU_LITERAL_X)
.addReg(AMDGPU::PRED_SEL_OFF)
.addImm(2);
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