Mesa (master): i965/gen7: Add the ability to send URB_WRITE_OWORD messages.

[Paul Berry]

Module: Mesa
Branch: master
Commit: a74af8148ded7417a46be5a9e300f2c6dfed4bed
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a74af8148ded7417a46be5a9e300f2c6dfed4bed

Author: Paul Berry <stereotype441 at gmail.com>
Date:   Sun Aug 11 20:29:34 2013 -0700

i965/gen7: Add the ability to send URB_WRITE_OWORD messages.

Previously, brw_urb_WRITE() would always generate a URB_WRITE_HWORD
message, we always wanted to write data to the URB in pairs of varying
slots or larger (an HWORD is 32 bytes, which is 2 varying slots).

In order to support geometry shader EndPrimitive functionality, we'll
need the ability to write to just a single OWORD (16 byte) slot, since
we'll only be outputting 32 of the control data bits at a time.  So
this patch adds a flag that will cause brw_urb_WRITE to generate a
URB_WRITE_OWORD message.

Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

---

 src/mesa/drivers/dri/i965/brw_defines.h |    3 ++-
 src/mesa/drivers/dri/i965/brw_eu.h      |    8 ++++++++
 src/mesa/drivers/dri/i965/brw_eu_emit.c |    7 ++++++-
 3 files changed, 16 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 85e414d..007e7fb 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1172,7 +1172,8 @@ enum brw_message_target {
 #define BRW_MATH_DATA_VECTOR  0
 #define BRW_MATH_DATA_SCALAR  1
 
-#define BRW_URB_OPCODE_WRITE  0
+#define BRW_URB_OPCODE_WRITE_HWORD  0
+#define BRW_URB_OPCODE_WRITE_OWORD  1
 
 #define BRW_URB_SWIZZLE_NONE          0
 #define BRW_URB_SWIZZLE_INTERLEAVE    1
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
index 4d47cdd..720bc74 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -264,6 +264,14 @@ enum brw_urb_write_flags {
    BRW_URB_WRITE_USE_CHANNEL_MASKS = 0x20,
 
    /**
+    * Indicates that the data should be sent to the URB using the
+    * URB_WRITE_OWORD message rather than URB_WRITE_HWORD (gen == 7).  This
+    * causes offsets to be interpreted as multiples of an OWORD instead of an
+    * HWORD, and only allows one OWORD to be written.
+    */
+   BRW_URB_WRITE_OWORD = 0x40,
+
+   /**
     * Convenient combination of flags: end the thread while simultaneously
     * marking the given URB entry as complete.
     */
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index a99a354..cce8752 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -529,7 +529,12 @@ static void brw_set_urb_message( struct brw_compile *p,
 			      msg_length, response_length, true,
                               flags & BRW_URB_WRITE_EOT);
    if (brw->gen == 7) {
-      insn->bits3.urb_gen7.opcode = 0;	/* URB_WRITE_HWORD */
+      if (flags & BRW_URB_WRITE_OWORD) {
+         assert(msg_length == 2); /* header + one OWORD of data */
+         insn->bits3.urb_gen7.opcode = BRW_URB_OPCODE_WRITE_OWORD;
+      } else {
+         insn->bits3.urb_gen7.opcode = BRW_URB_OPCODE_WRITE_HWORD;
+      }
       insn->bits3.urb_gen7.offset = offset;
       assert(swizzle_control != BRW_URB_SWIZZLE_TRANSPOSE);
       insn->bits3.urb_gen7.swizzle_control = swizzle_control;