Mesa (master): i965: Implement a brw_load_register_mem helper function.
Kenneth Graunke
kwg at kemper.freedesktop.org
Fri Feb 7 20:33:41 UTC 2014
Module: Mesa
Branch: master
Commit: b7c435b26124464f18672acd17416ddd840d306b
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b7c435b26124464f18672acd17416ddd840d306b
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Jan 29 20:43:49 2014 -0800
i965: Implement a brw_load_register_mem helper function.
This saves some boilerplate and hides the OUT_RELOC/OUT_RELOC64
distinction.
Placing the function in intel_batchbuffer.c is rather arbitrary; there
wasn't really an obvious place for it.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Chris Forbes <chrisf at ijw.co.nz>
---
src/mesa/drivers/dri/i965/brw_context.h | 7 +++++++
src/mesa/drivers/dri/i965/intel_batchbuffer.c | 25 +++++++++++++++++++++++++
2 files changed, 32 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index bee39fa..98e90e2 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1575,6 +1575,13 @@ void brw_write_depth_count(struct brw_context *brw, drm_intel_bo *bo, int idx);
void brw_store_register_mem64(struct brw_context *brw,
drm_intel_bo *bo, uint32_t reg, int idx);
+/** intel_batchbuffer.c */
+void brw_load_register_mem(struct brw_context *brw,
+ uint32_t reg,
+ drm_intel_bo *bo,
+ uint32_t read_domains, uint32_t write_domain,
+ uint32_t offset);
+
/*======================================================================
* brw_state_dump.c
*/
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index fbbd527..4624268 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -661,3 +661,28 @@ intel_batchbuffer_emit_mi_flush(struct brw_context *brw)
brw_emit_pipe_control_flush(brw, flags);
}
}
+
+void
+brw_load_register_mem(struct brw_context *brw,
+ uint32_t reg,
+ drm_intel_bo *bo,
+ uint32_t read_domains, uint32_t write_domain,
+ uint32_t offset)
+{
+ /* MI_LOAD_REGISTER_MEM only exists on Gen7+. */
+ assert(brw->gen >= 7);
+
+ if (brw->gen >= 8) {
+ BEGIN_BATCH(4);
+ OUT_BATCH(GEN7_MI_LOAD_REGISTER_MEM | (4 - 2));
+ OUT_BATCH(reg);
+ OUT_RELOC64(bo, read_domains, write_domain, offset);
+ ADVANCE_BATCH();
+ } else {
+ BEGIN_BATCH(3);
+ OUT_BATCH(GEN7_MI_LOAD_REGISTER_MEM | (3 - 2));
+ OUT_BATCH(reg);
+ OUT_RELOC(bo, read_domains, write_domain, offset);
+ ADVANCE_BATCH();
+ }
+}
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