Mesa (master): 23 new commits
Topi Pohjolainen
tpohjola at kemper.freedesktop.org
Thu Jan 23 07:04:59 UTC 2014
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bda88f121b36ffb5b8276a3d25791d2c5f9e1fd6
Author: Topi Pohjolainen <topi.pohjolainen at intel.com>
Date: Tue Dec 10 15:12:30 2013 +0200
i965/blorp: switch eu-emitter to use FS IR and fs_generator
No regressions on IVB (piglit quick + unit tests).
v2 (Paul):
- no need to patch the unit tests anymore. Original logic
was altered and unit tests updated to match the
fs-generator
- lrp emission moves from the blorp compiler core into the
emitter here (previously there was a separate refactoring
patch which is not really needed anymore as the lrp logic
got refactored when the original lrp logic got fixed).
- pass 'BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX' to the
generator in fs_inst::target instead of hardcoding it
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8f3e5363ade53f300036660ff49b367fb282cc06
Author: Topi Pohjolainen <topi.pohjolainen at intel.com>
Date: Tue Dec 17 16:39:16 2013 +0200
i965/fs: add support for BRW_OPCODE_AVG in fs_generator
Needed for compiling blorp blit programs.
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9927d7ae6883e2a5569130ed48ca0537ca3e07c3
Author: Topi Pohjolainen <topi.pohjolainen at intel.com>
Date: Tue Dec 17 14:00:50 2013 +0200
i965/fs: introduce blorp specific rt-write for fs_generator
The compiler for blorp programs likes to emit instructions for
the message construction itself meaning that the generator needs
to skip any such when blorp programs are translated for the hw.
In addition, the binding table control is special for blorp
programs and the generator does not need to update the binding
tables associated with the compiler bookkeeping (this in fact
gets thrown away as the blorp compiler sets the program data
in its own way).
v2 (Paul): do not hardcode the binding table index but use
fs_inst::target instead.
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=85fc724df5403ffb7d8eac071962824d9303d24f
Author: Topi Pohjolainen <topi.pohjolainen at intel.com>
Date: Wed Dec 11 10:58:38 2013 +0200
i965/fs: allow unit tests to dump the final patched assembly
Unit tests comparing generated blorp programs to known good need
to have the dump in designated file instead of in default
standard output. The comparison also expects the jump counters
of if-else-instructions to be correctly set and hence the dump
needs to be taken _after_ 'patch_IF_ELSE()' is run (the default
dump of the fs_generator does this before).
v2 (Paul): dropped the redundant 'dump_enabled' argument
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=757b4cf011ac832895ad2ee470587d26f3e4c6d3
Author: Topi Pohjolainen <topi.pohjolainen at intel.com>
Date: Mon Dec 2 10:48:59 2013 +0200
i965/blorp: wrap brw_IF/ELSE/ENDIF() into eu-emitter
v2 (Paul): renamed emit_if() to emit_cmp_if()
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8c0030678aa39b4e2c080887023818eed6c1f5a0
Author: Topi Pohjolainen <topi.pohjolainen at intel.com>
Date: Fri Nov 29 13:29:56 2013 +0200
i965/blorp: wrap RNDD (/brw_RNDD(&func, /emit_rndd(/)
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=44524cb42f9a2ce6571b8ca344cd5a7c6afd5702
Author: Topi Pohjolainen <topi.pohjolainen at intel.com>
Date: Fri Nov 29 13:27:58 2013 +0200
i965/blorp: wrap FRC (/brw_FRC(&func, /emit_frc(/)
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f9d875926e47e30c8c57ee3e0491f5d720789d6c
Author: Topi Pohjolainen <topi.pohjolainen at intel.com>
Date: Fri Nov 29 13:20:11 2013 +0200
i965/blorp: wrap MUL (/brw_MUL(&func, /emit_mul(/)
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bbab8068d2adb2dd9c09882cc8a19e62cf0ea8f0
Author: Topi Pohjolainen <topi.pohjolainen at intel.com>
Date: Fri Nov 29 13:05:57 2013 +0200
i965/blorp: wrap OR (/brw_OR(&func, /emit_or(/)
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=de6ea2fe251b9c0039472f7ac1ad023044cde77d
Author: Topi Pohjolainen <topi.pohjolainen at intel.com>
Date: Fri Nov 29 13:02:32 2013 +0200
i965/blorp: wrap SHL (/brw_SHL(&func, /emit_shl(/)
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d256a5f8439e928943b940a3fcee7042c3bd40df
Author: Topi Pohjolainen <topi.pohjolainen at intel.com>
Date: Fri Nov 29 12:59:42 2013 +0200
i965/blorp: wrap SHR (/brw_SHR(&func, /emit_shr(/)
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0df1f5ce4e247b993c88c4a838fbda0d3ed72202
Author: Topi Pohjolainen <topi.pohjolainen at intel.com>
Date: Fri Nov 29 12:32:03 2013 +0200
i965/blorp: wrap ADD (/brw_ADD(&func, /emit_add(/)
In addition, the special case requiring explicit execution size
control is wrapped manually.
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c777e72bd8bb3c9e80733d28950c7b55928ded4f
Author: Topi Pohjolainen <topi.pohjolainen at intel.com>
Date: Fri Nov 29 12:27:23 2013 +0200
i965/blorp: wrap AND (/brw_AND(&func, /emit_and(/)
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8b5fd9804399bd46cd6c326e00cfd15822b6be72
Author: Topi Pohjolainen <topi.pohjolainen at intel.com>
Date: Fri Nov 29 12:17:38 2013 +0200
i965/blorp: wrap MOV (/brw_MOV(&func, /emit_mov(/)
In addition, the two special cases requiring explicit execution
size control are wrapped manually.
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=250494f742b7301876c6426ab8c77d541ce5b57f
Author: Topi Pohjolainen <topi.pohjolainen at intel.com>
Date: Sat Nov 30 17:11:41 2013 +0200
i965/blorp: wrap emission of if-equal-assignment
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9e9617f797a59ccfb7e7173d2ec5cb8fec38b859
Author: Topi Pohjolainen <topi.pohjolainen at intel.com>
Date: Sat Nov 30 17:06:19 2013 +0200
i965/blorp: wrap emission of conditional assignment
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8c42ade7a49d40a44cb7e369cf789db071c3855e
Author: Topi Pohjolainen <topi.pohjolainen at intel.com>
Date: Mon Dec 2 14:56:49 2013 +0200
i965/blorp: move emission of sample combining into eu-emitter
v2 (Paul): pass the combining opcode as an argument to emit_combine().
This keeps manual_blend_average() selfcontained
documentation wise.
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ecf795615c973d546737c5b0dd6abb846e7d3aad
Author: Topi Pohjolainen <topi.pohjolainen at intel.com>
Date: Mon Dec 2 14:12:39 2013 +0200
i965/blorp: move emission of rt-write into eu-emitter
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=aac6bace9f428ccf317095205491ae3278ce12e0
Author: Topi Pohjolainen <topi.pohjolainen at intel.com>
Date: Mon Dec 2 14:01:54 2013 +0200
i965/blorp: move emission of texture lookup into eu-emitter
Resolving of the hardware message type is moved into the
emitter also in preparation for switching to use fs_generator.
The generator wants to translate the high level op-code into
the message type and hence the emitter needs to know the
original op-code.
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=41d397f22bd1881856cbb94dcc84336f3b51dac0
Author: Topi Pohjolainen <topi.pohjolainen at intel.com>
Date: Tue Dec 10 16:38:15 2013 +0200
i965/fs: introduce non-compressed equivalent of tex_cms
v2: introduces 'SHADER_OPCODE_TXF_UMS' also for gen8
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ce527a6722491fa7d696266d5dec13f0b72bf8e8
Author: Topi Pohjolainen <topi.pohjolainen at intel.com>
Date: Tue Dec 10 16:36:31 2013 +0200
i965: rename tex_ms to tex_cms
Prepares for the introduction of non-compressed multi-sampled
lookup used in the blorp programs.
v2: now also taking into account gen8
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3c44e43357caf21ef90963508c4477199a0c3139
Author: Topi Pohjolainen <topi.pohjolainen at intel.com>
Date: Mon Dec 2 11:09:19 2013 +0200
i965/blorp: move emission of pixel kill into eu-emitter
The combination of four separate comparison operations and
and the masked "and" require special treatment when moving
to FS LIR.
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f031487dcb77f2fe053d0d39d32e443c7b2207dc
Author: Topi Pohjolainen <topi.pohjolainen at intel.com>
Date: Fri Nov 29 11:57:15 2013 +0200
i965/blorp: introduce separate eu-emitter for blit compiler
Prepares for presenting blorp blit programs using FS IR that
allows EU-assembly generation using i965 glsl-compiler
backend (fs_generator).
v2: rebased on top of endif-jump counter fix (moving the
added brw_set_uip_jip() into the emitter)
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
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