Mesa (master): util: don't try to emit half-float intrinsics if avx isn' t available

[Roland Scheidegger]

Module: Mesa
Branch: master
Commit: f2c39dd0e19e83dac922878b00a4b871c839b609
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f2c39dd0e19e83dac922878b00a4b871c839b609

Author: Roland Scheidegger <sroland at vmware.com>
Date:   Fri Sep 19 16:56:04 2014 +0200

util: don't try to emit half-float intrinsics if avx isn't available

These instructions only have vex encodings, thus they can't be used without
avx. (Technically, one can still use avx-128 if avx isn't available because
the environment doesn't store the ymm registers, however I don't think llvm
can.)

Reviewed-by: Jose Fonseca <jfonseca at vmware.com>

---

 src/gallium/auxiliary/util/u_cpu_detect.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/auxiliary/util/u_cpu_detect.c b/src/gallium/auxiliary/util/u_cpu_detect.c
index d2d1313..5d9db59 100644
--- a/src/gallium/auxiliary/util/u_cpu_detect.c
+++ b/src/gallium/auxiliary/util/u_cpu_detect.c
@@ -369,7 +369,7 @@ util_cpu_detect(void)
          util_cpu_caps.has_avx    = ((regs2[2] >> 28) & 1) && // AVX
                                     ((regs2[2] >> 27) & 1) && // OSXSAVE
                                     ((xgetbv() & 6) == 6);    // XMM & YMM
-         util_cpu_caps.has_f16c   = (regs2[2] >> 29) & 1;
+         util_cpu_caps.has_f16c   = ((regs2[2] >> 29) & 1) && util_cpu_caps.has_avx;
          util_cpu_caps.has_mmx2   = util_cpu_caps.has_sse; /* SSE cpus supports mmxext too */
 #if defined(PIPE_ARCH_X86_64)
          util_cpu_caps.has_daz = 1;