Mesa (master): nvc0/ir: patch vertex count is stored in the upper bits

[Ilia Mirkin]

Module: Mesa
Branch: master
Commit: 7cf2bffe8254de6808202d866598ec4c9afe1a51
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7cf2bffe8254de6808202d866598ec4c9afe1a51

Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date:   Sat Feb 21 03:12:54 2015 -0500

nvc0/ir: patch vertex count is stored in the upper bits

---

 src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp |    4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index 56dbb51..85dd05d 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -1525,6 +1525,10 @@ NVC0LoweringPass::handleRDSV(Instruction *i)
          i->op = OP_MOV;
          i->setSrc(0, bld.mkImm((sv == SV_NTID || sv == SV_NCTAID) ? 1 : 0));
       }
+      if (sv == SV_VERTEX_COUNT) {
+         bld.setPosition(i, true);
+         bld.mkOp2(OP_EXTBF, TYPE_U32, i->getDef(0), i->getDef(0), bld.mkImm(0x808));
+      }
       return true;
    }