Mesa (master): i965: Define FIRST_SPILL_MRF and FIRST_PULL_LOAD_MRF only once and in one place

[Iago Toral Quiroga]

Module: Mesa
Branch: master
Commit: 3141906fa36839e9276cb65033857c85b39376e5
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=3141906fa36839e9276cb65033857c85b39376e5

Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Tue Sep 22 13:14:52 2015 +0200

i965: Define FIRST_SPILL_MRF and FIRST_PULL_LOAD_MRF only once and in one place

That should make tracking where we do spills and pull loads a bit easier.

Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

---

 src/mesa/drivers/dri/i965/brw_fs.cpp              |    2 --
 src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp |    2 --
 src/mesa/drivers/dri/i965/brw_inst.h              |    6 ++++++
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp    |    3 ---
 4 files changed, 6 insertions(+), 7 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index b4b9810..781e2d8 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -50,8 +50,6 @@
 #include "glsl/glsl_types.h"
 #include "program/sampler.h"
 
-#define FIRST_PULL_LOAD_MRF(gen) ((gen) == 6 ? 16 : 13)
-
 using namespace brw;
 
 void
diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
index 6900cee..c3a037b 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
@@ -30,8 +30,6 @@
 #include "glsl/glsl_types.h"
 #include "glsl/ir_optimization.h"
 
-#define FIRST_SPILL_MRF(gen) (gen == 6 ? 21 : 13)
-
 using namespace brw;
 
 static void
diff --git a/src/mesa/drivers/dri/i965/brw_inst.h b/src/mesa/drivers/dri/i965/brw_inst.h
index c5132ba..ab37b70 100644
--- a/src/mesa/drivers/dri/i965/brw_inst.h
+++ b/src/mesa/drivers/dri/i965/brw_inst.h
@@ -42,6 +42,12 @@ extern "C" {
 /** Maximum SEND message length */
 #define BRW_MAX_MSG_LENGTH 15
 
+/** First MRF register used by pull loads */
+#define FIRST_SPILL_MRF(gen) ((gen) == 6 ? 21 : 13)
+
+/** First MRF register used by spills */
+#define FIRST_PULL_LOAD_MRF(gen) ((gen) == 6 ? 16 : 13)
+
 /* brw_context.h has a forward declaration of brw_inst, so name the struct. */
 typedef struct brw_inst {
    uint64_t data[2];
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index e0ccdb6..7bc13fe 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -26,9 +26,6 @@
 #include "glsl/ir_uniform.h"
 #include "program/sampler.h"
 
-#define FIRST_SPILL_MRF(gen) (gen == 6 ? 21 : 13)
-#define FIRST_PULL_LOAD_MRF(gen) (gen == 6 ? 16 : 13)
-
 namespace brw {
 
 vec4_instruction::vec4_instruction(enum opcode opcode, const dst_reg &dst,