[Mesa-dev] [PATCH 13/13] i915g: implement unfenced relocs for textures using tiling bits

[Daniel Vetter]

On Sat, Nov 20, 2010 at 10:52:03PM +0100, Jakob Bornecrantz wrote:
> On Fri, Nov 19, 2010 at 11:38 PM, Daniel Vetter <daniel.vetter at ffwll.ch> wrote:
> > @@ -755,7 +756,9 @@
> >  #define    MT_COMPRESS_DXT1_RGB                   (4<<3)
> >  #define MS3_USE_FENCE_REGS              (1<<2)
> >  #define MS3_TILED_SURFACE             (1<<1)
> > -#define MS3_TILE_WALK                 (1<<0)
> > +#define MS3_TILE_WALK_Y                (1<<0)
> > +#define MS3_TILE_BITS(tiling) (((tiling) ? MS3_TILED_SURFACE : 0) \
> > +                            | ((tiling) == I915_TILE_Y ?  MS3_TILE_WALK_Y : 0))
> 
> Again what about X tiling?

Tile_Walk_X is 0. Makes the macro less ugly (dito for the BUF_3D tiling
macro).

> I'm missing a chunk in i915_state_emit that changes the
> OUT_RELOC_FENCED to just OUT_RELOC.

Oops, that got lost in the patch creation.

Thanks a lot for your comments, I'll rework the patches to incorporate
them.

Cheers, Daniel
-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48