[Mesa-dev] [PATCH] i965: Set UniformBufferOffsetAlignment to sizeof(vec4)

Kenneth Graunke kenneth at whitecape.org
Thu Feb 7 21:12:04 PST 2013


On 02/07/2013 07:25 PM, Ian Romanick wrote:
> From: Ian Romanick <ian.d.romanick at intel.com>
>
> This matches the behavior of the Windows driver, but a bspec reference
> should would be nice.
>
> NOTE: This is a candidate for the 9.0 and 9.1 branches.
>
> Signed-off-by: Ian Romanick <ian.d.romanick at intel.com>
> ---
>   src/mesa/drivers/dri/i965/brw_context.c | 1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
> index 1201565..9aa6abe 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.c
> +++ b/src/mesa/drivers/dri/i965/brw_context.c
> @@ -360,6 +360,7 @@ brwCreateContext(int api,
>
>      ctx->Const.NativeIntegers = true;
>      ctx->Const.UniformBooleanTrue = 1;
> +   ctx->Const.UniformBufferOffsetAlignment = 16;
>
>      ctx->Const.ForceGLSLExtensionsWarn = driQueryOptionb(&intel->optionCache, "force_glsl_extensions_warn");

Yeah, I think this does need to be aligned to 16 bytes...though I'm not 
very familiar with that code.

Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>


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