[Mesa-dev] [PATCH 1/4] intel/blorp: Use mocs.tex for depth stencil

Jason Ekstrand jason at jlekstrand.net
Mon Nov 6 16:23:39 UTC 2017


On Mon, Nov 6, 2017 at 12:56 AM, Pohjolainen, Topi <
topi.pohjolainen at gmail.com> wrote:

> On Fri, Nov 03, 2017 at 04:17:31PM -0700, Jason Ekstrand wrote:
> > ---
> >  src/intel/blorp/blorp_genX_exec.h | 6 +-----
> >  1 file changed, 1 insertion(+), 5 deletions(-)
> >
> > diff --git a/src/intel/blorp/blorp_genX_exec.h
> b/src/intel/blorp/blorp_genX_exec.h
> > index 5389262..ccbfe51 100644
> > --- a/src/intel/blorp/blorp_genX_exec.h
> > +++ b/src/intel/blorp/blorp_genX_exec.h
> > @@ -1364,11 +1364,7 @@ blorp_emit_depth_stencil_config(struct
> blorp_batch *batch,
> >        return;
> >
> >     struct isl_depth_stencil_hiz_emit_info info = {
> > -#if GEN_GEN >= 7
> > -      .mocs = 1, /* GEN7_MOCS_L3 */
> > -#else
> > -      .mocs = 0,
> > -#endif
> > +      .mocs = batch->blorp->mocs.tex,
>
> Need to ask some questions here:
>
> It looks that the old value "1" was invalid for gen8+, how did that work?
>

I have no idea. :)


> Looking at brw_blorp_init(), we now start supplying *_MOCS_WB for gen8+.
> Does
> that work also for HIZ ops or do we need mocs::rb?
>

I looked at gen8_depth_state.c to make this choice.  There, we we use
MOCS_WB for gen8+.
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