benh at kernel.crashing.org
Fri Apr 15 16:47:13 PDT 2005
> Use DRI hooks and DMA. That will give you full PCI/AGP bandwidth copying
> of tiles from the card to the CPU and will be faster for larger blocks.
> For small blocks the best you can do is ensure you do maximal sized
> transfers on natural alignment with an x86.
> Soreen did some timing work on this btw
Yes, and the radeon driver already have some support for AGP blits,
however be careful with that, make it an option somewhere for now. The
problem is that not all AGP bridge implementation support AGP writes
(card -> AGP memory) and I don't know if we have a way to cascade that
info from the low level AGP driver to the X driver.
Maximal sized transfers on natural alignement will help on ppc as well.
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