[PATCH] drm/amdgpu: disable GFX PG on CZ/BR/ST

[StDenis, Tom]

The mmRLC_JUMP_TABLE_RESTORE isn't written unless you have PG enabled so the code has been there but I don't think it's really been exercised until now.


Oddly enough I'm able to read mmRLC_PG_ALWAYS_ON_CU_MASK and it comes back as 0x3 despite not being written to.  Is that a golden value or the value the hardware gives out of reset (on a Stoney)?


Tom


________________________________
From: Deucher, Alexander
Sent: Friday, July 15, 2016 13:18
To: StDenis, Tom; amd-gfx at lists.freedesktop.org
Subject: RE: [PATCH] drm/amdgpu: disable GFX PG on CZ/BR/ST


Presumably?  It generally seems to work.  There is no formal structure.  The jump tables are part of the actual firmware image and are restored from the buffer on ungate when the srams are powered back up.



Alex



From: StDenis, Tom
Sent: Friday, July 15, 2016 1:00 PM
To: amd-gfx at lists.freedesktop.org
Cc: Deucher, Alexander
Subject: Re: [PATCH] drm/amdgpu: disable GFX PG on CZ/BR/ST



Do we know for a fact the jump tables are being initialized properly?  They're only used on CZ/ST with PG turned on so it's entirely possible that code is buggy.



I don't like the aliasing the structs in amdgpu_ucode.h to random binary data specially since they have no packed pragma's attached.  We should either deserialize the firmware properly (implicitly load the struct members) or add a pragma.



Tom



________________________________

From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org<mailto:amd-gfx-bounces at lists.freedesktop.org>> on behalf of StDenis, Tom <Tom.StDenis at amd.com<mailto:Tom.StDenis at amd.com>>
Sent: Friday, July 15, 2016 12:25
To: amd-gfx at lists.freedesktop.org<mailto:amd-gfx at lists.freedesktop.org>
Cc: Deucher, Alexander
Subject: Re: [PATCH] drm/amdgpu: disable GFX PG on CZ/BR/ST



Reviewed-by: Tom St Denis <tom.stdenis at amd.com<mailto:tom.stdenis at amd.com>>







________________________________

From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org<mailto:amd-gfx-bounces at lists.freedesktop.org>> on behalf of Alex Deucher <alexdeucher at gmail.com<mailto:alexdeucher at gmail.com>>
Sent: Friday, July 15, 2016 12:08
To: amd-gfx at lists.freedesktop.org<mailto:amd-gfx at lists.freedesktop.org>
Cc: Deucher, Alexander
Subject: [PATCH] drm/amdgpu: disable GFX PG on CZ/BR/ST



Still some stability issues under certain workloads.

Signed-off-by: Alex Deucher <alexander.deucher at amd.com<mailto:alexander.deucher at amd.com>>
---
 drivers/gpu/drm/amd/amdgpu/vi.c | 14 --------------
 1 file changed, 14 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index cda7def..03a31c5 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -1249,15 +1249,7 @@ static int vi_common_early_init(void *handle)
                         AMD_CG_SUPPORT_HDP_LS |
                         AMD_CG_SUPPORT_SDMA_MGCG |
                         AMD_CG_SUPPORT_SDMA_LS;
-               /* rev0 hardware doesn't support PG */
                 adev->pg_flags = 0;
-               if (adev->rev_id != 0x00)
-                       adev->pg_flags |= AMD_PG_SUPPORT_GFX_PG |
-                               AMD_PG_SUPPORT_GFX_SMG |
-                               AMD_PG_SUPPORT_GFX_DMG |
-                               AMD_PG_SUPPORT_CP |
-                               AMD_PG_SUPPORT_RLC_SMU_HS |
-                               AMD_PG_SUPPORT_GFX_PIPELINE;
                 adev->external_rev_id = adev->rev_id + 0x1;
                 break;
         case CHIP_STONEY:
@@ -1276,12 +1268,6 @@ static int vi_common_early_init(void *handle)
                         AMD_CG_SUPPORT_HDP_LS |
                         AMD_CG_SUPPORT_SDMA_MGCG |
                         AMD_CG_SUPPORT_SDMA_LS;
-               adev->pg_flags = AMD_PG_SUPPORT_GFX_PG |
-                       AMD_PG_SUPPORT_GFX_SMG |
-                       AMD_PG_SUPPORT_GFX_DMG |
-                       AMD_PG_SUPPORT_GFX_PIPELINE |
-                       AMD_PG_SUPPORT_CP |
-                       AMD_PG_SUPPORT_RLC_SMU_HS;
                 adev->external_rev_id = adev->rev_id + 0x1;
                 break;
         default:
--
2.5.5

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