[PATCH] drm/amdgpu: correct code style

[Michel Dänzer]

On 19.07.2016 15:27, jimqu wrote:
> Change-Id: Ic3ec12cf0f64a6d24c64885b98d8c9d385eaf748
> Signed-off-by: JimQu <Jim.Qu at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
> index d7b8da4..1a88734 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
> @@ -210,11 +210,10 @@ static void vce_v3_0_set_vce_sw_clock_gating(struct amdgpu_device *adev,
>  static int vce_v3_0_firmware_loaded(struct amdgpu_device *adev)
>  {
>  	int i, j;
> -	uint32_t status = 0;
>  
>  	for (i = 0; i < 10; ++i) {
>  		for (j = 0; j < 100; ++j) {
> -			status = RREG32(mmVCE_STATUS);
> +			uint32_t status = RREG32(mmVCE_STATUS);

The coding style asks for an empty line here (between variable
declarations and statements).


>  			if (status & VCE_STATUS_VCPU_REPORT_FW_LOADED_MASK)
>  				return 0;
>  			mdelay(10);
> 

With that fixed,

Reviewed-by: Michel Dänzer <michel.daenzer at amd.com>


-- 
Earthling Michel Dänzer               |               http://www.amd.com
Libre software enthusiast             |             Mesa and X developer